Commit | Line | Data |
---|---|---|
ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
6135434a | 15 | #include <linux/input/matrix_keypad.h> |
ffe7f95b | 16 | #include <linux/spi/spi.h> |
c1f9a095 | 17 | #include <linux/wl12xx.h> |
ffe7f95b | 18 | #include <linux/i2c.h> |
ebeb53e1 | 19 | #include <linux/i2c/twl.h> |
ffe7f95b LL |
20 | #include <linux/clk.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/regulator/machine.h> | |
23 | #include <linux/gpio.h> | |
f014ee32 | 24 | #include <linux/gpio_keys.h> |
5e763d29 | 25 | #include <linux/mmc/host.h> |
ffe7f95b | 26 | |
ce491cf8 | 27 | #include <plat/mcspi.h> |
ce491cf8 TL |
28 | #include <plat/board.h> |
29 | #include <plat/common.h> | |
30 | #include <plat/dma.h> | |
31 | #include <plat/gpmc.h> | |
ce491cf8 TL |
32 | #include <plat/onenand.h> |
33 | #include <plat/gpmc-smc91x.h> | |
ffe7f95b | 34 | |
04aeae77 MK |
35 | #include <mach/board-rx51.h> |
36 | ||
87581fd4 | 37 | #include <sound/tlv320aic3x.h> |
64d06691 | 38 | #include <sound/tpa6130a2-plat.h> |
87581fd4 | 39 | |
70b5d737 MN |
40 | #include <../drivers/staging/iio/light/tsl2563.h> |
41 | ||
4896e394 | 42 | #include "mux.h" |
d02a900b | 43 | #include "hsmmc.h" |
ffe7f95b | 44 | |
f52eeee8 AH |
45 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
46 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
47 | ||
a24e61a9 KV |
48 | #define RX51_WL1251_POWER_GPIO 87 |
49 | #define RX51_WL1251_IRQ_GPIO 42 | |
50 | ||
51 | /* list all spi devices here */ | |
52 | enum { | |
53 | RX51_SPI_WL1251, | |
03e11104 | 54 | RX51_SPI_MIPID, /* LCD panel */ |
6996e7ff | 55 | RX51_SPI_TSC2005, /* Touch Controller */ |
a24e61a9 KV |
56 | }; |
57 | ||
58 | static struct wl12xx_platform_data wl1251_pdata; | |
59 | ||
70b5d737 MN |
60 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
61 | static struct tsl2563_platform_data rx51_tsl2563_platform_data = { | |
62 | .cover_comp_gain = 16, | |
63 | }; | |
64 | #endif | |
65 | ||
a24e61a9 KV |
66 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { |
67 | .turbo_mode = 0, | |
68 | .single_channel = 1, | |
69 | }; | |
70 | ||
03e11104 RQ |
71 | static struct omap2_mcspi_device_config mipid_mcspi_config = { |
72 | .turbo_mode = 0, | |
73 | .single_channel = 1, | |
74 | }; | |
75 | ||
6996e7ff RQ |
76 | static struct omap2_mcspi_device_config tsc2005_mcspi_config = { |
77 | .turbo_mode = 0, | |
78 | .single_channel = 1, | |
79 | }; | |
80 | ||
a24e61a9 KV |
81 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { |
82 | [RX51_SPI_WL1251] = { | |
83 | .modalias = "wl1251", | |
84 | .bus_num = 4, | |
85 | .chip_select = 0, | |
86 | .max_speed_hz = 48000000, | |
860fc976 | 87 | .mode = SPI_MODE_3, |
a24e61a9 KV |
88 | .controller_data = &wl1251_mcspi_config, |
89 | .platform_data = &wl1251_pdata, | |
90 | }, | |
03e11104 RQ |
91 | [RX51_SPI_MIPID] = { |
92 | .modalias = "acx565akm", | |
93 | .bus_num = 1, | |
94 | .chip_select = 2, | |
95 | .max_speed_hz = 6000000, | |
96 | .controller_data = &mipid_mcspi_config, | |
97 | }, | |
6996e7ff RQ |
98 | [RX51_SPI_TSC2005] = { |
99 | .modalias = "tsc2005", | |
100 | .bus_num = 1, | |
101 | .chip_select = 0, | |
102 | /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/ | |
103 | .max_speed_hz = 6000000, | |
104 | .controller_data = &tsc2005_mcspi_config, | |
105 | /* .platform_data = &tsc2005_config,*/ | |
106 | }, | |
a24e61a9 KV |
107 | }; |
108 | ||
fd0964c5 HK |
109 | static struct platform_device rx51_charger_device = { |
110 | .name = "isp1704_charger", | |
111 | }; | |
112 | ||
f014ee32 JN |
113 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
114 | ||
115 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | |
116 | #define RX51_GPIO_CAMERA_FOCUS 68 | |
117 | #define RX51_GPIO_CAMERA_CAPTURE 69 | |
118 | #define RX51_GPIO_KEYPAD_SLIDE 71 | |
119 | #define RX51_GPIO_LOCK_BUTTON 113 | |
120 | #define RX51_GPIO_PROXIMITY 89 | |
121 | ||
122 | #define RX51_GPIO_DEBOUNCE_TIMEOUT 10 | |
123 | ||
124 | static struct gpio_keys_button rx51_gpio_keys[] = { | |
125 | { | |
126 | .desc = "Camera Lens Cover", | |
127 | .type = EV_SW, | |
128 | .code = SW_CAMERA_LENS_COVER, | |
129 | .gpio = RX51_GPIO_CAMERA_LENS_COVER, | |
130 | .active_low = 1, | |
131 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
132 | }, { | |
133 | .desc = "Camera Focus", | |
134 | .type = EV_KEY, | |
135 | .code = KEY_CAMERA_FOCUS, | |
136 | .gpio = RX51_GPIO_CAMERA_FOCUS, | |
137 | .active_low = 1, | |
138 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
139 | }, { | |
140 | .desc = "Camera Capture", | |
141 | .type = EV_KEY, | |
142 | .code = KEY_CAMERA, | |
143 | .gpio = RX51_GPIO_CAMERA_CAPTURE, | |
144 | .active_low = 1, | |
145 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
146 | }, { | |
147 | .desc = "Lock Button", | |
148 | .type = EV_KEY, | |
149 | .code = KEY_SCREENLOCK, | |
150 | .gpio = RX51_GPIO_LOCK_BUTTON, | |
151 | .active_low = 1, | |
152 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
153 | }, { | |
154 | .desc = "Keypad Slide", | |
155 | .type = EV_SW, | |
156 | .code = SW_KEYPAD_SLIDE, | |
157 | .gpio = RX51_GPIO_KEYPAD_SLIDE, | |
158 | .active_low = 1, | |
159 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
160 | }, { | |
161 | .desc = "Proximity Sensor", | |
162 | .type = EV_SW, | |
163 | .code = SW_FRONT_PROXIMITY, | |
164 | .gpio = RX51_GPIO_PROXIMITY, | |
165 | .active_low = 0, | |
166 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
167 | } | |
168 | }; | |
169 | ||
170 | static struct gpio_keys_platform_data rx51_gpio_keys_data = { | |
171 | .buttons = rx51_gpio_keys, | |
172 | .nbuttons = ARRAY_SIZE(rx51_gpio_keys), | |
173 | }; | |
174 | ||
175 | static struct platform_device rx51_gpio_keys_device = { | |
176 | .name = "gpio-keys", | |
177 | .id = -1, | |
178 | .dev = { | |
179 | .platform_data = &rx51_gpio_keys_data, | |
180 | }, | |
181 | }; | |
182 | ||
183 | static void __init rx51_add_gpio_keys(void) | |
184 | { | |
185 | platform_device_register(&rx51_gpio_keys_device); | |
186 | } | |
187 | #else | |
188 | static void __init rx51_add_gpio_keys(void) | |
189 | { | |
190 | } | |
191 | #endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */ | |
192 | ||
bead4375 | 193 | static uint32_t board_keymap[] = { |
3fea6026 DT |
194 | /* |
195 | * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row | |
196 | * connected to the ground" matrix state. | |
197 | */ | |
ffe7f95b | 198 | KEY(0, 0, KEY_Q), |
acf442dc AK |
199 | KEY(0, 1, KEY_O), |
200 | KEY(0, 2, KEY_P), | |
201 | KEY(0, 3, KEY_COMMA), | |
202 | KEY(0, 4, KEY_BACKSPACE), | |
203 | KEY(0, 6, KEY_A), | |
204 | KEY(0, 7, KEY_S), | |
3fea6026 | 205 | |
acf442dc | 206 | KEY(1, 0, KEY_W), |
ffe7f95b | 207 | KEY(1, 1, KEY_D), |
acf442dc AK |
208 | KEY(1, 2, KEY_F), |
209 | KEY(1, 3, KEY_G), | |
210 | KEY(1, 4, KEY_H), | |
211 | KEY(1, 5, KEY_J), | |
212 | KEY(1, 6, KEY_K), | |
213 | KEY(1, 7, KEY_L), | |
3fea6026 | 214 | |
acf442dc AK |
215 | KEY(2, 0, KEY_E), |
216 | KEY(2, 1, KEY_DOT), | |
ffe7f95b | 217 | KEY(2, 2, KEY_UP), |
acf442dc AK |
218 | KEY(2, 3, KEY_ENTER), |
219 | KEY(2, 5, KEY_Z), | |
220 | KEY(2, 6, KEY_X), | |
221 | KEY(2, 7, KEY_C), | |
3fea6026 DT |
222 | KEY(2, 8, KEY_F9), |
223 | ||
acf442dc AK |
224 | KEY(3, 0, KEY_R), |
225 | KEY(3, 1, KEY_V), | |
226 | KEY(3, 2, KEY_B), | |
ffe7f95b | 227 | KEY(3, 3, KEY_N), |
acf442dc AK |
228 | KEY(3, 4, KEY_M), |
229 | KEY(3, 5, KEY_SPACE), | |
230 | KEY(3, 6, KEY_SPACE), | |
231 | KEY(3, 7, KEY_LEFT), | |
3fea6026 | 232 | |
acf442dc AK |
233 | KEY(4, 0, KEY_T), |
234 | KEY(4, 1, KEY_DOWN), | |
235 | KEY(4, 2, KEY_RIGHT), | |
ffe7f95b | 236 | KEY(4, 4, KEY_LEFTCTRL), |
acf442dc AK |
237 | KEY(4, 5, KEY_RIGHTALT), |
238 | KEY(4, 6, KEY_LEFTSHIFT), | |
2e65a207 | 239 | KEY(4, 8, KEY_F10), |
3fea6026 | 240 | |
acf442dc | 241 | KEY(5, 0, KEY_Y), |
2e65a207 | 242 | KEY(5, 8, KEY_F11), |
3fea6026 | 243 | |
acf442dc | 244 | KEY(6, 0, KEY_U), |
3fea6026 | 245 | |
acf442dc AK |
246 | KEY(7, 0, KEY_I), |
247 | KEY(7, 1, KEY_F7), | |
248 | KEY(7, 2, KEY_F8), | |
ffe7f95b LL |
249 | }; |
250 | ||
4f543332 TL |
251 | static struct matrix_keymap_data board_map_data = { |
252 | .keymap = board_keymap, | |
253 | .keymap_size = ARRAY_SIZE(board_keymap), | |
254 | }; | |
255 | ||
ffe7f95b | 256 | static struct twl4030_keypad_data rx51_kp_data = { |
4f543332 | 257 | .keymap_data = &board_map_data, |
ffe7f95b LL |
258 | .rows = 8, |
259 | .cols = 8, | |
ffe7f95b LL |
260 | .rep = 1, |
261 | }; | |
262 | ||
ffe7f95b LL |
263 | static struct twl4030_madc_platform_data rx51_madc_data = { |
264 | .irq_line = 1, | |
265 | }; | |
266 | ||
ce6f0016 AH |
267 | /* Enable input logic and pull all lines up when eMMC is on. */ |
268 | static struct omap_board_mux rx51_mmc2_on_mux[] = { | |
269 | OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
270 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
271 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
272 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
273 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
274 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
275 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
276 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
277 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
278 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
279 | }; | |
280 | ||
281 | /* Disable input logic and pull all lines down when eMMC is off. */ | |
282 | static struct omap_board_mux rx51_mmc2_off_mux[] = { | |
283 | OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
284 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
285 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
286 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
287 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
288 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
289 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
290 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
291 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
292 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
293 | }; | |
294 | ||
112485e9 BC |
295 | static struct omap_mux_partition *partition; |
296 | ||
ce6f0016 AH |
297 | /* |
298 | * Current flows to eMMC when eMMC is off and the data lines are pulled up, | |
299 | * so pull them down. N.B. we pull 8 lines because we are using 8 lines. | |
300 | */ | |
301 | static void rx51_mmc2_remux(struct device *dev, int slot, int power_on) | |
302 | { | |
303 | if (power_on) | |
112485e9 | 304 | omap_mux_write_array(partition, rx51_mmc2_on_mux); |
ce6f0016 | 305 | else |
112485e9 | 306 | omap_mux_write_array(partition, rx51_mmc2_off_mux); |
ce6f0016 AH |
307 | } |
308 | ||
68ff0423 | 309 | static struct omap2_hsmmc_info mmc[] __initdata = { |
ffe7f95b LL |
310 | { |
311 | .name = "external", | |
312 | .mmc = 1, | |
3a63833e | 313 | .caps = MMC_CAP_4_BIT_DATA, |
ffe7f95b LL |
314 | .cover_only = true, |
315 | .gpio_cd = 160, | |
316 | .gpio_wp = -EINVAL, | |
5e763d29 | 317 | .power_saving = true, |
ffe7f95b LL |
318 | }, |
319 | { | |
320 | .name = "internal", | |
321 | .mmc = 2, | |
3a63833e SG |
322 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
323 | /* See also rx51_mmc2_remux */ | |
ffe7f95b LL |
324 | .gpio_cd = -EINVAL, |
325 | .gpio_wp = -EINVAL, | |
5e763d29 AH |
326 | .nonremovable = true, |
327 | .power_saving = true, | |
ce6f0016 | 328 | .remux = rx51_mmc2_remux, |
ffe7f95b LL |
329 | }, |
330 | {} /* Terminator */ | |
331 | }; | |
332 | ||
5c7d9bbe JN |
333 | static struct regulator_consumer_supply rx51_vmmc1_supply = |
334 | REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.0"); | |
ffe7f95b | 335 | |
5c7d9bbe JN |
336 | static struct regulator_consumer_supply rx51_vaux3_supply = |
337 | REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1"); | |
ffe7f95b | 338 | |
5c7d9bbe JN |
339 | static struct regulator_consumer_supply rx51_vsim_supply = |
340 | REGULATOR_SUPPLY("vmmc_aux", "mmci-omap-hs.1"); | |
ffe7f95b | 341 | |
4cfcaef1 JN |
342 | static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { |
343 | /* tlv320aic3x analog supplies */ | |
5c7d9bbe JN |
344 | REGULATOR_SUPPLY("AVDD", "2-0018"), |
345 | REGULATOR_SUPPLY("DRVDD", "2-0018"), | |
caeeb4aa JN |
346 | REGULATOR_SUPPLY("AVDD", "2-0019"), |
347 | REGULATOR_SUPPLY("DRVDD", "2-0019"), | |
64d06691 JN |
348 | /* tpa6130a2 */ |
349 | REGULATOR_SUPPLY("Vdd", "2-0060"), | |
4cfcaef1 | 350 | /* Keep vmmc as last item. It is not iterated for newer boards */ |
5c7d9bbe | 351 | REGULATOR_SUPPLY("vmmc", "mmci-omap-hs.1"), |
4cfcaef1 JN |
352 | }; |
353 | ||
354 | static struct regulator_consumer_supply rx51_vio_supplies[] = { | |
355 | /* tlv320aic3x digital supplies */ | |
5c7d9bbe JN |
356 | REGULATOR_SUPPLY("IOVDD", "2-0018"), |
357 | REGULATOR_SUPPLY("DVDD", "2-0018"), | |
caeeb4aa JN |
358 | REGULATOR_SUPPLY("IOVDD", "2-0019"), |
359 | REGULATOR_SUPPLY("DVDD", "2-0019"), | |
4cfcaef1 JN |
360 | }; |
361 | ||
0581b52e RQ |
362 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) |
363 | extern struct platform_device rx51_display_device; | |
364 | #endif | |
365 | ||
366 | static struct regulator_consumer_supply rx51_vaux1_consumers[] = { | |
367 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) | |
368 | { | |
369 | .supply = "vdds_sdi", | |
370 | .dev = &rx51_display_device.dev, | |
371 | }, | |
372 | #endif | |
373 | }; | |
374 | ||
ffe7f95b LL |
375 | static struct regulator_init_data rx51_vaux1 = { |
376 | .constraints = { | |
377 | .name = "V28", | |
378 | .min_uV = 2800000, | |
379 | .max_uV = 2800000, | |
000d534e | 380 | .always_on = true, /* due battery cover sensor */ |
ffe7f95b LL |
381 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
382 | | REGULATOR_MODE_STANDBY, | |
383 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
384 | | REGULATOR_CHANGE_STATUS, | |
385 | }, | |
0581b52e RQ |
386 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers), |
387 | .consumer_supplies = rx51_vaux1_consumers, | |
ffe7f95b LL |
388 | }; |
389 | ||
390 | static struct regulator_init_data rx51_vaux2 = { | |
391 | .constraints = { | |
392 | .name = "VCSI", | |
393 | .min_uV = 1800000, | |
394 | .max_uV = 1800000, | |
395 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
396 | | REGULATOR_MODE_STANDBY, | |
397 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
398 | | REGULATOR_CHANGE_STATUS, | |
399 | }, | |
400 | }; | |
401 | ||
402 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 403 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
404 | .constraints = { |
405 | .name = "VCAM_DIG_18", | |
406 | .min_uV = 1800000, | |
407 | .max_uV = 1800000, | |
408 | .apply_uV = true, | |
409 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
410 | | REGULATOR_MODE_STANDBY, | |
411 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
412 | | REGULATOR_CHANGE_STATUS, | |
413 | }, | |
414 | }; | |
415 | ||
f52eeee8 AH |
416 | static struct regulator_init_data rx51_vaux3_mmc = { |
417 | .constraints = { | |
418 | .name = "VMMC2_30", | |
419 | .min_uV = 2800000, | |
420 | .max_uV = 3000000, | |
421 | .apply_uV = true, | |
422 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
423 | | REGULATOR_MODE_STANDBY, | |
424 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
425 | | REGULATOR_CHANGE_MODE | |
426 | | REGULATOR_CHANGE_STATUS, | |
427 | }, | |
428 | .num_consumer_supplies = 1, | |
4cfcaef1 | 429 | .consumer_supplies = &rx51_vaux3_supply, |
f52eeee8 AH |
430 | }; |
431 | ||
ffe7f95b LL |
432 | static struct regulator_init_data rx51_vaux4 = { |
433 | .constraints = { | |
434 | .name = "VCAM_ANA_28", | |
435 | .min_uV = 2800000, | |
436 | .max_uV = 2800000, | |
437 | .apply_uV = true, | |
438 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
439 | | REGULATOR_MODE_STANDBY, | |
440 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
441 | | REGULATOR_CHANGE_STATUS, | |
442 | }, | |
443 | }; | |
444 | ||
445 | static struct regulator_init_data rx51_vmmc1 = { | |
446 | .constraints = { | |
447 | .min_uV = 1850000, | |
448 | .max_uV = 3150000, | |
449 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
450 | | REGULATOR_MODE_STANDBY, | |
451 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
452 | | REGULATOR_CHANGE_MODE | |
453 | | REGULATOR_CHANGE_STATUS, | |
454 | }, | |
455 | .num_consumer_supplies = 1, | |
456 | .consumer_supplies = &rx51_vmmc1_supply, | |
457 | }; | |
458 | ||
459 | static struct regulator_init_data rx51_vmmc2 = { | |
460 | .constraints = { | |
f2add1de JN |
461 | .name = "V28_A", |
462 | .min_uV = 2800000, | |
463 | .max_uV = 3000000, | |
ffe7f95b LL |
464 | .apply_uV = true, |
465 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
466 | | REGULATOR_MODE_STANDBY, | |
467 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
468 | | REGULATOR_CHANGE_MODE | |
469 | | REGULATOR_CHANGE_STATUS, | |
470 | }, | |
4cfcaef1 JN |
471 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies), |
472 | .consumer_supplies = rx51_vmmc2_supplies, | |
ffe7f95b LL |
473 | }; |
474 | ||
475 | static struct regulator_init_data rx51_vsim = { | |
476 | .constraints = { | |
477 | .name = "VMMC2_IO_18", | |
478 | .min_uV = 1800000, | |
479 | .max_uV = 1800000, | |
480 | .apply_uV = true, | |
481 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
482 | | REGULATOR_MODE_STANDBY, | |
483 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
484 | | REGULATOR_CHANGE_STATUS, | |
485 | }, | |
486 | .num_consumer_supplies = 1, | |
487 | .consumer_supplies = &rx51_vsim_supply, | |
488 | }; | |
489 | ||
490 | static struct regulator_init_data rx51_vdac = { | |
491 | .constraints = { | |
492 | .min_uV = 1800000, | |
493 | .max_uV = 1800000, | |
494 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
495 | | REGULATOR_MODE_STANDBY, | |
496 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
497 | | REGULATOR_CHANGE_MODE | |
498 | | REGULATOR_CHANGE_STATUS, | |
499 | }, | |
500 | }; | |
501 | ||
4cfcaef1 JN |
502 | static struct regulator_init_data rx51_vio = { |
503 | .constraints = { | |
504 | .min_uV = 1800000, | |
505 | .max_uV = 1800000, | |
506 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
507 | | REGULATOR_MODE_STANDBY, | |
508 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
509 | | REGULATOR_CHANGE_MODE | |
510 | | REGULATOR_CHANGE_STATUS, | |
511 | }, | |
512 | .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies), | |
513 | .consumer_supplies = rx51_vio_supplies, | |
514 | }; | |
515 | ||
ffe7f95b LL |
516 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) |
517 | { | |
518 | /* FIXME this gpio setup is just a placeholder for now */ | |
519 | gpio_request(gpio + 6, "backlight_pwm"); | |
520 | gpio_direction_output(gpio + 6, 0); | |
521 | gpio_request(gpio + 7, "speaker_en"); | |
522 | gpio_direction_output(gpio + 7, 1); | |
523 | ||
ffe7f95b LL |
524 | return 0; |
525 | } | |
526 | ||
527 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
528 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
529 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
530 | .irq_end = TWL4030_GPIO_IRQ_END, | |
531 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) | |
532 | | BIT(4) | BIT(5) | |
533 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
534 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
535 | | BIT(16) | BIT(17) , | |
536 | .setup = rx51_twlgpio_setup, | |
537 | }; | |
538 | ||
dfc27b34 RQ |
539 | static struct twl4030_usb_data rx51_usb_data = { |
540 | .usb_mode = T2_USB_MODE_ULPI, | |
541 | }; | |
542 | ||
9312fffb AK |
543 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
544 | /* | |
3c684e84 | 545 | * Turn off everything |
9312fffb | 546 | */ |
3c684e84 | 547 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2}, |
9312fffb AK |
548 | }; |
549 | ||
550 | static struct twl4030_script sleep_on_script __initdata = { | |
551 | .script = sleep_on_seq, | |
552 | .size = ARRAY_SIZE(sleep_on_seq), | |
553 | .flags = TWL4030_SLEEP_SCRIPT, | |
554 | }; | |
555 | ||
556 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
557 | /* | |
3c684e84 | 558 | * Reenable everything |
9312fffb | 559 | */ |
3c684e84 | 560 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
561 | }; |
562 | ||
563 | static struct twl4030_script wakeup_script __initdata = { | |
564 | .script = wakeup_seq, | |
565 | .size = ARRAY_SIZE(wakeup_seq), | |
566 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
567 | }; | |
568 | ||
569 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
570 | /* | |
3c684e84 | 571 | * Reenable everything |
9312fffb | 572 | */ |
3c684e84 | 573 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
574 | }; |
575 | ||
576 | static struct twl4030_script wakeup_p3_script __initdata = { | |
577 | .script = wakeup_p3_seq, | |
578 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
579 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
580 | }; | |
581 | ||
582 | static struct twl4030_ins wrst_seq[] __initdata = { | |
583 | /* | |
584 | * Reset twl4030. | |
585 | * Reset VDD1 regulator. | |
586 | * Reset VDD2 regulator. | |
587 | * Reset VPLL1 regulator. | |
588 | * Enable sysclk output. | |
589 | * Reenable twl4030. | |
590 | */ | |
591 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
592 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
593 | 0x13}, | |
9312fffb AK |
594 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, |
595 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
596 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
597 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
3c684e84 | 598 | {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
599 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, |
600 | }; | |
601 | ||
602 | static struct twl4030_script wrst_script __initdata = { | |
603 | .script = wrst_seq, | |
604 | .size = ARRAY_SIZE(wrst_seq), | |
605 | .flags = TWL4030_WRST_SCRIPT, | |
606 | }; | |
607 | ||
608 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
609 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
610 | board might hit retention before loading of wakeup script is | |
611 | completed. This can cause boot failures depending on timing issues. | |
612 | */ | |
613 | &wakeup_script, | |
614 | &sleep_on_script, | |
615 | &wakeup_p3_script, | |
616 | &wrst_script, | |
617 | }; | |
618 | ||
619 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
3c684e84 AK |
620 | { .resource = RES_VDD1, .devgroup = -1, |
621 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
622 | .remap_sleep = RES_STATE_OFF | |
623 | }, | |
624 | { .resource = RES_VDD2, .devgroup = -1, | |
625 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
626 | .remap_sleep = RES_STATE_OFF | |
627 | }, | |
628 | { .resource = RES_VPLL1, .devgroup = -1, | |
629 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
630 | .remap_sleep = RES_STATE_OFF | |
631 | }, | |
632 | { .resource = RES_VPLL2, .devgroup = -1, | |
633 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
634 | }, | |
635 | { .resource = RES_VAUX1, .devgroup = -1, | |
636 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
637 | }, | |
638 | { .resource = RES_VAUX2, .devgroup = -1, | |
639 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
640 | }, | |
641 | { .resource = RES_VAUX3, .devgroup = -1, | |
642 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
643 | }, | |
644 | { .resource = RES_VAUX4, .devgroup = -1, | |
645 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
646 | }, | |
647 | { .resource = RES_VMMC1, .devgroup = -1, | |
648 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
649 | }, | |
650 | { .resource = RES_VMMC2, .devgroup = -1, | |
651 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
652 | }, | |
653 | { .resource = RES_VDAC, .devgroup = -1, | |
654 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
655 | }, | |
656 | { .resource = RES_VSIM, .devgroup = -1, | |
657 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
658 | }, | |
659 | { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
660 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
661 | }, | |
662 | { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
663 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
664 | }, | |
665 | { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
666 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
667 | }, | |
668 | { .resource = RES_VIO, .devgroup = DEV_GRP_P3, | |
669 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
670 | }, | |
671 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
672 | .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1 | |
673 | }, | |
674 | { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
675 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
676 | }, | |
677 | { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
678 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
679 | }, | |
680 | { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
681 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
682 | }, | |
683 | { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, | |
684 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
685 | }, | |
686 | { .resource = RES_32KCLKOUT, .devgroup = -1, | |
687 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
688 | }, | |
689 | { .resource = RES_RESET, .devgroup = -1, | |
690 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
691 | }, | |
692 | { .resource = RES_Main_Ref, .devgroup = -1, | |
693 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
694 | }, | |
9312fffb AK |
695 | { 0, 0}, |
696 | }; | |
697 | ||
698 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
699 | .scripts = twl4030_scripts, | |
700 | .num = ARRAY_SIZE(twl4030_scripts), | |
701 | .resource_config = twl4030_rconfig, | |
702 | }; | |
703 | ||
704 | ||
9312fffb | 705 | static struct twl4030_platform_data rx51_twldata __initdata = { |
ffe7f95b LL |
706 | .irq_base = TWL4030_IRQ_BASE, |
707 | .irq_end = TWL4030_IRQ_END, | |
708 | ||
709 | /* platform_data for children goes here */ | |
710 | .gpio = &rx51_gpio_data, | |
711 | .keypad = &rx51_kp_data, | |
712 | .madc = &rx51_madc_data, | |
dfc27b34 | 713 | .usb = &rx51_usb_data, |
9312fffb | 714 | .power = &rx51_t2scripts_data, |
ffe7f95b LL |
715 | |
716 | .vaux1 = &rx51_vaux1, | |
717 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
718 | .vaux4 = &rx51_vaux4, |
719 | .vmmc1 = &rx51_vmmc1, | |
ffe7f95b LL |
720 | .vsim = &rx51_vsim, |
721 | .vdac = &rx51_vdac, | |
4cfcaef1 | 722 | .vio = &rx51_vio, |
ffe7f95b LL |
723 | }; |
724 | ||
f0c61d3d | 725 | static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = { |
64d06691 JN |
726 | .id = TPA6130A2, |
727 | .power_gpio = 98, | |
728 | }; | |
729 | ||
ffe7f95b LL |
730 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = { |
731 | { | |
732 | I2C_BOARD_INFO("twl5030", 0x48), | |
733 | .flags = I2C_CLIENT_WAKE, | |
734 | .irq = INT_34XX_SYS_NIRQ, | |
735 | .platform_data = &rx51_twldata, | |
736 | }, | |
737 | }; | |
738 | ||
f0fba2ad LG |
739 | /* Audio setup data */ |
740 | static struct aic3x_setup_data rx51_aic34_setup = { | |
741 | .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED, | |
742 | .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT, | |
743 | }; | |
744 | ||
e4862f2f | 745 | static struct aic3x_pdata rx51_aic3x_data = { |
f0fba2ad LG |
746 | .setup = &rx51_aic34_setup, |
747 | .gpio_reset = 60, | |
748 | }; | |
749 | ||
caeeb4aa JN |
750 | static struct aic3x_pdata rx51_aic3x_data2 = { |
751 | .gpio_reset = 60, | |
752 | }; | |
753 | ||
dabe929b JN |
754 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = { |
755 | { | |
756 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
87581fd4 | 757 | .platform_data = &rx51_aic3x_data, |
dabe929b | 758 | }, |
caeeb4aa JN |
759 | { |
760 | I2C_BOARD_INFO("tlv320aic3x", 0x19), | |
761 | .platform_data = &rx51_aic3x_data2, | |
762 | }, | |
70b5d737 MN |
763 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
764 | { | |
765 | I2C_BOARD_INFO("tsl2563", 0x29), | |
766 | .platform_data = &rx51_tsl2563_platform_data, | |
767 | }, | |
768 | #endif | |
64d06691 JN |
769 | { |
770 | I2C_BOARD_INFO("tpa6130a2", 0x60), | |
771 | .platform_data = &rx51_tpa6130a2_data, | |
772 | } | |
dabe929b JN |
773 | }; |
774 | ||
ffe7f95b LL |
775 | static int __init rx51_i2c_init(void) |
776 | { | |
f52eeee8 | 777 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
4cfcaef1 | 778 | system_rev >= SYSTEM_REV_B_USES_VAUX3) { |
f52eeee8 | 779 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; |
4cfcaef1 JN |
780 | /* Only older boards use VMMC2 for internal MMC */ |
781 | rx51_vmmc2.num_consumer_supplies--; | |
782 | } else { | |
f52eeee8 | 783 | rx51_twldata.vaux3 = &rx51_vaux3_cam; |
f52eeee8 | 784 | } |
4cfcaef1 | 785 | rx51_twldata.vmmc2 = &rx51_vmmc2; |
cb3cc45a | 786 | omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1, |
dabe929b JN |
787 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); |
788 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, | |
789 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); | |
ffe7f95b LL |
790 | omap_register_i2c_bus(3, 400, NULL, 0); |
791 | return 0; | |
792 | } | |
793 | ||
aa62e90f JY |
794 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
795 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
796 | ||
797 | static struct mtd_partition onenand_partitions[] = { | |
798 | { | |
799 | .name = "bootloader", | |
800 | .offset = 0, | |
801 | .size = 0x20000, | |
802 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
803 | }, | |
804 | { | |
805 | .name = "config", | |
806 | .offset = MTDPART_OFS_APPEND, | |
807 | .size = 0x60000, | |
808 | }, | |
809 | { | |
810 | .name = "log", | |
811 | .offset = MTDPART_OFS_APPEND, | |
812 | .size = 0x40000, | |
813 | }, | |
814 | { | |
815 | .name = "kernel", | |
816 | .offset = MTDPART_OFS_APPEND, | |
817 | .size = 0x200000, | |
818 | }, | |
819 | { | |
820 | .name = "initfs", | |
821 | .offset = MTDPART_OFS_APPEND, | |
822 | .size = 0x200000, | |
823 | }, | |
824 | { | |
825 | .name = "rootfs", | |
826 | .offset = MTDPART_OFS_APPEND, | |
827 | .size = MTDPART_SIZ_FULL, | |
828 | }, | |
829 | }; | |
830 | ||
5403187f AK |
831 | static struct omap_onenand_platform_data board_onenand_data[] = { |
832 | { | |
833 | .cs = 0, | |
834 | .gpio_irq = 65, | |
835 | .parts = onenand_partitions, | |
836 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
837 | .flags = ONENAND_SYNC_READWRITE, | |
838 | } | |
aa62e90f | 839 | }; |
aa62e90f | 840 | #endif |
ffe7f95b | 841 | |
1a48e157 TL |
842 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
843 | ||
844 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
845 | .cs = 1, | |
846 | .gpio_irq = 54, | |
847 | .gpio_pwrdwn = 86, | |
848 | .gpio_reset = 164, | |
849 | .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL, | |
850 | }; | |
851 | ||
852 | static void __init board_smc91x_init(void) | |
853 | { | |
4896e394 TL |
854 | omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN); |
855 | omap_mux_init_gpio(86, OMAP_PIN_OUTPUT); | |
856 | omap_mux_init_gpio(164, OMAP_PIN_OUTPUT); | |
1a48e157 TL |
857 | |
858 | gpmc_smc91x_init(&board_smc91x_data); | |
859 | } | |
860 | ||
861 | #else | |
862 | ||
863 | static inline void board_smc91x_init(void) | |
864 | { | |
865 | } | |
866 | ||
867 | #endif | |
868 | ||
a24e61a9 KV |
869 | static void rx51_wl1251_set_power(bool enable) |
870 | { | |
871 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); | |
872 | } | |
873 | ||
874 | static void __init rx51_init_wl1251(void) | |
875 | { | |
876 | int irq, ret; | |
877 | ||
878 | ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power"); | |
879 | if (ret < 0) | |
880 | goto error; | |
881 | ||
882 | ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0); | |
883 | if (ret < 0) | |
884 | goto err_power; | |
885 | ||
886 | ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq"); | |
887 | if (ret < 0) | |
888 | goto err_power; | |
889 | ||
890 | ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO); | |
891 | if (ret < 0) | |
892 | goto err_irq; | |
893 | ||
894 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); | |
895 | if (irq < 0) | |
896 | goto err_irq; | |
897 | ||
898 | wl1251_pdata.set_power = rx51_wl1251_set_power; | |
899 | rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; | |
900 | ||
901 | return; | |
902 | ||
903 | err_irq: | |
904 | gpio_free(RX51_WL1251_IRQ_GPIO); | |
905 | ||
906 | err_power: | |
907 | gpio_free(RX51_WL1251_POWER_GPIO); | |
908 | ||
909 | error: | |
910 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | |
911 | wl1251_pdata.set_power = NULL; | |
912 | ||
913 | /* | |
914 | * Now rx51_peripherals_spi_board_info[1].irq is zero and | |
915 | * set_power is null, and wl1251_probe() will fail. | |
916 | */ | |
917 | } | |
918 | ||
ffe7f95b LL |
919 | void __init rx51_peripherals_init(void) |
920 | { | |
ffe7f95b | 921 | rx51_i2c_init(); |
5403187f | 922 | gpmc_onenand_init(board_onenand_data); |
1a48e157 | 923 | board_smc91x_init(); |
f014ee32 | 924 | rx51_add_gpio_keys(); |
a24e61a9 KV |
925 | rx51_init_wl1251(); |
926 | spi_register_board_info(rx51_peripherals_spi_board_info, | |
927 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | |
112485e9 BC |
928 | |
929 | partition = omap_mux_get("core"); | |
930 | if (partition) | |
931 | omap2_hsmmc_init(mmc); | |
932 | ||
fd0964c5 | 933 | platform_device_register(&rx51_charger_device); |
ffe7f95b LL |
934 | } |
935 |