ARM: restart: remove local_irq_disable() from within arch_reset()
[deliverable/linux.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL
3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
c1f9a095 17#include <linux/wl12xx.h>
ffe7f95b 18#include <linux/i2c.h>
ebeb53e1 19#include <linux/i2c/twl.h>
ffe7f95b
LL
20#include <linux/clk.h>
21#include <linux/delay.h>
22#include <linux/regulator/machine.h>
23#include <linux/gpio.h>
f014ee32 24#include <linux/gpio_keys.h>
5e763d29 25#include <linux/mmc/host.h>
10299e2e 26#include <linux/power/isp1704_charger.h>
ffe7f95b 27
ce491cf8 28#include <plat/mcspi.h>
ce491cf8
TL
29#include <plat/board.h>
30#include <plat/common.h>
31#include <plat/dma.h>
32#include <plat/gpmc.h>
ce491cf8
TL
33#include <plat/onenand.h>
34#include <plat/gpmc-smc91x.h>
ffe7f95b 35
04aeae77
MK
36#include <mach/board-rx51.h>
37
87581fd4 38#include <sound/tlv320aic3x.h>
64d06691 39#include <sound/tpa6130a2-plat.h>
589541c0
JN
40#include <media/radio-si4713.h>
41#include <media/si4713.h>
eeada9e8 42#include <linux/leds-lp5523.h>
87581fd4 43
70b5d737
MN
44#include <../drivers/staging/iio/light/tsl2563.h>
45
4896e394 46#include "mux.h"
d02a900b 47#include "hsmmc.h"
fbd8071c 48#include "common-board-devices.h"
ffe7f95b 49
f52eeee8
AH
50#define SYSTEM_REV_B_USES_VAUX3 0x1699
51#define SYSTEM_REV_S_USES_VAUX3 0x8
52
a24e61a9
KV
53#define RX51_WL1251_POWER_GPIO 87
54#define RX51_WL1251_IRQ_GPIO 42
589541c0
JN
55#define RX51_FMTX_RESET_GPIO 163
56#define RX51_FMTX_IRQ 53
eeada9e8 57#define RX51_LP5523_CHIP_EN_GPIO 41
a24e61a9 58
10299e2e
KJ
59#define RX51_USB_TRANSCEIVER_RST_GPIO 67
60
a24e61a9
KV
61/* list all spi devices here */
62enum {
63 RX51_SPI_WL1251,
03e11104 64 RX51_SPI_MIPID, /* LCD panel */
6996e7ff 65 RX51_SPI_TSC2005, /* Touch Controller */
a24e61a9
KV
66};
67
68static struct wl12xx_platform_data wl1251_pdata;
69
70b5d737
MN
70#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
71static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
72 .cover_comp_gain = 16,
73};
74#endif
75
eeada9e8
AP
76#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
77static struct lp5523_led_config rx51_lp5523_led_config[] = {
78 {
79 .chan_nr = 0,
80 .led_current = 50,
81 }, {
82 .chan_nr = 1,
83 .led_current = 50,
84 }, {
85 .chan_nr = 2,
86 .led_current = 50,
87 }, {
88 .chan_nr = 3,
89 .led_current = 50,
90 }, {
91 .chan_nr = 4,
92 .led_current = 50,
93 }, {
94 .chan_nr = 5,
95 .led_current = 50,
96 }, {
97 .chan_nr = 6,
98 .led_current = 50,
99 }, {
100 .chan_nr = 7,
101 .led_current = 50,
102 }, {
103 .chan_nr = 8,
104 .led_current = 50,
105 }
106};
107
108static int rx51_lp5523_setup(void)
109{
110 return gpio_request_one(RX51_LP5523_CHIP_EN_GPIO, GPIOF_DIR_OUT,
111 "lp5523_enable");
112}
113
114static void rx51_lp5523_release(void)
115{
116 gpio_free(RX51_LP5523_CHIP_EN_GPIO);
117}
118
119static void rx51_lp5523_enable(bool state)
120{
121 gpio_set_value(RX51_LP5523_CHIP_EN_GPIO, !!state);
122}
123
124static struct lp5523_platform_data rx51_lp5523_platform_data = {
125 .led_config = rx51_lp5523_led_config,
126 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config),
127 .clock_mode = LP5523_CLOCK_AUTO,
128 .setup_resources = rx51_lp5523_setup,
129 .release_resources = rx51_lp5523_release,
130 .enable = rx51_lp5523_enable,
131};
132#endif
133
a24e61a9
KV
134static struct omap2_mcspi_device_config wl1251_mcspi_config = {
135 .turbo_mode = 0,
136 .single_channel = 1,
137};
138
03e11104
RQ
139static struct omap2_mcspi_device_config mipid_mcspi_config = {
140 .turbo_mode = 0,
141 .single_channel = 1,
142};
143
6996e7ff
RQ
144static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
145 .turbo_mode = 0,
146 .single_channel = 1,
147};
148
a24e61a9
KV
149static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
150 [RX51_SPI_WL1251] = {
151 .modalias = "wl1251",
152 .bus_num = 4,
153 .chip_select = 0,
154 .max_speed_hz = 48000000,
860fc976 155 .mode = SPI_MODE_3,
a24e61a9
KV
156 .controller_data = &wl1251_mcspi_config,
157 .platform_data = &wl1251_pdata,
158 },
03e11104
RQ
159 [RX51_SPI_MIPID] = {
160 .modalias = "acx565akm",
161 .bus_num = 1,
162 .chip_select = 2,
163 .max_speed_hz = 6000000,
164 .controller_data = &mipid_mcspi_config,
165 },
6996e7ff
RQ
166 [RX51_SPI_TSC2005] = {
167 .modalias = "tsc2005",
168 .bus_num = 1,
169 .chip_select = 0,
170 /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/
171 .max_speed_hz = 6000000,
172 .controller_data = &tsc2005_mcspi_config,
173 /* .platform_data = &tsc2005_config,*/
174 },
a24e61a9
KV
175};
176
10299e2e
KJ
177static void rx51_charger_set_power(bool on)
178{
179 gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
180}
181
182static struct isp1704_charger_data rx51_charger_data = {
183 .set_power = rx51_charger_set_power,
184};
185
fd0964c5 186static struct platform_device rx51_charger_device = {
10299e2e
KJ
187 .name = "isp1704_charger",
188 .dev = {
189 .platform_data = &rx51_charger_data,
190 },
fd0964c5
HK
191};
192
10299e2e
KJ
193static void __init rx51_charger_init(void)
194{
195 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
196 GPIOF_OUT_INIT_LOW, "isp1704_reset"));
197
198 platform_device_register(&rx51_charger_device);
199}
200
f014ee32
JN
201#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
202
203#define RX51_GPIO_CAMERA_LENS_COVER 110
204#define RX51_GPIO_CAMERA_FOCUS 68
205#define RX51_GPIO_CAMERA_CAPTURE 69
206#define RX51_GPIO_KEYPAD_SLIDE 71
207#define RX51_GPIO_LOCK_BUTTON 113
208#define RX51_GPIO_PROXIMITY 89
209
210#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
211
212static struct gpio_keys_button rx51_gpio_keys[] = {
213 {
214 .desc = "Camera Lens Cover",
215 .type = EV_SW,
216 .code = SW_CAMERA_LENS_COVER,
217 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
218 .active_low = 1,
219 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
220 }, {
221 .desc = "Camera Focus",
222 .type = EV_KEY,
223 .code = KEY_CAMERA_FOCUS,
224 .gpio = RX51_GPIO_CAMERA_FOCUS,
225 .active_low = 1,
226 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
227 }, {
228 .desc = "Camera Capture",
229 .type = EV_KEY,
230 .code = KEY_CAMERA,
231 .gpio = RX51_GPIO_CAMERA_CAPTURE,
232 .active_low = 1,
233 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
234 }, {
235 .desc = "Lock Button",
236 .type = EV_KEY,
237 .code = KEY_SCREENLOCK,
238 .gpio = RX51_GPIO_LOCK_BUTTON,
239 .active_low = 1,
240 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
241 }, {
242 .desc = "Keypad Slide",
243 .type = EV_SW,
244 .code = SW_KEYPAD_SLIDE,
245 .gpio = RX51_GPIO_KEYPAD_SLIDE,
246 .active_low = 1,
247 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
248 }, {
249 .desc = "Proximity Sensor",
250 .type = EV_SW,
251 .code = SW_FRONT_PROXIMITY,
252 .gpio = RX51_GPIO_PROXIMITY,
253 .active_low = 0,
254 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
255 }
256};
257
258static struct gpio_keys_platform_data rx51_gpio_keys_data = {
259 .buttons = rx51_gpio_keys,
260 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
261};
262
263static struct platform_device rx51_gpio_keys_device = {
264 .name = "gpio-keys",
265 .id = -1,
266 .dev = {
267 .platform_data = &rx51_gpio_keys_data,
268 },
269};
270
271static void __init rx51_add_gpio_keys(void)
272{
273 platform_device_register(&rx51_gpio_keys_device);
274}
275#else
276static void __init rx51_add_gpio_keys(void)
277{
278}
279#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
280
bead4375 281static uint32_t board_keymap[] = {
3fea6026
DT
282 /*
283 * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row
284 * connected to the ground" matrix state.
285 */
ffe7f95b 286 KEY(0, 0, KEY_Q),
acf442dc
AK
287 KEY(0, 1, KEY_O),
288 KEY(0, 2, KEY_P),
289 KEY(0, 3, KEY_COMMA),
290 KEY(0, 4, KEY_BACKSPACE),
291 KEY(0, 6, KEY_A),
292 KEY(0, 7, KEY_S),
3fea6026 293
acf442dc 294 KEY(1, 0, KEY_W),
ffe7f95b 295 KEY(1, 1, KEY_D),
acf442dc
AK
296 KEY(1, 2, KEY_F),
297 KEY(1, 3, KEY_G),
298 KEY(1, 4, KEY_H),
299 KEY(1, 5, KEY_J),
300 KEY(1, 6, KEY_K),
301 KEY(1, 7, KEY_L),
3fea6026 302
acf442dc
AK
303 KEY(2, 0, KEY_E),
304 KEY(2, 1, KEY_DOT),
ffe7f95b 305 KEY(2, 2, KEY_UP),
acf442dc
AK
306 KEY(2, 3, KEY_ENTER),
307 KEY(2, 5, KEY_Z),
308 KEY(2, 6, KEY_X),
309 KEY(2, 7, KEY_C),
3fea6026
DT
310 KEY(2, 8, KEY_F9),
311
acf442dc
AK
312 KEY(3, 0, KEY_R),
313 KEY(3, 1, KEY_V),
314 KEY(3, 2, KEY_B),
ffe7f95b 315 KEY(3, 3, KEY_N),
acf442dc
AK
316 KEY(3, 4, KEY_M),
317 KEY(3, 5, KEY_SPACE),
318 KEY(3, 6, KEY_SPACE),
319 KEY(3, 7, KEY_LEFT),
3fea6026 320
acf442dc
AK
321 KEY(4, 0, KEY_T),
322 KEY(4, 1, KEY_DOWN),
323 KEY(4, 2, KEY_RIGHT),
ffe7f95b 324 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK
325 KEY(4, 5, KEY_RIGHTALT),
326 KEY(4, 6, KEY_LEFTSHIFT),
2e65a207 327 KEY(4, 8, KEY_F10),
3fea6026 328
acf442dc 329 KEY(5, 0, KEY_Y),
2e65a207 330 KEY(5, 8, KEY_F11),
3fea6026 331
acf442dc 332 KEY(6, 0, KEY_U),
3fea6026 333
acf442dc
AK
334 KEY(7, 0, KEY_I),
335 KEY(7, 1, KEY_F7),
336 KEY(7, 2, KEY_F8),
ffe7f95b
LL
337};
338
4f543332
TL
339static struct matrix_keymap_data board_map_data = {
340 .keymap = board_keymap,
341 .keymap_size = ARRAY_SIZE(board_keymap),
342};
343
ffe7f95b 344static struct twl4030_keypad_data rx51_kp_data = {
4f543332 345 .keymap_data = &board_map_data,
ffe7f95b
LL
346 .rows = 8,
347 .cols = 8,
ffe7f95b
LL
348 .rep = 1,
349};
350
ce6f0016
AH
351/* Enable input logic and pull all lines up when eMMC is on. */
352static struct omap_board_mux rx51_mmc2_on_mux[] = {
353 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
354 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
355 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
356 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
357 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
358 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
359 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
360 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
361 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
362 { .reg_offset = OMAP_MUX_TERMINATOR },
363};
364
365/* Disable input logic and pull all lines down when eMMC is off. */
366static struct omap_board_mux rx51_mmc2_off_mux[] = {
367 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
368 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
369 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
370 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
371 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
372 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
373 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
374 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
375 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
376 { .reg_offset = OMAP_MUX_TERMINATOR },
377};
378
112485e9
BC
379static struct omap_mux_partition *partition;
380
ce6f0016
AH
381/*
382 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
383 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
384 */
385static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
386{
387 if (power_on)
112485e9 388 omap_mux_write_array(partition, rx51_mmc2_on_mux);
ce6f0016 389 else
112485e9 390 omap_mux_write_array(partition, rx51_mmc2_off_mux);
ce6f0016
AH
391}
392
68ff0423 393static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL
394 {
395 .name = "external",
396 .mmc = 1,
3a63833e 397 .caps = MMC_CAP_4_BIT_DATA,
ffe7f95b
LL
398 .cover_only = true,
399 .gpio_cd = 160,
400 .gpio_wp = -EINVAL,
5e763d29 401 .power_saving = true,
ffe7f95b
LL
402 },
403 {
404 .name = "internal",
405 .mmc = 2,
3a63833e
SG
406 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
407 /* See also rx51_mmc2_remux */
ffe7f95b
LL
408 .gpio_cd = -EINVAL,
409 .gpio_wp = -EINVAL,
5e763d29
AH
410 .nonremovable = true,
411 .power_saving = true,
ce6f0016 412 .remux = rx51_mmc2_remux,
ffe7f95b
LL
413 },
414 {} /* Terminator */
415};
416
786b01a8
OD
417static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
418 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
419};
ffe7f95b 420
664a41b8
LT
421static struct regulator_consumer_supply rx51_vaux2_supply[] = {
422 REGULATOR_SUPPLY("vdds_csib", "omap3isp"),
423};
75ccf268 424
786b01a8
OD
425static struct regulator_consumer_supply rx51_vaux3_supply[] = {
426 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
427};
ffe7f95b 428
786b01a8
OD
429static struct regulator_consumer_supply rx51_vsim_supply[] = {
430 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
431};
ffe7f95b 432
4cfcaef1
JN
433static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
434 /* tlv320aic3x analog supplies */
5c7d9bbe
JN
435 REGULATOR_SUPPLY("AVDD", "2-0018"),
436 REGULATOR_SUPPLY("DRVDD", "2-0018"),
caeeb4aa
JN
437 REGULATOR_SUPPLY("AVDD", "2-0019"),
438 REGULATOR_SUPPLY("DRVDD", "2-0019"),
64d06691
JN
439 /* tpa6130a2 */
440 REGULATOR_SUPPLY("Vdd", "2-0060"),
4cfcaef1 441 /* Keep vmmc as last item. It is not iterated for newer boards */
0005ae73 442 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
4cfcaef1
JN
443};
444
445static struct regulator_consumer_supply rx51_vio_supplies[] = {
446 /* tlv320aic3x digital supplies */
5c7d9bbe
JN
447 REGULATOR_SUPPLY("IOVDD", "2-0018"),
448 REGULATOR_SUPPLY("DVDD", "2-0018"),
caeeb4aa
JN
449 REGULATOR_SUPPLY("IOVDD", "2-0019"),
450 REGULATOR_SUPPLY("DVDD", "2-0019"),
589541c0
JN
451 /* Si4713 IO supply */
452 REGULATOR_SUPPLY("vio", "2-0063"),
4cfcaef1
JN
453};
454
0581b52e 455static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
b5b9945b 456 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
589541c0
JN
457 /* Si4713 supply */
458 REGULATOR_SUPPLY("vdd", "2-0063"),
0581b52e
RQ
459};
460
ffe7f95b
LL
461static struct regulator_init_data rx51_vaux1 = {
462 .constraints = {
463 .name = "V28",
464 .min_uV = 2800000,
465 .max_uV = 2800000,
000d534e 466 .always_on = true, /* due battery cover sensor */
ffe7f95b
LL
467 .valid_modes_mask = REGULATOR_MODE_NORMAL
468 | REGULATOR_MODE_STANDBY,
469 .valid_ops_mask = REGULATOR_CHANGE_MODE
470 | REGULATOR_CHANGE_STATUS,
471 },
0581b52e
RQ
472 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
473 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL
474};
475
476static struct regulator_init_data rx51_vaux2 = {
477 .constraints = {
478 .name = "VCSI",
479 .min_uV = 1800000,
480 .max_uV = 1800000,
481 .valid_modes_mask = REGULATOR_MODE_NORMAL
482 | REGULATOR_MODE_STANDBY,
483 .valid_ops_mask = REGULATOR_CHANGE_MODE
484 | REGULATOR_CHANGE_STATUS,
485 },
664a41b8
LT
486 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply),
487 .consumer_supplies = rx51_vaux2_supply,
ffe7f95b
LL
488};
489
490/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 491static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL
492 .constraints = {
493 .name = "VCAM_DIG_18",
494 .min_uV = 1800000,
495 .max_uV = 1800000,
496 .apply_uV = true,
497 .valid_modes_mask = REGULATOR_MODE_NORMAL
498 | REGULATOR_MODE_STANDBY,
499 .valid_ops_mask = REGULATOR_CHANGE_MODE
500 | REGULATOR_CHANGE_STATUS,
501 },
502};
503
f52eeee8
AH
504static struct regulator_init_data rx51_vaux3_mmc = {
505 .constraints = {
506 .name = "VMMC2_30",
507 .min_uV = 2800000,
508 .max_uV = 3000000,
509 .apply_uV = true,
510 .valid_modes_mask = REGULATOR_MODE_NORMAL
511 | REGULATOR_MODE_STANDBY,
512 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
513 | REGULATOR_CHANGE_MODE
514 | REGULATOR_CHANGE_STATUS,
515 },
786b01a8
OD
516 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
517 .consumer_supplies = rx51_vaux3_supply,
f52eeee8
AH
518};
519
ffe7f95b
LL
520static struct regulator_init_data rx51_vaux4 = {
521 .constraints = {
522 .name = "VCAM_ANA_28",
523 .min_uV = 2800000,
524 .max_uV = 2800000,
525 .apply_uV = true,
526 .valid_modes_mask = REGULATOR_MODE_NORMAL
527 | REGULATOR_MODE_STANDBY,
528 .valid_ops_mask = REGULATOR_CHANGE_MODE
529 | REGULATOR_CHANGE_STATUS,
530 },
531};
532
533static struct regulator_init_data rx51_vmmc1 = {
534 .constraints = {
535 .min_uV = 1850000,
536 .max_uV = 3150000,
537 .valid_modes_mask = REGULATOR_MODE_NORMAL
538 | REGULATOR_MODE_STANDBY,
539 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
540 | REGULATOR_CHANGE_MODE
541 | REGULATOR_CHANGE_STATUS,
542 },
786b01a8
OD
543 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
544 .consumer_supplies = rx51_vmmc1_supply,
ffe7f95b
LL
545};
546
547static struct regulator_init_data rx51_vmmc2 = {
548 .constraints = {
f2add1de
JN
549 .name = "V28_A",
550 .min_uV = 2800000,
551 .max_uV = 3000000,
2827411e 552 .always_on = true, /* due VIO leak to AIC34 VDDs */
ffe7f95b
LL
553 .apply_uV = true,
554 .valid_modes_mask = REGULATOR_MODE_NORMAL
555 | REGULATOR_MODE_STANDBY,
556 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
557 | REGULATOR_CHANGE_MODE
558 | REGULATOR_CHANGE_STATUS,
559 },
4cfcaef1
JN
560 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
561 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL
562};
563
094fc559
KJ
564static struct regulator_init_data rx51_vpll1 = {
565 .constraints = {
566 .name = "VPLL",
567 .min_uV = 1800000,
568 .max_uV = 1800000,
569 .apply_uV = true,
570 .always_on = true,
571 .valid_modes_mask = REGULATOR_MODE_NORMAL
572 | REGULATOR_MODE_STANDBY,
573 .valid_ops_mask = REGULATOR_CHANGE_MODE,
574 },
575};
576
577static struct regulator_init_data rx51_vpll2 = {
578 .constraints = {
579 .name = "VSDI_CSI",
580 .min_uV = 1800000,
581 .max_uV = 1800000,
582 .apply_uV = true,
583 .always_on = true,
584 .valid_modes_mask = REGULATOR_MODE_NORMAL
585 | REGULATOR_MODE_STANDBY,
586 .valid_ops_mask = REGULATOR_CHANGE_MODE,
587 },
588};
589
ffe7f95b
LL
590static struct regulator_init_data rx51_vsim = {
591 .constraints = {
592 .name = "VMMC2_IO_18",
593 .min_uV = 1800000,
594 .max_uV = 1800000,
595 .apply_uV = true,
596 .valid_modes_mask = REGULATOR_MODE_NORMAL
597 | REGULATOR_MODE_STANDBY,
598 .valid_ops_mask = REGULATOR_CHANGE_MODE
599 | REGULATOR_CHANGE_STATUS,
600 },
786b01a8
OD
601 .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
602 .consumer_supplies = rx51_vsim_supply,
ffe7f95b
LL
603};
604
4cfcaef1
JN
605static struct regulator_init_data rx51_vio = {
606 .constraints = {
607 .min_uV = 1800000,
608 .max_uV = 1800000,
609 .valid_modes_mask = REGULATOR_MODE_NORMAL
610 | REGULATOR_MODE_STANDBY,
611 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
612 | REGULATOR_CHANGE_MODE
613 | REGULATOR_CHANGE_STATUS,
614 },
615 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
616 .consumer_supplies = rx51_vio_supplies,
617};
618
094fc559
KJ
619static struct regulator_init_data rx51_vintana1 = {
620 .constraints = {
621 .name = "VINTANA1",
622 .min_uV = 1500000,
623 .max_uV = 1500000,
624 .always_on = true,
625 .valid_modes_mask = REGULATOR_MODE_NORMAL
626 | REGULATOR_MODE_STANDBY,
627 .valid_ops_mask = REGULATOR_CHANGE_MODE,
628 },
629};
630
631static struct regulator_init_data rx51_vintana2 = {
632 .constraints = {
633 .name = "VINTANA2",
634 .min_uV = 2750000,
635 .max_uV = 2750000,
636 .apply_uV = true,
637 .always_on = true,
638 .valid_modes_mask = REGULATOR_MODE_NORMAL
639 | REGULATOR_MODE_STANDBY,
640 .valid_ops_mask = REGULATOR_CHANGE_MODE,
641 },
642};
643
644static struct regulator_init_data rx51_vintdig = {
645 .constraints = {
646 .name = "VINTDIG",
647 .min_uV = 1500000,
648 .max_uV = 1500000,
649 .always_on = true,
650 .valid_modes_mask = REGULATOR_MODE_NORMAL
651 | REGULATOR_MODE_STANDBY,
652 .valid_ops_mask = REGULATOR_CHANGE_MODE,
653 },
654};
655
589541c0
JN
656static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = {
657 .gpio_reset = RX51_FMTX_RESET_GPIO,
658};
659
660static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = {
661 I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH),
662 .platform_data = &rx51_si4713_i2c_data,
663};
664
665static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = {
666 .i2c_bus = 2,
667 .subdev_board_info = &rx51_si4713_board_info,
668};
669
07ad6ab3 670static struct platform_device rx51_si4713_dev = {
589541c0
JN
671 .name = "radio-si4713",
672 .id = -1,
673 .dev = {
674 .platform_data = &rx51_si4713_data,
675 },
676};
677
678static __init void rx51_init_si4713(void)
679{
680 int err;
681
682 err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq");
683 if (err) {
684 printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err);
685 return;
686 }
687 rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ);
688 platform_device_register(&rx51_si4713_dev);
689}
690
ffe7f95b
LL
691static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
692{
693 /* FIXME this gpio setup is just a placeholder for now */
bc593f5d 694 gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm");
c0ad4fac 695 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en");
ffe7f95b 696
ffe7f95b
LL
697 return 0;
698}
699
700static struct twl4030_gpio_platform_data rx51_gpio_data = {
701 .gpio_base = OMAP_MAX_GPIO_LINES,
702 .irq_base = TWL4030_GPIO_IRQ_BASE,
703 .irq_end = TWL4030_GPIO_IRQ_END,
704 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
705 | BIT(4) | BIT(5)
706 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
707 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
708 | BIT(16) | BIT(17) ,
709 .setup = rx51_twlgpio_setup,
710};
711
9312fffb
AK
712static struct twl4030_ins sleep_on_seq[] __initdata = {
713/*
3c684e84 714 * Turn off everything
9312fffb 715 */
3c684e84 716 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK
717};
718
719static struct twl4030_script sleep_on_script __initdata = {
720 .script = sleep_on_seq,
721 .size = ARRAY_SIZE(sleep_on_seq),
722 .flags = TWL4030_SLEEP_SCRIPT,
723};
724
725static struct twl4030_ins wakeup_seq[] __initdata = {
726/*
3c684e84 727 * Reenable everything
9312fffb 728 */
3c684e84 729 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK
730};
731
732static struct twl4030_script wakeup_script __initdata = {
733 .script = wakeup_seq,
734 .size = ARRAY_SIZE(wakeup_seq),
735 .flags = TWL4030_WAKEUP12_SCRIPT,
736};
737
738static struct twl4030_ins wakeup_p3_seq[] __initdata = {
739/*
3c684e84 740 * Reenable everything
9312fffb 741 */
3c684e84 742 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK
743};
744
745static struct twl4030_script wakeup_p3_script __initdata = {
746 .script = wakeup_p3_seq,
747 .size = ARRAY_SIZE(wakeup_p3_seq),
748 .flags = TWL4030_WAKEUP3_SCRIPT,
749};
750
751static struct twl4030_ins wrst_seq[] __initdata = {
752/*
753 * Reset twl4030.
754 * Reset VDD1 regulator.
755 * Reset VDD2 regulator.
756 * Reset VPLL1 regulator.
757 * Enable sysclk output.
758 * Reenable twl4030.
759 */
760 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
761 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
762 0x13},
9312fffb
AK
763 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
764 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
765 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
766 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 767 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
9312fffb
AK
768 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
769};
770
771static struct twl4030_script wrst_script __initdata = {
772 .script = wrst_seq,
773 .size = ARRAY_SIZE(wrst_seq),
774 .flags = TWL4030_WRST_SCRIPT,
775};
776
777static struct twl4030_script *twl4030_scripts[] __initdata = {
778 /* wakeup12 script should be loaded before sleep script, otherwise a
779 board might hit retention before loading of wakeup script is
780 completed. This can cause boot failures depending on timing issues.
781 */
782 &wakeup_script,
783 &sleep_on_script,
784 &wakeup_p3_script,
785 &wrst_script,
786};
787
788static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK
789 { .resource = RES_VDD1, .devgroup = -1,
790 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
791 .remap_sleep = RES_STATE_OFF
792 },
793 { .resource = RES_VDD2, .devgroup = -1,
794 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
795 .remap_sleep = RES_STATE_OFF
796 },
797 { .resource = RES_VPLL1, .devgroup = -1,
798 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
799 .remap_sleep = RES_STATE_OFF
800 },
801 { .resource = RES_VPLL2, .devgroup = -1,
802 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
803 },
804 { .resource = RES_VAUX1, .devgroup = -1,
805 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
806 },
807 { .resource = RES_VAUX2, .devgroup = -1,
808 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
809 },
810 { .resource = RES_VAUX3, .devgroup = -1,
811 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
812 },
813 { .resource = RES_VAUX4, .devgroup = -1,
814 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
815 },
816 { .resource = RES_VMMC1, .devgroup = -1,
817 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
818 },
819 { .resource = RES_VMMC2, .devgroup = -1,
820 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
821 },
822 { .resource = RES_VDAC, .devgroup = -1,
823 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
824 },
825 { .resource = RES_VSIM, .devgroup = -1,
826 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
827 },
828 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
829 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
830 },
831 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
832 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
833 },
834 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
835 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
836 },
837 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
838 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
839 },
840 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
841 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
842 },
843 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
844 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
845 },
846 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
847 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
848 },
849 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
850 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
851 },
852 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
853 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
854 },
855 { .resource = RES_32KCLKOUT, .devgroup = -1,
856 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
857 },
858 { .resource = RES_RESET, .devgroup = -1,
859 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
860 },
d7ac829f 861 { .resource = RES_MAIN_REF, .devgroup = -1,
3c684e84
AK
862 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
863 },
9312fffb
AK
864 { 0, 0},
865};
866
867static struct twl4030_power_data rx51_t2scripts_data __initdata = {
868 .scripts = twl4030_scripts,
869 .num = ARRAY_SIZE(twl4030_scripts),
870 .resource_config = twl4030_rconfig,
871};
872
4ae6df5e 873struct twl4030_vibra_data rx51_vibra_data __initdata = {
b7a834cc
IK
874 .coexist = 0,
875};
876
4ae6df5e 877struct twl4030_audio_data rx51_audio_data __initdata = {
b7a834cc
IK
878 .audio_mclk = 26000000,
879 .vibra = &rx51_vibra_data,
880};
9312fffb 881
9312fffb 882static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL
883 /* platform_data for children goes here */
884 .gpio = &rx51_gpio_data,
885 .keypad = &rx51_kp_data,
9312fffb 886 .power = &rx51_t2scripts_data,
4ae6df5e 887 .audio = &rx51_audio_data,
ffe7f95b
LL
888
889 .vaux1 = &rx51_vaux1,
890 .vaux2 = &rx51_vaux2,
ffe7f95b
LL
891 .vaux4 = &rx51_vaux4,
892 .vmmc1 = &rx51_vmmc1,
094fc559
KJ
893 .vpll1 = &rx51_vpll1,
894 .vpll2 = &rx51_vpll2,
ffe7f95b 895 .vsim = &rx51_vsim,
094fc559
KJ
896 .vintana1 = &rx51_vintana1,
897 .vintana2 = &rx51_vintana2,
898 .vintdig = &rx51_vintdig,
4cfcaef1 899 .vio = &rx51_vio,
ffe7f95b
LL
900};
901
f0c61d3d 902static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = {
64d06691
JN
903 .power_gpio = 98,
904};
905
f0fba2ad
LG
906/* Audio setup data */
907static struct aic3x_setup_data rx51_aic34_setup = {
908 .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED,
909 .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT,
910};
911
e4862f2f 912static struct aic3x_pdata rx51_aic3x_data = {
f0fba2ad
LG
913 .setup = &rx51_aic34_setup,
914 .gpio_reset = 60,
915};
916
caeeb4aa
JN
917static struct aic3x_pdata rx51_aic3x_data2 = {
918 .gpio_reset = 60,
919};
920
dabe929b
JN
921static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
922 {
923 I2C_BOARD_INFO("tlv320aic3x", 0x18),
87581fd4 924 .platform_data = &rx51_aic3x_data,
dabe929b 925 },
caeeb4aa
JN
926 {
927 I2C_BOARD_INFO("tlv320aic3x", 0x19),
928 .platform_data = &rx51_aic3x_data2,
929 },
70b5d737
MN
930#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
931 {
932 I2C_BOARD_INFO("tsl2563", 0x29),
933 .platform_data = &rx51_tsl2563_platform_data,
934 },
eeada9e8
AP
935#endif
936#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
937 {
938 I2C_BOARD_INFO("lp5523", 0x32),
939 .platform_data = &rx51_lp5523_platform_data,
940 },
70b5d737 941#endif
64d06691
JN
942 {
943 I2C_BOARD_INFO("tpa6130a2", 0x60),
944 .platform_data = &rx51_tpa6130a2_data,
945 }
dabe929b
JN
946};
947
ffe7f95b
LL
948static int __init rx51_i2c_init(void)
949{
f52eeee8 950 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 951 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 952 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN
953 /* Only older boards use VMMC2 for internal MMC */
954 rx51_vmmc2.num_consumer_supplies--;
955 } else {
f52eeee8 956 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 957 }
4cfcaef1 958 rx51_twldata.vmmc2 = &rx51_vmmc2;
827ed9ae 959 omap3_pmic_get_config(&rx51_twldata,
b252b0ef
PU
960 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
961 TWL_COMMON_REGULATOR_VDAC);
962
963 rx51_twldata.vdac->constraints.apply_uV = true;
964 rx51_twldata.vdac->constraints.name = "VDAC";
965
fbd8071c 966 omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
dabe929b
JN
967 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
968 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
ffe7f95b
LL
969 omap_register_i2c_bus(3, 400, NULL, 0);
970 return 0;
971}
972
aa62e90f
JY
973#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
974 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
975
976static struct mtd_partition onenand_partitions[] = {
977 {
978 .name = "bootloader",
979 .offset = 0,
980 .size = 0x20000,
981 .mask_flags = MTD_WRITEABLE, /* Force read-only */
982 },
983 {
984 .name = "config",
985 .offset = MTDPART_OFS_APPEND,
986 .size = 0x60000,
987 },
988 {
989 .name = "log",
990 .offset = MTDPART_OFS_APPEND,
991 .size = 0x40000,
992 },
993 {
994 .name = "kernel",
995 .offset = MTDPART_OFS_APPEND,
996 .size = 0x200000,
997 },
998 {
999 .name = "initfs",
1000 .offset = MTDPART_OFS_APPEND,
1001 .size = 0x200000,
1002 },
1003 {
1004 .name = "rootfs",
1005 .offset = MTDPART_OFS_APPEND,
1006 .size = MTDPART_SIZ_FULL,
1007 },
1008};
1009
5403187f
AK
1010static struct omap_onenand_platform_data board_onenand_data[] = {
1011 {
1012 .cs = 0,
1013 .gpio_irq = 65,
1014 .parts = onenand_partitions,
1015 .nr_parts = ARRAY_SIZE(onenand_partitions),
1016 .flags = ONENAND_SYNC_READWRITE,
1017 }
aa62e90f 1018};
aa62e90f 1019#endif
ffe7f95b 1020
1a48e157
TL
1021#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1022
1023static struct omap_smc91x_platform_data board_smc91x_data = {
1024 .cs = 1,
1025 .gpio_irq = 54,
1026 .gpio_pwrdwn = 86,
1027 .gpio_reset = 164,
1028 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
1029};
1030
1031static void __init board_smc91x_init(void)
1032{
4896e394
TL
1033 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
1034 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
1035 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
1a48e157
TL
1036
1037 gpmc_smc91x_init(&board_smc91x_data);
1038}
1039
1040#else
1041
1042static inline void board_smc91x_init(void)
1043{
1044}
1045
1046#endif
1047
a24e61a9
KV
1048static void rx51_wl1251_set_power(bool enable)
1049{
1050 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
1051}
1052
bc593f5d
IG
1053static struct gpio rx51_wl1251_gpios[] __initdata = {
1054 { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" },
1055 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" },
1056};
1057
a24e61a9
KV
1058static void __init rx51_init_wl1251(void)
1059{
1060 int irq, ret;
1061
bc593f5d
IG
1062 ret = gpio_request_array(rx51_wl1251_gpios,
1063 ARRAY_SIZE(rx51_wl1251_gpios));
a24e61a9
KV
1064 if (ret < 0)
1065 goto error;
1066
a24e61a9
KV
1067 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
1068 if (irq < 0)
1069 goto err_irq;
1070
1071 wl1251_pdata.set_power = rx51_wl1251_set_power;
1072 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
1073
1074 return;
1075
1076err_irq:
1077 gpio_free(RX51_WL1251_IRQ_GPIO);
a24e61a9 1078 gpio_free(RX51_WL1251_POWER_GPIO);
a24e61a9
KV
1079error:
1080 printk(KERN_ERR "wl1251 board initialisation failed\n");
1081 wl1251_pdata.set_power = NULL;
1082
1083 /*
1084 * Now rx51_peripherals_spi_board_info[1].irq is zero and
1085 * set_power is null, and wl1251_probe() will fail.
1086 */
1087}
1088
ffe7f95b
LL
1089void __init rx51_peripherals_init(void)
1090{
ffe7f95b 1091 rx51_i2c_init();
094fc559 1092 regulator_has_full_constraints();
5403187f 1093 gpmc_onenand_init(board_onenand_data);
1a48e157 1094 board_smc91x_init();
f014ee32 1095 rx51_add_gpio_keys();
a24e61a9 1096 rx51_init_wl1251();
589541c0 1097 rx51_init_si4713();
a24e61a9
KV
1098 spi_register_board_info(rx51_peripherals_spi_board_info,
1099 ARRAY_SIZE(rx51_peripherals_spi_board_info));
112485e9
BC
1100
1101 partition = omap_mux_get("core");
1102 if (partition)
1103 omap2_hsmmc_init(mmc);
1104
10299e2e 1105 rx51_charger_init();
ffe7f95b
LL
1106}
1107
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