Disintegrate asm/system.h for ARM
[deliverable/linux.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL
3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
c1f9a095 17#include <linux/wl12xx.h>
3dad5356 18#include <linux/spi/tsc2005.h>
ffe7f95b 19#include <linux/i2c.h>
ebeb53e1 20#include <linux/i2c/twl.h>
ffe7f95b
LL
21#include <linux/clk.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
24#include <linux/gpio.h>
f014ee32 25#include <linux/gpio_keys.h>
5e763d29 26#include <linux/mmc/host.h>
10299e2e 27#include <linux/power/isp1704_charger.h>
9f97da78 28#include <asm/system_info.h>
ffe7f95b 29
ce491cf8 30#include <plat/mcspi.h>
ce491cf8 31#include <plat/board.h>
4e65331c 32#include "common.h"
ce491cf8
TL
33#include <plat/dma.h>
34#include <plat/gpmc.h>
ce491cf8
TL
35#include <plat/onenand.h>
36#include <plat/gpmc-smc91x.h>
ffe7f95b 37
04aeae77
MK
38#include <mach/board-rx51.h>
39
87581fd4 40#include <sound/tlv320aic3x.h>
64d06691 41#include <sound/tpa6130a2-plat.h>
589541c0
JN
42#include <media/radio-si4713.h>
43#include <media/si4713.h>
eeada9e8 44#include <linux/leds-lp5523.h>
87581fd4 45
70b5d737
MN
46#include <../drivers/staging/iio/light/tsl2563.h>
47
4896e394 48#include "mux.h"
d02a900b 49#include "hsmmc.h"
fbd8071c 50#include "common-board-devices.h"
ffe7f95b 51
f52eeee8
AH
52#define SYSTEM_REV_B_USES_VAUX3 0x1699
53#define SYSTEM_REV_S_USES_VAUX3 0x8
54
a24e61a9
KV
55#define RX51_WL1251_POWER_GPIO 87
56#define RX51_WL1251_IRQ_GPIO 42
589541c0
JN
57#define RX51_FMTX_RESET_GPIO 163
58#define RX51_FMTX_IRQ 53
eeada9e8 59#define RX51_LP5523_CHIP_EN_GPIO 41
a24e61a9 60
10299e2e
KJ
61#define RX51_USB_TRANSCEIVER_RST_GPIO 67
62
3dad5356
AK
63#define RX51_TSC2005_RESET_GPIO 104
64#define RX51_TSC2005_IRQ_GPIO 100
65
a24e61a9
KV
66/* list all spi devices here */
67enum {
68 RX51_SPI_WL1251,
03e11104 69 RX51_SPI_MIPID, /* LCD panel */
6996e7ff 70 RX51_SPI_TSC2005, /* Touch Controller */
a24e61a9
KV
71};
72
73static struct wl12xx_platform_data wl1251_pdata;
3dad5356 74static struct tsc2005_platform_data tsc2005_pdata;
a24e61a9 75
70b5d737
MN
76#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
77static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
78 .cover_comp_gain = 16,
79};
80#endif
81
eeada9e8
AP
82#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
83static struct lp5523_led_config rx51_lp5523_led_config[] = {
84 {
85 .chan_nr = 0,
86 .led_current = 50,
87 }, {
88 .chan_nr = 1,
89 .led_current = 50,
90 }, {
91 .chan_nr = 2,
92 .led_current = 50,
93 }, {
94 .chan_nr = 3,
95 .led_current = 50,
96 }, {
97 .chan_nr = 4,
98 .led_current = 50,
99 }, {
100 .chan_nr = 5,
101 .led_current = 50,
102 }, {
103 .chan_nr = 6,
104 .led_current = 50,
105 }, {
106 .chan_nr = 7,
107 .led_current = 50,
108 }, {
109 .chan_nr = 8,
110 .led_current = 50,
111 }
112};
113
114static int rx51_lp5523_setup(void)
115{
116 return gpio_request_one(RX51_LP5523_CHIP_EN_GPIO, GPIOF_DIR_OUT,
117 "lp5523_enable");
118}
119
120static void rx51_lp5523_release(void)
121{
122 gpio_free(RX51_LP5523_CHIP_EN_GPIO);
123}
124
125static void rx51_lp5523_enable(bool state)
126{
127 gpio_set_value(RX51_LP5523_CHIP_EN_GPIO, !!state);
128}
129
130static struct lp5523_platform_data rx51_lp5523_platform_data = {
131 .led_config = rx51_lp5523_led_config,
132 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config),
133 .clock_mode = LP5523_CLOCK_AUTO,
134 .setup_resources = rx51_lp5523_setup,
135 .release_resources = rx51_lp5523_release,
136 .enable = rx51_lp5523_enable,
137};
138#endif
139
a24e61a9
KV
140static struct omap2_mcspi_device_config wl1251_mcspi_config = {
141 .turbo_mode = 0,
142 .single_channel = 1,
143};
144
03e11104
RQ
145static struct omap2_mcspi_device_config mipid_mcspi_config = {
146 .turbo_mode = 0,
147 .single_channel = 1,
148};
149
6996e7ff
RQ
150static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
151 .turbo_mode = 0,
152 .single_channel = 1,
153};
154
a24e61a9
KV
155static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
156 [RX51_SPI_WL1251] = {
157 .modalias = "wl1251",
158 .bus_num = 4,
159 .chip_select = 0,
160 .max_speed_hz = 48000000,
860fc976 161 .mode = SPI_MODE_3,
a24e61a9
KV
162 .controller_data = &wl1251_mcspi_config,
163 .platform_data = &wl1251_pdata,
164 },
03e11104
RQ
165 [RX51_SPI_MIPID] = {
166 .modalias = "acx565akm",
167 .bus_num = 1,
168 .chip_select = 2,
169 .max_speed_hz = 6000000,
170 .controller_data = &mipid_mcspi_config,
171 },
6996e7ff
RQ
172 [RX51_SPI_TSC2005] = {
173 .modalias = "tsc2005",
174 .bus_num = 1,
175 .chip_select = 0,
3dad5356 176 .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),
6996e7ff
RQ
177 .max_speed_hz = 6000000,
178 .controller_data = &tsc2005_mcspi_config,
3dad5356 179 .platform_data = &tsc2005_pdata,
6996e7ff 180 },
a24e61a9
KV
181};
182
10299e2e
KJ
183static void rx51_charger_set_power(bool on)
184{
185 gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
186}
187
188static struct isp1704_charger_data rx51_charger_data = {
189 .set_power = rx51_charger_set_power,
190};
191
fd0964c5 192static struct platform_device rx51_charger_device = {
10299e2e
KJ
193 .name = "isp1704_charger",
194 .dev = {
195 .platform_data = &rx51_charger_data,
196 },
fd0964c5
HK
197};
198
10299e2e
KJ
199static void __init rx51_charger_init(void)
200{
201 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
e5fe29c7 202 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
10299e2e
KJ
203
204 platform_device_register(&rx51_charger_device);
205}
206
f014ee32
JN
207#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
208
209#define RX51_GPIO_CAMERA_LENS_COVER 110
210#define RX51_GPIO_CAMERA_FOCUS 68
211#define RX51_GPIO_CAMERA_CAPTURE 69
212#define RX51_GPIO_KEYPAD_SLIDE 71
213#define RX51_GPIO_LOCK_BUTTON 113
214#define RX51_GPIO_PROXIMITY 89
215
216#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
217
218static struct gpio_keys_button rx51_gpio_keys[] = {
219 {
220 .desc = "Camera Lens Cover",
221 .type = EV_SW,
222 .code = SW_CAMERA_LENS_COVER,
223 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
224 .active_low = 1,
225 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
226 }, {
227 .desc = "Camera Focus",
228 .type = EV_KEY,
229 .code = KEY_CAMERA_FOCUS,
230 .gpio = RX51_GPIO_CAMERA_FOCUS,
231 .active_low = 1,
232 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
233 }, {
234 .desc = "Camera Capture",
235 .type = EV_KEY,
236 .code = KEY_CAMERA,
237 .gpio = RX51_GPIO_CAMERA_CAPTURE,
238 .active_low = 1,
239 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
240 }, {
241 .desc = "Lock Button",
242 .type = EV_KEY,
243 .code = KEY_SCREENLOCK,
244 .gpio = RX51_GPIO_LOCK_BUTTON,
245 .active_low = 1,
246 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
247 }, {
248 .desc = "Keypad Slide",
249 .type = EV_SW,
250 .code = SW_KEYPAD_SLIDE,
251 .gpio = RX51_GPIO_KEYPAD_SLIDE,
252 .active_low = 1,
253 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
254 }, {
255 .desc = "Proximity Sensor",
256 .type = EV_SW,
257 .code = SW_FRONT_PROXIMITY,
258 .gpio = RX51_GPIO_PROXIMITY,
259 .active_low = 0,
260 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
261 }
262};
263
264static struct gpio_keys_platform_data rx51_gpio_keys_data = {
265 .buttons = rx51_gpio_keys,
266 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
267};
268
269static struct platform_device rx51_gpio_keys_device = {
270 .name = "gpio-keys",
271 .id = -1,
272 .dev = {
273 .platform_data = &rx51_gpio_keys_data,
274 },
275};
276
277static void __init rx51_add_gpio_keys(void)
278{
279 platform_device_register(&rx51_gpio_keys_device);
280}
281#else
282static void __init rx51_add_gpio_keys(void)
283{
284}
285#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
286
bead4375 287static uint32_t board_keymap[] = {
3fea6026
DT
288 /*
289 * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row
290 * connected to the ground" matrix state.
291 */
ffe7f95b 292 KEY(0, 0, KEY_Q),
acf442dc
AK
293 KEY(0, 1, KEY_O),
294 KEY(0, 2, KEY_P),
295 KEY(0, 3, KEY_COMMA),
296 KEY(0, 4, KEY_BACKSPACE),
297 KEY(0, 6, KEY_A),
298 KEY(0, 7, KEY_S),
3fea6026 299
acf442dc 300 KEY(1, 0, KEY_W),
ffe7f95b 301 KEY(1, 1, KEY_D),
acf442dc
AK
302 KEY(1, 2, KEY_F),
303 KEY(1, 3, KEY_G),
304 KEY(1, 4, KEY_H),
305 KEY(1, 5, KEY_J),
306 KEY(1, 6, KEY_K),
307 KEY(1, 7, KEY_L),
3fea6026 308
acf442dc
AK
309 KEY(2, 0, KEY_E),
310 KEY(2, 1, KEY_DOT),
ffe7f95b 311 KEY(2, 2, KEY_UP),
acf442dc
AK
312 KEY(2, 3, KEY_ENTER),
313 KEY(2, 5, KEY_Z),
314 KEY(2, 6, KEY_X),
315 KEY(2, 7, KEY_C),
3fea6026
DT
316 KEY(2, 8, KEY_F9),
317
acf442dc
AK
318 KEY(3, 0, KEY_R),
319 KEY(3, 1, KEY_V),
320 KEY(3, 2, KEY_B),
ffe7f95b 321 KEY(3, 3, KEY_N),
acf442dc
AK
322 KEY(3, 4, KEY_M),
323 KEY(3, 5, KEY_SPACE),
324 KEY(3, 6, KEY_SPACE),
325 KEY(3, 7, KEY_LEFT),
3fea6026 326
acf442dc
AK
327 KEY(4, 0, KEY_T),
328 KEY(4, 1, KEY_DOWN),
329 KEY(4, 2, KEY_RIGHT),
ffe7f95b 330 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK
331 KEY(4, 5, KEY_RIGHTALT),
332 KEY(4, 6, KEY_LEFTSHIFT),
2e65a207 333 KEY(4, 8, KEY_F10),
3fea6026 334
acf442dc 335 KEY(5, 0, KEY_Y),
2e65a207 336 KEY(5, 8, KEY_F11),
3fea6026 337
acf442dc 338 KEY(6, 0, KEY_U),
3fea6026 339
acf442dc
AK
340 KEY(7, 0, KEY_I),
341 KEY(7, 1, KEY_F7),
342 KEY(7, 2, KEY_F8),
ffe7f95b
LL
343};
344
4f543332
TL
345static struct matrix_keymap_data board_map_data = {
346 .keymap = board_keymap,
347 .keymap_size = ARRAY_SIZE(board_keymap),
348};
349
ffe7f95b 350static struct twl4030_keypad_data rx51_kp_data = {
4f543332 351 .keymap_data = &board_map_data,
ffe7f95b
LL
352 .rows = 8,
353 .cols = 8,
ffe7f95b
LL
354 .rep = 1,
355};
356
ce6f0016
AH
357/* Enable input logic and pull all lines up when eMMC is on. */
358static struct omap_board_mux rx51_mmc2_on_mux[] = {
359 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
360 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
361 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
362 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
363 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
364 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
365 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
366 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
367 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
368 { .reg_offset = OMAP_MUX_TERMINATOR },
369};
370
371/* Disable input logic and pull all lines down when eMMC is off. */
372static struct omap_board_mux rx51_mmc2_off_mux[] = {
373 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
374 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
375 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
376 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
377 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
378 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
379 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
380 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
381 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
382 { .reg_offset = OMAP_MUX_TERMINATOR },
383};
384
112485e9
BC
385static struct omap_mux_partition *partition;
386
ce6f0016
AH
387/*
388 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
389 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
390 */
391static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
392{
393 if (power_on)
112485e9 394 omap_mux_write_array(partition, rx51_mmc2_on_mux);
ce6f0016 395 else
112485e9 396 omap_mux_write_array(partition, rx51_mmc2_off_mux);
ce6f0016
AH
397}
398
68ff0423 399static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL
400 {
401 .name = "external",
402 .mmc = 1,
3a63833e 403 .caps = MMC_CAP_4_BIT_DATA,
ffe7f95b
LL
404 .cover_only = true,
405 .gpio_cd = 160,
406 .gpio_wp = -EINVAL,
5e763d29 407 .power_saving = true,
ffe7f95b
LL
408 },
409 {
410 .name = "internal",
411 .mmc = 2,
3a63833e
SG
412 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
413 /* See also rx51_mmc2_remux */
ffe7f95b
LL
414 .gpio_cd = -EINVAL,
415 .gpio_wp = -EINVAL,
5e763d29
AH
416 .nonremovable = true,
417 .power_saving = true,
ce6f0016 418 .remux = rx51_mmc2_remux,
ffe7f95b
LL
419 },
420 {} /* Terminator */
421};
422
786b01a8
OD
423static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
424 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
425};
ffe7f95b 426
664a41b8
LT
427static struct regulator_consumer_supply rx51_vaux2_supply[] = {
428 REGULATOR_SUPPLY("vdds_csib", "omap3isp"),
429};
75ccf268 430
786b01a8
OD
431static struct regulator_consumer_supply rx51_vaux3_supply[] = {
432 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
433};
ffe7f95b 434
786b01a8
OD
435static struct regulator_consumer_supply rx51_vsim_supply[] = {
436 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
437};
ffe7f95b 438
4cfcaef1
JN
439static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
440 /* tlv320aic3x analog supplies */
5c7d9bbe
JN
441 REGULATOR_SUPPLY("AVDD", "2-0018"),
442 REGULATOR_SUPPLY("DRVDD", "2-0018"),
caeeb4aa
JN
443 REGULATOR_SUPPLY("AVDD", "2-0019"),
444 REGULATOR_SUPPLY("DRVDD", "2-0019"),
64d06691
JN
445 /* tpa6130a2 */
446 REGULATOR_SUPPLY("Vdd", "2-0060"),
4cfcaef1 447 /* Keep vmmc as last item. It is not iterated for newer boards */
0005ae73 448 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
4cfcaef1
JN
449};
450
451static struct regulator_consumer_supply rx51_vio_supplies[] = {
452 /* tlv320aic3x digital supplies */
5c7d9bbe
JN
453 REGULATOR_SUPPLY("IOVDD", "2-0018"),
454 REGULATOR_SUPPLY("DVDD", "2-0018"),
caeeb4aa
JN
455 REGULATOR_SUPPLY("IOVDD", "2-0019"),
456 REGULATOR_SUPPLY("DVDD", "2-0019"),
589541c0
JN
457 /* Si4713 IO supply */
458 REGULATOR_SUPPLY("vio", "2-0063"),
4cfcaef1
JN
459};
460
0581b52e 461static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
b5b9945b 462 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
589541c0
JN
463 /* Si4713 supply */
464 REGULATOR_SUPPLY("vdd", "2-0063"),
0581b52e
RQ
465};
466
ffe7f95b
LL
467static struct regulator_init_data rx51_vaux1 = {
468 .constraints = {
469 .name = "V28",
470 .min_uV = 2800000,
471 .max_uV = 2800000,
000d534e 472 .always_on = true, /* due battery cover sensor */
ffe7f95b
LL
473 .valid_modes_mask = REGULATOR_MODE_NORMAL
474 | REGULATOR_MODE_STANDBY,
475 .valid_ops_mask = REGULATOR_CHANGE_MODE
476 | REGULATOR_CHANGE_STATUS,
477 },
0581b52e
RQ
478 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
479 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL
480};
481
482static struct regulator_init_data rx51_vaux2 = {
483 .constraints = {
484 .name = "VCSI",
485 .min_uV = 1800000,
486 .max_uV = 1800000,
487 .valid_modes_mask = REGULATOR_MODE_NORMAL
488 | REGULATOR_MODE_STANDBY,
489 .valid_ops_mask = REGULATOR_CHANGE_MODE
490 | REGULATOR_CHANGE_STATUS,
491 },
664a41b8
LT
492 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply),
493 .consumer_supplies = rx51_vaux2_supply,
ffe7f95b
LL
494};
495
496/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 497static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL
498 .constraints = {
499 .name = "VCAM_DIG_18",
500 .min_uV = 1800000,
501 .max_uV = 1800000,
502 .apply_uV = true,
503 .valid_modes_mask = REGULATOR_MODE_NORMAL
504 | REGULATOR_MODE_STANDBY,
505 .valid_ops_mask = REGULATOR_CHANGE_MODE
506 | REGULATOR_CHANGE_STATUS,
507 },
508};
509
f52eeee8
AH
510static struct regulator_init_data rx51_vaux3_mmc = {
511 .constraints = {
512 .name = "VMMC2_30",
513 .min_uV = 2800000,
514 .max_uV = 3000000,
515 .apply_uV = true,
516 .valid_modes_mask = REGULATOR_MODE_NORMAL
517 | REGULATOR_MODE_STANDBY,
518 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
519 | REGULATOR_CHANGE_MODE
520 | REGULATOR_CHANGE_STATUS,
521 },
786b01a8
OD
522 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
523 .consumer_supplies = rx51_vaux3_supply,
f52eeee8
AH
524};
525
ffe7f95b
LL
526static struct regulator_init_data rx51_vaux4 = {
527 .constraints = {
528 .name = "VCAM_ANA_28",
529 .min_uV = 2800000,
530 .max_uV = 2800000,
531 .apply_uV = true,
532 .valid_modes_mask = REGULATOR_MODE_NORMAL
533 | REGULATOR_MODE_STANDBY,
534 .valid_ops_mask = REGULATOR_CHANGE_MODE
535 | REGULATOR_CHANGE_STATUS,
536 },
537};
538
539static struct regulator_init_data rx51_vmmc1 = {
540 .constraints = {
541 .min_uV = 1850000,
542 .max_uV = 3150000,
543 .valid_modes_mask = REGULATOR_MODE_NORMAL
544 | REGULATOR_MODE_STANDBY,
545 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
546 | REGULATOR_CHANGE_MODE
547 | REGULATOR_CHANGE_STATUS,
548 },
786b01a8
OD
549 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
550 .consumer_supplies = rx51_vmmc1_supply,
ffe7f95b
LL
551};
552
553static struct regulator_init_data rx51_vmmc2 = {
554 .constraints = {
f2add1de
JN
555 .name = "V28_A",
556 .min_uV = 2800000,
557 .max_uV = 3000000,
2827411e 558 .always_on = true, /* due VIO leak to AIC34 VDDs */
ffe7f95b
LL
559 .apply_uV = true,
560 .valid_modes_mask = REGULATOR_MODE_NORMAL
561 | REGULATOR_MODE_STANDBY,
562 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
563 | REGULATOR_CHANGE_MODE
564 | REGULATOR_CHANGE_STATUS,
565 },
4cfcaef1
JN
566 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
567 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL
568};
569
094fc559
KJ
570static struct regulator_init_data rx51_vpll1 = {
571 .constraints = {
572 .name = "VPLL",
573 .min_uV = 1800000,
574 .max_uV = 1800000,
575 .apply_uV = true,
576 .always_on = true,
577 .valid_modes_mask = REGULATOR_MODE_NORMAL
578 | REGULATOR_MODE_STANDBY,
579 .valid_ops_mask = REGULATOR_CHANGE_MODE,
580 },
581};
582
583static struct regulator_init_data rx51_vpll2 = {
584 .constraints = {
585 .name = "VSDI_CSI",
586 .min_uV = 1800000,
587 .max_uV = 1800000,
588 .apply_uV = true,
589 .always_on = true,
590 .valid_modes_mask = REGULATOR_MODE_NORMAL
591 | REGULATOR_MODE_STANDBY,
592 .valid_ops_mask = REGULATOR_CHANGE_MODE,
593 },
594};
595
ffe7f95b
LL
596static struct regulator_init_data rx51_vsim = {
597 .constraints = {
598 .name = "VMMC2_IO_18",
599 .min_uV = 1800000,
600 .max_uV = 1800000,
601 .apply_uV = true,
602 .valid_modes_mask = REGULATOR_MODE_NORMAL
603 | REGULATOR_MODE_STANDBY,
604 .valid_ops_mask = REGULATOR_CHANGE_MODE
605 | REGULATOR_CHANGE_STATUS,
606 },
786b01a8
OD
607 .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
608 .consumer_supplies = rx51_vsim_supply,
ffe7f95b
LL
609};
610
4cfcaef1
JN
611static struct regulator_init_data rx51_vio = {
612 .constraints = {
613 .min_uV = 1800000,
614 .max_uV = 1800000,
615 .valid_modes_mask = REGULATOR_MODE_NORMAL
616 | REGULATOR_MODE_STANDBY,
617 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
618 | REGULATOR_CHANGE_MODE
619 | REGULATOR_CHANGE_STATUS,
620 },
621 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
622 .consumer_supplies = rx51_vio_supplies,
623};
624
094fc559
KJ
625static struct regulator_init_data rx51_vintana1 = {
626 .constraints = {
627 .name = "VINTANA1",
628 .min_uV = 1500000,
629 .max_uV = 1500000,
630 .always_on = true,
631 .valid_modes_mask = REGULATOR_MODE_NORMAL
632 | REGULATOR_MODE_STANDBY,
633 .valid_ops_mask = REGULATOR_CHANGE_MODE,
634 },
635};
636
637static struct regulator_init_data rx51_vintana2 = {
638 .constraints = {
639 .name = "VINTANA2",
640 .min_uV = 2750000,
641 .max_uV = 2750000,
642 .apply_uV = true,
643 .always_on = true,
644 .valid_modes_mask = REGULATOR_MODE_NORMAL
645 | REGULATOR_MODE_STANDBY,
646 .valid_ops_mask = REGULATOR_CHANGE_MODE,
647 },
648};
649
650static struct regulator_init_data rx51_vintdig = {
651 .constraints = {
652 .name = "VINTDIG",
653 .min_uV = 1500000,
654 .max_uV = 1500000,
655 .always_on = true,
656 .valid_modes_mask = REGULATOR_MODE_NORMAL
657 | REGULATOR_MODE_STANDBY,
658 .valid_ops_mask = REGULATOR_CHANGE_MODE,
659 },
660};
661
589541c0
JN
662static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = {
663 .gpio_reset = RX51_FMTX_RESET_GPIO,
664};
665
666static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = {
667 I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH),
668 .platform_data = &rx51_si4713_i2c_data,
669};
670
671static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = {
672 .i2c_bus = 2,
673 .subdev_board_info = &rx51_si4713_board_info,
674};
675
07ad6ab3 676static struct platform_device rx51_si4713_dev = {
589541c0
JN
677 .name = "radio-si4713",
678 .id = -1,
679 .dev = {
680 .platform_data = &rx51_si4713_data,
681 },
682};
683
684static __init void rx51_init_si4713(void)
685{
686 int err;
687
688 err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq");
689 if (err) {
690 printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err);
691 return;
692 }
693 rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ);
694 platform_device_register(&rx51_si4713_dev);
695}
696
ffe7f95b
LL
697static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
698{
699 /* FIXME this gpio setup is just a placeholder for now */
bc593f5d 700 gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm");
c0ad4fac 701 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en");
ffe7f95b 702
ffe7f95b
LL
703 return 0;
704}
705
706static struct twl4030_gpio_platform_data rx51_gpio_data = {
707 .gpio_base = OMAP_MAX_GPIO_LINES,
708 .irq_base = TWL4030_GPIO_IRQ_BASE,
709 .irq_end = TWL4030_GPIO_IRQ_END,
710 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
711 | BIT(4) | BIT(5)
712 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
713 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
714 | BIT(16) | BIT(17) ,
715 .setup = rx51_twlgpio_setup,
716};
717
9312fffb
AK
718static struct twl4030_ins sleep_on_seq[] __initdata = {
719/*
3c684e84 720 * Turn off everything
9312fffb 721 */
3c684e84 722 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK
723};
724
725static struct twl4030_script sleep_on_script __initdata = {
726 .script = sleep_on_seq,
727 .size = ARRAY_SIZE(sleep_on_seq),
728 .flags = TWL4030_SLEEP_SCRIPT,
729};
730
731static struct twl4030_ins wakeup_seq[] __initdata = {
732/*
3c684e84 733 * Reenable everything
9312fffb 734 */
3c684e84 735 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK
736};
737
738static struct twl4030_script wakeup_script __initdata = {
739 .script = wakeup_seq,
740 .size = ARRAY_SIZE(wakeup_seq),
741 .flags = TWL4030_WAKEUP12_SCRIPT,
742};
743
744static struct twl4030_ins wakeup_p3_seq[] __initdata = {
745/*
3c684e84 746 * Reenable everything
9312fffb 747 */
3c684e84 748 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK
749};
750
751static struct twl4030_script wakeup_p3_script __initdata = {
752 .script = wakeup_p3_seq,
753 .size = ARRAY_SIZE(wakeup_p3_seq),
754 .flags = TWL4030_WAKEUP3_SCRIPT,
755};
756
757static struct twl4030_ins wrst_seq[] __initdata = {
758/*
759 * Reset twl4030.
760 * Reset VDD1 regulator.
761 * Reset VDD2 regulator.
762 * Reset VPLL1 regulator.
763 * Enable sysclk output.
764 * Reenable twl4030.
765 */
766 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
767 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
768 0x13},
9312fffb
AK
769 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
770 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
771 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
772 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 773 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
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AK
774 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
775};
776
777static struct twl4030_script wrst_script __initdata = {
778 .script = wrst_seq,
779 .size = ARRAY_SIZE(wrst_seq),
780 .flags = TWL4030_WRST_SCRIPT,
781};
782
783static struct twl4030_script *twl4030_scripts[] __initdata = {
784 /* wakeup12 script should be loaded before sleep script, otherwise a
785 board might hit retention before loading of wakeup script is
786 completed. This can cause boot failures depending on timing issues.
787 */
788 &wakeup_script,
789 &sleep_on_script,
790 &wakeup_p3_script,
791 &wrst_script,
792};
793
794static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK
795 { .resource = RES_VDD1, .devgroup = -1,
796 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
797 .remap_sleep = RES_STATE_OFF
798 },
799 { .resource = RES_VDD2, .devgroup = -1,
800 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
801 .remap_sleep = RES_STATE_OFF
802 },
803 { .resource = RES_VPLL1, .devgroup = -1,
804 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
805 .remap_sleep = RES_STATE_OFF
806 },
807 { .resource = RES_VPLL2, .devgroup = -1,
808 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
809 },
810 { .resource = RES_VAUX1, .devgroup = -1,
811 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
812 },
813 { .resource = RES_VAUX2, .devgroup = -1,
814 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
815 },
816 { .resource = RES_VAUX3, .devgroup = -1,
817 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
818 },
819 { .resource = RES_VAUX4, .devgroup = -1,
820 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
821 },
822 { .resource = RES_VMMC1, .devgroup = -1,
823 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
824 },
825 { .resource = RES_VMMC2, .devgroup = -1,
826 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
827 },
828 { .resource = RES_VDAC, .devgroup = -1,
829 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
830 },
831 { .resource = RES_VSIM, .devgroup = -1,
832 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
833 },
834 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
835 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
836 },
837 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
838 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
839 },
840 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
841 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
842 },
843 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
844 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
845 },
846 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
847 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
848 },
849 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
850 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
851 },
852 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
853 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
854 },
855 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
856 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
857 },
858 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
859 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
860 },
861 { .resource = RES_32KCLKOUT, .devgroup = -1,
862 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
863 },
864 { .resource = RES_RESET, .devgroup = -1,
865 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
866 },
d7ac829f 867 { .resource = RES_MAIN_REF, .devgroup = -1,
3c684e84
AK
868 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
869 },
9312fffb
AK
870 { 0, 0},
871};
872
873static struct twl4030_power_data rx51_t2scripts_data __initdata = {
874 .scripts = twl4030_scripts,
875 .num = ARRAY_SIZE(twl4030_scripts),
876 .resource_config = twl4030_rconfig,
877};
878
4ae6df5e 879struct twl4030_vibra_data rx51_vibra_data __initdata = {
b7a834cc
IK
880 .coexist = 0,
881};
882
4ae6df5e 883struct twl4030_audio_data rx51_audio_data __initdata = {
b7a834cc
IK
884 .audio_mclk = 26000000,
885 .vibra = &rx51_vibra_data,
886};
9312fffb 887
9312fffb 888static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL
889 /* platform_data for children goes here */
890 .gpio = &rx51_gpio_data,
891 .keypad = &rx51_kp_data,
9312fffb 892 .power = &rx51_t2scripts_data,
4ae6df5e 893 .audio = &rx51_audio_data,
ffe7f95b
LL
894
895 .vaux1 = &rx51_vaux1,
896 .vaux2 = &rx51_vaux2,
ffe7f95b
LL
897 .vaux4 = &rx51_vaux4,
898 .vmmc1 = &rx51_vmmc1,
094fc559
KJ
899 .vpll1 = &rx51_vpll1,
900 .vpll2 = &rx51_vpll2,
ffe7f95b 901 .vsim = &rx51_vsim,
094fc559
KJ
902 .vintana1 = &rx51_vintana1,
903 .vintana2 = &rx51_vintana2,
904 .vintdig = &rx51_vintdig,
4cfcaef1 905 .vio = &rx51_vio,
ffe7f95b
LL
906};
907
f0c61d3d 908static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = {
64d06691
JN
909 .power_gpio = 98,
910};
911
f0fba2ad
LG
912/* Audio setup data */
913static struct aic3x_setup_data rx51_aic34_setup = {
914 .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED,
915 .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT,
916};
917
e4862f2f 918static struct aic3x_pdata rx51_aic3x_data = {
f0fba2ad
LG
919 .setup = &rx51_aic34_setup,
920 .gpio_reset = 60,
921};
922
caeeb4aa
JN
923static struct aic3x_pdata rx51_aic3x_data2 = {
924 .gpio_reset = 60,
925};
926
dabe929b
JN
927static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
928 {
929 I2C_BOARD_INFO("tlv320aic3x", 0x18),
87581fd4 930 .platform_data = &rx51_aic3x_data,
dabe929b 931 },
caeeb4aa
JN
932 {
933 I2C_BOARD_INFO("tlv320aic3x", 0x19),
934 .platform_data = &rx51_aic3x_data2,
935 },
70b5d737
MN
936#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
937 {
938 I2C_BOARD_INFO("tsl2563", 0x29),
939 .platform_data = &rx51_tsl2563_platform_data,
940 },
eeada9e8
AP
941#endif
942#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
943 {
944 I2C_BOARD_INFO("lp5523", 0x32),
945 .platform_data = &rx51_lp5523_platform_data,
946 },
70b5d737 947#endif
d77711aa
PR
948 {
949 I2C_BOARD_INFO("bq27200", 0x55),
950 },
64d06691
JN
951 {
952 I2C_BOARD_INFO("tpa6130a2", 0x60),
953 .platform_data = &rx51_tpa6130a2_data,
954 }
dabe929b
JN
955};
956
ffe7f95b
LL
957static int __init rx51_i2c_init(void)
958{
f52eeee8 959 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 960 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 961 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN
962 /* Only older boards use VMMC2 for internal MMC */
963 rx51_vmmc2.num_consumer_supplies--;
964 } else {
f52eeee8 965 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 966 }
4cfcaef1 967 rx51_twldata.vmmc2 = &rx51_vmmc2;
827ed9ae 968 omap3_pmic_get_config(&rx51_twldata,
b252b0ef
PU
969 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
970 TWL_COMMON_REGULATOR_VDAC);
971
972 rx51_twldata.vdac->constraints.apply_uV = true;
973 rx51_twldata.vdac->constraints.name = "VDAC";
974
fbd8071c 975 omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
dabe929b
JN
976 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
977 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
ffe7f95b
LL
978 omap_register_i2c_bus(3, 400, NULL, 0);
979 return 0;
980}
981
aa62e90f
JY
982#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
983 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
984
985static struct mtd_partition onenand_partitions[] = {
986 {
987 .name = "bootloader",
988 .offset = 0,
989 .size = 0x20000,
990 .mask_flags = MTD_WRITEABLE, /* Force read-only */
991 },
992 {
993 .name = "config",
994 .offset = MTDPART_OFS_APPEND,
995 .size = 0x60000,
996 },
997 {
998 .name = "log",
999 .offset = MTDPART_OFS_APPEND,
1000 .size = 0x40000,
1001 },
1002 {
1003 .name = "kernel",
1004 .offset = MTDPART_OFS_APPEND,
1005 .size = 0x200000,
1006 },
1007 {
1008 .name = "initfs",
1009 .offset = MTDPART_OFS_APPEND,
1010 .size = 0x200000,
1011 },
1012 {
1013 .name = "rootfs",
1014 .offset = MTDPART_OFS_APPEND,
1015 .size = MTDPART_SIZ_FULL,
1016 },
1017};
1018
5403187f
AK
1019static struct omap_onenand_platform_data board_onenand_data[] = {
1020 {
1021 .cs = 0,
1022 .gpio_irq = 65,
1023 .parts = onenand_partitions,
1024 .nr_parts = ARRAY_SIZE(onenand_partitions),
1025 .flags = ONENAND_SYNC_READWRITE,
1026 }
aa62e90f 1027};
aa62e90f 1028#endif
ffe7f95b 1029
1a48e157
TL
1030#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1031
1032static struct omap_smc91x_platform_data board_smc91x_data = {
1033 .cs = 1,
1034 .gpio_irq = 54,
1035 .gpio_pwrdwn = 86,
1036 .gpio_reset = 164,
1037 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
1038};
1039
1040static void __init board_smc91x_init(void)
1041{
4896e394
TL
1042 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
1043 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
1044 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
1a48e157
TL
1045
1046 gpmc_smc91x_init(&board_smc91x_data);
1047}
1048
1049#else
1050
1051static inline void board_smc91x_init(void)
1052{
1053}
1054
1055#endif
1056
a24e61a9
KV
1057static void rx51_wl1251_set_power(bool enable)
1058{
1059 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
1060}
1061
bc593f5d
IG
1062static struct gpio rx51_wl1251_gpios[] __initdata = {
1063 { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" },
1064 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" },
1065};
1066
a24e61a9
KV
1067static void __init rx51_init_wl1251(void)
1068{
1069 int irq, ret;
1070
bc593f5d
IG
1071 ret = gpio_request_array(rx51_wl1251_gpios,
1072 ARRAY_SIZE(rx51_wl1251_gpios));
a24e61a9
KV
1073 if (ret < 0)
1074 goto error;
1075
a24e61a9
KV
1076 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
1077 if (irq < 0)
1078 goto err_irq;
1079
1080 wl1251_pdata.set_power = rx51_wl1251_set_power;
1081 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
1082
1083 return;
1084
1085err_irq:
1086 gpio_free(RX51_WL1251_IRQ_GPIO);
a24e61a9 1087 gpio_free(RX51_WL1251_POWER_GPIO);
a24e61a9
KV
1088error:
1089 printk(KERN_ERR "wl1251 board initialisation failed\n");
1090 wl1251_pdata.set_power = NULL;
1091
1092 /*
1093 * Now rx51_peripherals_spi_board_info[1].irq is zero and
1094 * set_power is null, and wl1251_probe() will fail.
1095 */
1096}
1097
3dad5356
AK
1098static struct tsc2005_platform_data tsc2005_pdata = {
1099 .ts_pressure_max = 2048,
1100 .ts_pressure_fudge = 2,
1101 .ts_x_max = 4096,
1102 .ts_x_fudge = 4,
1103 .ts_y_max = 4096,
1104 .ts_y_fudge = 7,
1105 .ts_x_plate_ohm = 280,
1106 .esd_timeout_ms = 8000,
1107};
1108
1109static void rx51_tsc2005_set_reset(bool enable)
1110{
1111 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1112}
1113
1114static void __init rx51_init_tsc2005(void)
1115{
1116 int r;
1117
1118 r = gpio_request_one(RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ");
1119 if (r < 0) {
1120 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 IRQ");
1121 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq = 0;
1122 }
1123
1124 r = gpio_request_one(RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH,
1125 "tsc2005 reset");
1126 if (r >= 0) {
1127 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
1128 } else {
1129 printk(KERN_ERR "unable to get %s GPIO\n", "tsc2005 reset");
1130 tsc2005_pdata.esd_timeout_ms = 0;
1131 }
1132}
1133
ffe7f95b
LL
1134void __init rx51_peripherals_init(void)
1135{
ffe7f95b 1136 rx51_i2c_init();
094fc559 1137 regulator_has_full_constraints();
5403187f 1138 gpmc_onenand_init(board_onenand_data);
1a48e157 1139 board_smc91x_init();
f014ee32 1140 rx51_add_gpio_keys();
a24e61a9 1141 rx51_init_wl1251();
3dad5356 1142 rx51_init_tsc2005();
589541c0 1143 rx51_init_si4713();
a24e61a9
KV
1144 spi_register_board_info(rx51_peripherals_spi_board_info,
1145 ARRAY_SIZE(rx51_peripherals_spi_board_info));
112485e9
BC
1146
1147 partition = omap_mux_get("core");
1148 if (partition)
1149 omap2_hsmmc_init(mmc);
1150
10299e2e 1151 rx51_charger_init();
ffe7f95b
LL
1152}
1153
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