Commit | Line | Data |
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ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
6135434a | 15 | #include <linux/input/matrix_keypad.h> |
ffe7f95b | 16 | #include <linux/spi/spi.h> |
a24e61a9 | 17 | #include <linux/spi/wl12xx.h> |
ffe7f95b | 18 | #include <linux/i2c.h> |
ebeb53e1 | 19 | #include <linux/i2c/twl.h> |
ffe7f95b LL |
20 | #include <linux/clk.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/regulator/machine.h> | |
23 | #include <linux/gpio.h> | |
f014ee32 | 24 | #include <linux/gpio_keys.h> |
5e763d29 | 25 | #include <linux/mmc/host.h> |
ffe7f95b | 26 | |
ce491cf8 TL |
27 | #include <plat/mcspi.h> |
28 | #include <plat/mux.h> | |
29 | #include <plat/board.h> | |
30 | #include <plat/common.h> | |
31 | #include <plat/dma.h> | |
32 | #include <plat/gpmc.h> | |
ce491cf8 TL |
33 | #include <plat/onenand.h> |
34 | #include <plat/gpmc-smc91x.h> | |
ffe7f95b | 35 | |
4896e394 | 36 | #include "mux.h" |
d02a900b | 37 | #include "hsmmc.h" |
ffe7f95b | 38 | |
f52eeee8 AH |
39 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
40 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
41 | ||
a24e61a9 KV |
42 | #define RX51_WL1251_POWER_GPIO 87 |
43 | #define RX51_WL1251_IRQ_GPIO 42 | |
44 | ||
45 | /* list all spi devices here */ | |
46 | enum { | |
47 | RX51_SPI_WL1251, | |
48 | }; | |
49 | ||
50 | static struct wl12xx_platform_data wl1251_pdata; | |
51 | ||
52 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { | |
53 | .turbo_mode = 0, | |
54 | .single_channel = 1, | |
55 | }; | |
56 | ||
57 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { | |
58 | [RX51_SPI_WL1251] = { | |
59 | .modalias = "wl1251", | |
60 | .bus_num = 4, | |
61 | .chip_select = 0, | |
62 | .max_speed_hz = 48000000, | |
860fc976 | 63 | .mode = SPI_MODE_3, |
a24e61a9 KV |
64 | .controller_data = &wl1251_mcspi_config, |
65 | .platform_data = &wl1251_pdata, | |
66 | }, | |
67 | }; | |
68 | ||
f014ee32 JN |
69 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
70 | ||
71 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | |
72 | #define RX51_GPIO_CAMERA_FOCUS 68 | |
73 | #define RX51_GPIO_CAMERA_CAPTURE 69 | |
74 | #define RX51_GPIO_KEYPAD_SLIDE 71 | |
75 | #define RX51_GPIO_LOCK_BUTTON 113 | |
76 | #define RX51_GPIO_PROXIMITY 89 | |
77 | ||
78 | #define RX51_GPIO_DEBOUNCE_TIMEOUT 10 | |
79 | ||
80 | static struct gpio_keys_button rx51_gpio_keys[] = { | |
81 | { | |
82 | .desc = "Camera Lens Cover", | |
83 | .type = EV_SW, | |
84 | .code = SW_CAMERA_LENS_COVER, | |
85 | .gpio = RX51_GPIO_CAMERA_LENS_COVER, | |
86 | .active_low = 1, | |
87 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
88 | }, { | |
89 | .desc = "Camera Focus", | |
90 | .type = EV_KEY, | |
91 | .code = KEY_CAMERA_FOCUS, | |
92 | .gpio = RX51_GPIO_CAMERA_FOCUS, | |
93 | .active_low = 1, | |
94 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
95 | }, { | |
96 | .desc = "Camera Capture", | |
97 | .type = EV_KEY, | |
98 | .code = KEY_CAMERA, | |
99 | .gpio = RX51_GPIO_CAMERA_CAPTURE, | |
100 | .active_low = 1, | |
101 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
102 | }, { | |
103 | .desc = "Lock Button", | |
104 | .type = EV_KEY, | |
105 | .code = KEY_SCREENLOCK, | |
106 | .gpio = RX51_GPIO_LOCK_BUTTON, | |
107 | .active_low = 1, | |
108 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
109 | }, { | |
110 | .desc = "Keypad Slide", | |
111 | .type = EV_SW, | |
112 | .code = SW_KEYPAD_SLIDE, | |
113 | .gpio = RX51_GPIO_KEYPAD_SLIDE, | |
114 | .active_low = 1, | |
115 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
116 | }, { | |
117 | .desc = "Proximity Sensor", | |
118 | .type = EV_SW, | |
119 | .code = SW_FRONT_PROXIMITY, | |
120 | .gpio = RX51_GPIO_PROXIMITY, | |
121 | .active_low = 0, | |
122 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
123 | } | |
124 | }; | |
125 | ||
126 | static struct gpio_keys_platform_data rx51_gpio_keys_data = { | |
127 | .buttons = rx51_gpio_keys, | |
128 | .nbuttons = ARRAY_SIZE(rx51_gpio_keys), | |
129 | }; | |
130 | ||
131 | static struct platform_device rx51_gpio_keys_device = { | |
132 | .name = "gpio-keys", | |
133 | .id = -1, | |
134 | .dev = { | |
135 | .platform_data = &rx51_gpio_keys_data, | |
136 | }, | |
137 | }; | |
138 | ||
139 | static void __init rx51_add_gpio_keys(void) | |
140 | { | |
141 | platform_device_register(&rx51_gpio_keys_device); | |
142 | } | |
143 | #else | |
144 | static void __init rx51_add_gpio_keys(void) | |
145 | { | |
146 | } | |
147 | #endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */ | |
148 | ||
4f543332 | 149 | static int board_keymap[] = { |
ffe7f95b | 150 | KEY(0, 0, KEY_Q), |
acf442dc AK |
151 | KEY(0, 1, KEY_O), |
152 | KEY(0, 2, KEY_P), | |
153 | KEY(0, 3, KEY_COMMA), | |
154 | KEY(0, 4, KEY_BACKSPACE), | |
155 | KEY(0, 6, KEY_A), | |
156 | KEY(0, 7, KEY_S), | |
157 | KEY(1, 0, KEY_W), | |
ffe7f95b | 158 | KEY(1, 1, KEY_D), |
acf442dc AK |
159 | KEY(1, 2, KEY_F), |
160 | KEY(1, 3, KEY_G), | |
161 | KEY(1, 4, KEY_H), | |
162 | KEY(1, 5, KEY_J), | |
163 | KEY(1, 6, KEY_K), | |
164 | KEY(1, 7, KEY_L), | |
165 | KEY(2, 0, KEY_E), | |
166 | KEY(2, 1, KEY_DOT), | |
ffe7f95b | 167 | KEY(2, 2, KEY_UP), |
acf442dc AK |
168 | KEY(2, 3, KEY_ENTER), |
169 | KEY(2, 5, KEY_Z), | |
170 | KEY(2, 6, KEY_X), | |
171 | KEY(2, 7, KEY_C), | |
172 | KEY(3, 0, KEY_R), | |
173 | KEY(3, 1, KEY_V), | |
174 | KEY(3, 2, KEY_B), | |
ffe7f95b | 175 | KEY(3, 3, KEY_N), |
acf442dc AK |
176 | KEY(3, 4, KEY_M), |
177 | KEY(3, 5, KEY_SPACE), | |
178 | KEY(3, 6, KEY_SPACE), | |
179 | KEY(3, 7, KEY_LEFT), | |
180 | KEY(4, 0, KEY_T), | |
181 | KEY(4, 1, KEY_DOWN), | |
182 | KEY(4, 2, KEY_RIGHT), | |
ffe7f95b | 183 | KEY(4, 4, KEY_LEFTCTRL), |
acf442dc AK |
184 | KEY(4, 5, KEY_RIGHTALT), |
185 | KEY(4, 6, KEY_LEFTSHIFT), | |
186 | KEY(5, 0, KEY_Y), | |
187 | KEY(6, 0, KEY_U), | |
188 | KEY(7, 0, KEY_I), | |
189 | KEY(7, 1, KEY_F7), | |
190 | KEY(7, 2, KEY_F8), | |
191 | KEY(0xff, 2, KEY_F9), | |
192 | KEY(0xff, 4, KEY_F10), | |
193 | KEY(0xff, 5, KEY_F11), | |
ffe7f95b LL |
194 | }; |
195 | ||
4f543332 TL |
196 | static struct matrix_keymap_data board_map_data = { |
197 | .keymap = board_keymap, | |
198 | .keymap_size = ARRAY_SIZE(board_keymap), | |
199 | }; | |
200 | ||
ffe7f95b | 201 | static struct twl4030_keypad_data rx51_kp_data = { |
4f543332 | 202 | .keymap_data = &board_map_data, |
ffe7f95b LL |
203 | .rows = 8, |
204 | .cols = 8, | |
ffe7f95b LL |
205 | .rep = 1, |
206 | }; | |
207 | ||
ffe7f95b LL |
208 | static struct twl4030_madc_platform_data rx51_madc_data = { |
209 | .irq_line = 1, | |
210 | }; | |
211 | ||
ce6f0016 AH |
212 | /* Enable input logic and pull all lines up when eMMC is on. */ |
213 | static struct omap_board_mux rx51_mmc2_on_mux[] = { | |
214 | OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
215 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
216 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
217 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
218 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
219 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
220 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
221 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
222 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
223 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
224 | }; | |
225 | ||
226 | /* Disable input logic and pull all lines down when eMMC is off. */ | |
227 | static struct omap_board_mux rx51_mmc2_off_mux[] = { | |
228 | OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
229 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
230 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
231 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
232 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
233 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
234 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
235 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
236 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
237 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
238 | }; | |
239 | ||
240 | /* | |
241 | * Current flows to eMMC when eMMC is off and the data lines are pulled up, | |
242 | * so pull them down. N.B. we pull 8 lines because we are using 8 lines. | |
243 | */ | |
244 | static void rx51_mmc2_remux(struct device *dev, int slot, int power_on) | |
245 | { | |
246 | if (power_on) | |
247 | omap_mux_write_array(rx51_mmc2_on_mux); | |
248 | else | |
249 | omap_mux_write_array(rx51_mmc2_off_mux); | |
250 | } | |
251 | ||
68ff0423 | 252 | static struct omap2_hsmmc_info mmc[] __initdata = { |
ffe7f95b LL |
253 | { |
254 | .name = "external", | |
255 | .mmc = 1, | |
256 | .wires = 4, | |
257 | .cover_only = true, | |
258 | .gpio_cd = 160, | |
259 | .gpio_wp = -EINVAL, | |
5e763d29 | 260 | .power_saving = true, |
ffe7f95b LL |
261 | }, |
262 | { | |
263 | .name = "internal", | |
264 | .mmc = 2, | |
ce6f0016 | 265 | .wires = 8, /* See also rx51_mmc2_remux */ |
ffe7f95b LL |
266 | .gpio_cd = -EINVAL, |
267 | .gpio_wp = -EINVAL, | |
5e763d29 AH |
268 | .nonremovable = true, |
269 | .power_saving = true, | |
ce6f0016 | 270 | .remux = rx51_mmc2_remux, |
ffe7f95b LL |
271 | }, |
272 | {} /* Terminator */ | |
273 | }; | |
274 | ||
275 | static struct regulator_consumer_supply rx51_vmmc1_supply = { | |
68ff0423 AH |
276 | .supply = "vmmc", |
277 | .dev_name = "mmci-omap-hs.0", | |
ffe7f95b LL |
278 | }; |
279 | ||
280 | static struct regulator_consumer_supply rx51_vmmc2_supply = { | |
68ff0423 AH |
281 | .supply = "vmmc", |
282 | .dev_name = "mmci-omap-hs.1", | |
ffe7f95b LL |
283 | }; |
284 | ||
285 | static struct regulator_consumer_supply rx51_vsim_supply = { | |
68ff0423 AH |
286 | .supply = "vmmc_aux", |
287 | .dev_name = "mmci-omap-hs.1", | |
ffe7f95b LL |
288 | }; |
289 | ||
290 | static struct regulator_init_data rx51_vaux1 = { | |
291 | .constraints = { | |
292 | .name = "V28", | |
293 | .min_uV = 2800000, | |
294 | .max_uV = 2800000, | |
295 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
296 | | REGULATOR_MODE_STANDBY, | |
297 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
298 | | REGULATOR_CHANGE_STATUS, | |
299 | }, | |
300 | }; | |
301 | ||
302 | static struct regulator_init_data rx51_vaux2 = { | |
303 | .constraints = { | |
304 | .name = "VCSI", | |
305 | .min_uV = 1800000, | |
306 | .max_uV = 1800000, | |
307 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
308 | | REGULATOR_MODE_STANDBY, | |
309 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
310 | | REGULATOR_CHANGE_STATUS, | |
311 | }, | |
312 | }; | |
313 | ||
314 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 315 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
316 | .constraints = { |
317 | .name = "VCAM_DIG_18", | |
318 | .min_uV = 1800000, | |
319 | .max_uV = 1800000, | |
320 | .apply_uV = true, | |
321 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
322 | | REGULATOR_MODE_STANDBY, | |
323 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
324 | | REGULATOR_CHANGE_STATUS, | |
325 | }, | |
326 | }; | |
327 | ||
f52eeee8 AH |
328 | static struct regulator_init_data rx51_vaux3_mmc = { |
329 | .constraints = { | |
330 | .name = "VMMC2_30", | |
331 | .min_uV = 2800000, | |
332 | .max_uV = 3000000, | |
333 | .apply_uV = true, | |
334 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
335 | | REGULATOR_MODE_STANDBY, | |
336 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
337 | | REGULATOR_CHANGE_MODE | |
338 | | REGULATOR_CHANGE_STATUS, | |
339 | }, | |
340 | .num_consumer_supplies = 1, | |
341 | .consumer_supplies = &rx51_vmmc2_supply, | |
342 | }; | |
343 | ||
ffe7f95b LL |
344 | static struct regulator_init_data rx51_vaux4 = { |
345 | .constraints = { | |
346 | .name = "VCAM_ANA_28", | |
347 | .min_uV = 2800000, | |
348 | .max_uV = 2800000, | |
349 | .apply_uV = true, | |
350 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
351 | | REGULATOR_MODE_STANDBY, | |
352 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
353 | | REGULATOR_CHANGE_STATUS, | |
354 | }, | |
355 | }; | |
356 | ||
357 | static struct regulator_init_data rx51_vmmc1 = { | |
358 | .constraints = { | |
359 | .min_uV = 1850000, | |
360 | .max_uV = 3150000, | |
361 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
362 | | REGULATOR_MODE_STANDBY, | |
363 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
364 | | REGULATOR_CHANGE_MODE | |
365 | | REGULATOR_CHANGE_STATUS, | |
366 | }, | |
367 | .num_consumer_supplies = 1, | |
368 | .consumer_supplies = &rx51_vmmc1_supply, | |
369 | }; | |
370 | ||
371 | static struct regulator_init_data rx51_vmmc2 = { | |
372 | .constraints = { | |
373 | .name = "VMMC2_30", | |
374 | .min_uV = 1850000, | |
375 | .max_uV = 3150000, | |
376 | .apply_uV = true, | |
377 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
378 | | REGULATOR_MODE_STANDBY, | |
379 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
380 | | REGULATOR_CHANGE_MODE | |
381 | | REGULATOR_CHANGE_STATUS, | |
382 | }, | |
383 | .num_consumer_supplies = 1, | |
384 | .consumer_supplies = &rx51_vmmc2_supply, | |
385 | }; | |
386 | ||
387 | static struct regulator_init_data rx51_vsim = { | |
388 | .constraints = { | |
389 | .name = "VMMC2_IO_18", | |
390 | .min_uV = 1800000, | |
391 | .max_uV = 1800000, | |
392 | .apply_uV = true, | |
393 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
394 | | REGULATOR_MODE_STANDBY, | |
395 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
396 | | REGULATOR_CHANGE_STATUS, | |
397 | }, | |
398 | .num_consumer_supplies = 1, | |
399 | .consumer_supplies = &rx51_vsim_supply, | |
400 | }; | |
401 | ||
402 | static struct regulator_init_data rx51_vdac = { | |
403 | .constraints = { | |
404 | .min_uV = 1800000, | |
405 | .max_uV = 1800000, | |
406 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
407 | | REGULATOR_MODE_STANDBY, | |
408 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
409 | | REGULATOR_CHANGE_MODE | |
410 | | REGULATOR_CHANGE_STATUS, | |
411 | }, | |
412 | }; | |
413 | ||
414 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) | |
415 | { | |
416 | /* FIXME this gpio setup is just a placeholder for now */ | |
417 | gpio_request(gpio + 6, "backlight_pwm"); | |
418 | gpio_direction_output(gpio + 6, 0); | |
419 | gpio_request(gpio + 7, "speaker_en"); | |
420 | gpio_direction_output(gpio + 7, 1); | |
421 | ||
ffe7f95b LL |
422 | return 0; |
423 | } | |
424 | ||
425 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
426 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
427 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
428 | .irq_end = TWL4030_GPIO_IRQ_END, | |
429 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) | |
430 | | BIT(4) | BIT(5) | |
431 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
432 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
433 | | BIT(16) | BIT(17) , | |
434 | .setup = rx51_twlgpio_setup, | |
435 | }; | |
436 | ||
dfc27b34 RQ |
437 | static struct twl4030_usb_data rx51_usb_data = { |
438 | .usb_mode = T2_USB_MODE_ULPI, | |
439 | }; | |
440 | ||
9312fffb AK |
441 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
442 | /* | |
3c684e84 | 443 | * Turn off everything |
9312fffb | 444 | */ |
3c684e84 | 445 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2}, |
9312fffb AK |
446 | }; |
447 | ||
448 | static struct twl4030_script sleep_on_script __initdata = { | |
449 | .script = sleep_on_seq, | |
450 | .size = ARRAY_SIZE(sleep_on_seq), | |
451 | .flags = TWL4030_SLEEP_SCRIPT, | |
452 | }; | |
453 | ||
454 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
455 | /* | |
3c684e84 | 456 | * Reenable everything |
9312fffb | 457 | */ |
3c684e84 | 458 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
459 | }; |
460 | ||
461 | static struct twl4030_script wakeup_script __initdata = { | |
462 | .script = wakeup_seq, | |
463 | .size = ARRAY_SIZE(wakeup_seq), | |
464 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
465 | }; | |
466 | ||
467 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
468 | /* | |
3c684e84 | 469 | * Reenable everything |
9312fffb | 470 | */ |
3c684e84 | 471 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
472 | }; |
473 | ||
474 | static struct twl4030_script wakeup_p3_script __initdata = { | |
475 | .script = wakeup_p3_seq, | |
476 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
477 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
478 | }; | |
479 | ||
480 | static struct twl4030_ins wrst_seq[] __initdata = { | |
481 | /* | |
482 | * Reset twl4030. | |
483 | * Reset VDD1 regulator. | |
484 | * Reset VDD2 regulator. | |
485 | * Reset VPLL1 regulator. | |
486 | * Enable sysclk output. | |
487 | * Reenable twl4030. | |
488 | */ | |
489 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
490 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
491 | 0x13}, | |
9312fffb AK |
492 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, |
493 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
494 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
495 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
3c684e84 | 496 | {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
497 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, |
498 | }; | |
499 | ||
500 | static struct twl4030_script wrst_script __initdata = { | |
501 | .script = wrst_seq, | |
502 | .size = ARRAY_SIZE(wrst_seq), | |
503 | .flags = TWL4030_WRST_SCRIPT, | |
504 | }; | |
505 | ||
506 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
507 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
508 | board might hit retention before loading of wakeup script is | |
509 | completed. This can cause boot failures depending on timing issues. | |
510 | */ | |
511 | &wakeup_script, | |
512 | &sleep_on_script, | |
513 | &wakeup_p3_script, | |
514 | &wrst_script, | |
515 | }; | |
516 | ||
517 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
3c684e84 AK |
518 | { .resource = RES_VDD1, .devgroup = -1, |
519 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
520 | .remap_sleep = RES_STATE_OFF | |
521 | }, | |
522 | { .resource = RES_VDD2, .devgroup = -1, | |
523 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
524 | .remap_sleep = RES_STATE_OFF | |
525 | }, | |
526 | { .resource = RES_VPLL1, .devgroup = -1, | |
527 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
528 | .remap_sleep = RES_STATE_OFF | |
529 | }, | |
530 | { .resource = RES_VPLL2, .devgroup = -1, | |
531 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
532 | }, | |
533 | { .resource = RES_VAUX1, .devgroup = -1, | |
534 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
535 | }, | |
536 | { .resource = RES_VAUX2, .devgroup = -1, | |
537 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
538 | }, | |
539 | { .resource = RES_VAUX3, .devgroup = -1, | |
540 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
541 | }, | |
542 | { .resource = RES_VAUX4, .devgroup = -1, | |
543 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
544 | }, | |
545 | { .resource = RES_VMMC1, .devgroup = -1, | |
546 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
547 | }, | |
548 | { .resource = RES_VMMC2, .devgroup = -1, | |
549 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
550 | }, | |
551 | { .resource = RES_VDAC, .devgroup = -1, | |
552 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
553 | }, | |
554 | { .resource = RES_VSIM, .devgroup = -1, | |
555 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
556 | }, | |
557 | { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
558 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
559 | }, | |
560 | { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
561 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
562 | }, | |
563 | { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
564 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
565 | }, | |
566 | { .resource = RES_VIO, .devgroup = DEV_GRP_P3, | |
567 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
568 | }, | |
569 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
570 | .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1 | |
571 | }, | |
572 | { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
573 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
574 | }, | |
575 | { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
576 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
577 | }, | |
578 | { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
579 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
580 | }, | |
581 | { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, | |
582 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
583 | }, | |
584 | { .resource = RES_32KCLKOUT, .devgroup = -1, | |
585 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
586 | }, | |
587 | { .resource = RES_RESET, .devgroup = -1, | |
588 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
589 | }, | |
590 | { .resource = RES_Main_Ref, .devgroup = -1, | |
591 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
592 | }, | |
9312fffb AK |
593 | { 0, 0}, |
594 | }; | |
595 | ||
596 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
597 | .scripts = twl4030_scripts, | |
598 | .num = ARRAY_SIZE(twl4030_scripts), | |
599 | .resource_config = twl4030_rconfig, | |
600 | }; | |
601 | ||
602 | ||
603 | ||
604 | static struct twl4030_platform_data rx51_twldata __initdata = { | |
ffe7f95b LL |
605 | .irq_base = TWL4030_IRQ_BASE, |
606 | .irq_end = TWL4030_IRQ_END, | |
607 | ||
608 | /* platform_data for children goes here */ | |
609 | .gpio = &rx51_gpio_data, | |
610 | .keypad = &rx51_kp_data, | |
611 | .madc = &rx51_madc_data, | |
dfc27b34 | 612 | .usb = &rx51_usb_data, |
9312fffb | 613 | .power = &rx51_t2scripts_data, |
ffe7f95b LL |
614 | |
615 | .vaux1 = &rx51_vaux1, | |
616 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
617 | .vaux4 = &rx51_vaux4, |
618 | .vmmc1 = &rx51_vmmc1, | |
ffe7f95b LL |
619 | .vsim = &rx51_vsim, |
620 | .vdac = &rx51_vdac, | |
621 | }; | |
622 | ||
623 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = { | |
624 | { | |
625 | I2C_BOARD_INFO("twl5030", 0x48), | |
626 | .flags = I2C_CLIENT_WAKE, | |
627 | .irq = INT_34XX_SYS_NIRQ, | |
628 | .platform_data = &rx51_twldata, | |
629 | }, | |
630 | }; | |
631 | ||
632 | static int __init rx51_i2c_init(void) | |
633 | { | |
f52eeee8 AH |
634 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
635 | system_rev >= SYSTEM_REV_B_USES_VAUX3) | |
636 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; | |
637 | else { | |
638 | rx51_twldata.vaux3 = &rx51_vaux3_cam; | |
639 | rx51_twldata.vmmc2 = &rx51_vmmc2; | |
640 | } | |
cb3cc45a | 641 | omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1, |
ffe7f95b LL |
642 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); |
643 | omap_register_i2c_bus(2, 100, NULL, 0); | |
644 | omap_register_i2c_bus(3, 400, NULL, 0); | |
645 | return 0; | |
646 | } | |
647 | ||
aa62e90f JY |
648 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
649 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
650 | ||
651 | static struct mtd_partition onenand_partitions[] = { | |
652 | { | |
653 | .name = "bootloader", | |
654 | .offset = 0, | |
655 | .size = 0x20000, | |
656 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
657 | }, | |
658 | { | |
659 | .name = "config", | |
660 | .offset = MTDPART_OFS_APPEND, | |
661 | .size = 0x60000, | |
662 | }, | |
663 | { | |
664 | .name = "log", | |
665 | .offset = MTDPART_OFS_APPEND, | |
666 | .size = 0x40000, | |
667 | }, | |
668 | { | |
669 | .name = "kernel", | |
670 | .offset = MTDPART_OFS_APPEND, | |
671 | .size = 0x200000, | |
672 | }, | |
673 | { | |
674 | .name = "initfs", | |
675 | .offset = MTDPART_OFS_APPEND, | |
676 | .size = 0x200000, | |
677 | }, | |
678 | { | |
679 | .name = "rootfs", | |
680 | .offset = MTDPART_OFS_APPEND, | |
681 | .size = MTDPART_SIZ_FULL, | |
682 | }, | |
683 | }; | |
684 | ||
685 | static struct omap_onenand_platform_data board_onenand_data = { | |
686 | .cs = 0, | |
687 | .gpio_irq = 65, | |
688 | .parts = onenand_partitions, | |
689 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
c8e6488f | 690 | .flags = ONENAND_SYNC_READWRITE, |
aa62e90f JY |
691 | }; |
692 | ||
693 | static void __init board_onenand_init(void) | |
694 | { | |
695 | gpmc_onenand_init(&board_onenand_data); | |
696 | } | |
697 | ||
698 | #else | |
699 | ||
700 | static inline void board_onenand_init(void) | |
701 | { | |
702 | } | |
703 | ||
704 | #endif | |
ffe7f95b | 705 | |
1a48e157 TL |
706 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
707 | ||
708 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
709 | .cs = 1, | |
710 | .gpio_irq = 54, | |
711 | .gpio_pwrdwn = 86, | |
712 | .gpio_reset = 164, | |
713 | .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL, | |
714 | }; | |
715 | ||
716 | static void __init board_smc91x_init(void) | |
717 | { | |
4896e394 TL |
718 | omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN); |
719 | omap_mux_init_gpio(86, OMAP_PIN_OUTPUT); | |
720 | omap_mux_init_gpio(164, OMAP_PIN_OUTPUT); | |
1a48e157 TL |
721 | |
722 | gpmc_smc91x_init(&board_smc91x_data); | |
723 | } | |
724 | ||
725 | #else | |
726 | ||
727 | static inline void board_smc91x_init(void) | |
728 | { | |
729 | } | |
730 | ||
731 | #endif | |
732 | ||
a24e61a9 KV |
733 | static void rx51_wl1251_set_power(bool enable) |
734 | { | |
735 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); | |
736 | } | |
737 | ||
738 | static void __init rx51_init_wl1251(void) | |
739 | { | |
740 | int irq, ret; | |
741 | ||
742 | ret = gpio_request(RX51_WL1251_POWER_GPIO, "wl1251 power"); | |
743 | if (ret < 0) | |
744 | goto error; | |
745 | ||
746 | ret = gpio_direction_output(RX51_WL1251_POWER_GPIO, 0); | |
747 | if (ret < 0) | |
748 | goto err_power; | |
749 | ||
750 | ret = gpio_request(RX51_WL1251_IRQ_GPIO, "wl1251 irq"); | |
751 | if (ret < 0) | |
752 | goto err_power; | |
753 | ||
754 | ret = gpio_direction_input(RX51_WL1251_IRQ_GPIO); | |
755 | if (ret < 0) | |
756 | goto err_irq; | |
757 | ||
758 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); | |
759 | if (irq < 0) | |
760 | goto err_irq; | |
761 | ||
762 | wl1251_pdata.set_power = rx51_wl1251_set_power; | |
763 | rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; | |
764 | ||
765 | return; | |
766 | ||
767 | err_irq: | |
768 | gpio_free(RX51_WL1251_IRQ_GPIO); | |
769 | ||
770 | err_power: | |
771 | gpio_free(RX51_WL1251_POWER_GPIO); | |
772 | ||
773 | error: | |
774 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | |
775 | wl1251_pdata.set_power = NULL; | |
776 | ||
777 | /* | |
778 | * Now rx51_peripherals_spi_board_info[1].irq is zero and | |
779 | * set_power is null, and wl1251_probe() will fail. | |
780 | */ | |
781 | } | |
782 | ||
ffe7f95b LL |
783 | void __init rx51_peripherals_init(void) |
784 | { | |
ffe7f95b | 785 | rx51_i2c_init(); |
aa62e90f | 786 | board_onenand_init(); |
1a48e157 | 787 | board_smc91x_init(); |
f014ee32 | 788 | rx51_add_gpio_keys(); |
a24e61a9 KV |
789 | rx51_init_wl1251(); |
790 | spi_register_board_info(rx51_peripherals_spi_board_info, | |
791 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | |
68ff0423 | 792 | omap2_hsmmc_init(mmc); |
ffe7f95b LL |
793 | } |
794 |