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[media] media: rc: Introduce RX51 IR transmitter driver
[deliverable/linux.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL		 3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
c1f9a095 17#include <linux/wl12xx.h>
3dad5356 18#include <linux/spi/tsc2005.h>
ffe7f95b 19#include <linux/i2c.h>
ebeb53e1 20#include <linux/i2c/twl.h>
ffe7f95b
LL		 21#include <linux/clk.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
24#include <linux/gpio.h>
f014ee32 25#include <linux/gpio_keys.h>
5e763d29 26#include <linux/mmc/host.h>
10299e2e 27#include <linux/power/isp1704_charger.h>
9f97da78 28#include <asm/system_info.h>
ffe7f95b 29
ce491cf8 30#include <plat/mcspi.h>
ce491cf8 31#include <plat/board.h>
4e65331c 32#include "common.h"
ce491cf8
TL		 33#include <plat/dma.h>
34#include <plat/gpmc.h>
ce491cf8
TL		 35#include <plat/onenand.h>
36#include <plat/gpmc-smc91x.h>
ffe7f95b 37
04aeae77
MK		 38#include <mach/board-rx51.h>
39
87581fd4 40#include <sound/tlv320aic3x.h>
64d06691 41#include <sound/tpa6130a2-plat.h>
589541c0
JN		 42#include <media/radio-si4713.h>
43#include <media/si4713.h>
eeada9e8 44#include <linux/leds-lp5523.h>
87581fd4 45
70b5d737 46#include <../drivers/staging/iio/light/tsl2563.h>
3b511201 47#include <linux/lis3lv02d.h>
70b5d737 48
4896e394 49#include "mux.h"
d02a900b 50#include "hsmmc.h"
fbd8071c 51#include "common-board-devices.h"
ffe7f95b 52
f52eeee8
AH		 53#define SYSTEM_REV_B_USES_VAUX3 0x1699
54#define SYSTEM_REV_S_USES_VAUX3 0x8
55
a24e61a9
KV		 56#define RX51_WL1251_POWER_GPIO 87
57#define RX51_WL1251_IRQ_GPIO 42
589541c0
JN		 58#define RX51_FMTX_RESET_GPIO 163
59#define RX51_FMTX_IRQ 53
eeada9e8 60#define RX51_LP5523_CHIP_EN_GPIO 41
a24e61a9 61
10299e2e
KJ		 62#define RX51_USB_TRANSCEIVER_RST_GPIO 67
63
3dad5356
AK		 64#define RX51_TSC2005_RESET_GPIO 104
65#define RX51_TSC2005_IRQ_GPIO 100
66
3b511201
AP		 67#define LIS302_IRQ1_GPIO 181
68#define LIS302_IRQ2_GPIO 180 /* Not yet in use */
69
a24e61a9
KV		 70/* list all spi devices here */
71enum {
72 RX51_SPI_WL1251,
03e11104 73 RX51_SPI_MIPID, /* LCD panel */
6996e7ff 74 RX51_SPI_TSC2005, /* Touch Controller */
a24e61a9
KV		 75};
76
77static struct wl12xx_platform_data wl1251_pdata;
3dad5356 78static struct tsc2005_platform_data tsc2005_pdata;
a24e61a9 79
3b511201
AP		 80#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
81static int lis302_setup(void)
82{
83 int err;
84 int irq1 = LIS302_IRQ1_GPIO;
85 int irq2 = LIS302_IRQ2_GPIO;
86
87 /* gpio for interrupt pin 1 */
88 err = gpio_request(irq1, "lis3lv02dl_irq1");
89 if (err) {
90 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
91 goto out;
92 }
93
94 /* gpio for interrupt pin 2 */
95 err = gpio_request(irq2, "lis3lv02dl_irq2");
96 if (err) {
97 gpio_free(irq1);
98 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
99 goto out;
100 }
101
102 gpio_direction_input(irq1);
103 gpio_direction_input(irq2);
104
105out:
106 return err;
107}
108
109static int lis302_release(void)
110{
111 gpio_free(LIS302_IRQ1_GPIO);
112 gpio_free(LIS302_IRQ2_GPIO);
113
114 return 0;
115}
116
117static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
118 .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y |
119 LIS3_CLICK_SINGLE_Z,
120 /* Limits are 0.5g * value */
121 .click_thresh_x = 8,
122 .click_thresh_y = 8,
123 .click_thresh_z = 10,
124 /* Click must be longer than time limit */
125 .click_time_limit = 9,
126 /* Kind of debounce filter */
127 .click_latency = 50,
128
129 /* Limits for all axis. millig-value / 18 to get HW values */
130 .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI,
131 .wakeup_thresh = 800 / 18,
132 .wakeup_flags2 = LIS3_WAKEUP_Z_HI ,
133 .wakeup_thresh2 = 900 / 18,
134
135 .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE,
136
137 /* Interrupt line 2 for click detection, line 1 for thresholds */
138 .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12,
139
140 .axis_x = LIS3_DEV_X,
141 .axis_y = LIS3_INV_DEV_Y,
142 .axis_z = LIS3_INV_DEV_Z,
143 .setup_resources = lis302_setup,
144 .release_resources = lis302_release,
145 .st_min_limits = {-32, 3, 3},
146 .st_max_limits = {-3, 32, 32},
3b511201
AP		 147};
148#endif
149
70b5d737
MN		 150#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
151static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
152 .cover_comp_gain = 16,
153};
154#endif
155
eeada9e8
AP		 156#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
157static struct lp5523_led_config rx51_lp5523_led_config[] = {
158 {
159 .chan_nr = 0,
160 .led_current = 50,
161 }, {
162 .chan_nr = 1,
163 .led_current = 50,
164 }, {
165 .chan_nr = 2,
166 .led_current = 50,
167 }, {
168 .chan_nr = 3,
169 .led_current = 50,
170 }, {
171 .chan_nr = 4,
172 .led_current = 50,
173 }, {
174 .chan_nr = 5,
175 .led_current = 50,
176 }, {
177 .chan_nr = 6,
178 .led_current = 50,
179 }, {
180 .chan_nr = 7,
181 .led_current = 50,
182 }, {
183 .chan_nr = 8,
184 .led_current = 50,
185 }
186};
187
188static int rx51_lp5523_setup(void)
189{
190 return gpio_request_one(RX51_LP5523_CHIP_EN_GPIO, GPIOF_DIR_OUT,
191 "lp5523_enable");
192}
193
194static void rx51_lp5523_release(void)
195{
196 gpio_free(RX51_LP5523_CHIP_EN_GPIO);
197}
198
199static void rx51_lp5523_enable(bool state)
200{
201 gpio_set_value(RX51_LP5523_CHIP_EN_GPIO, !!state);
202}
203
204static struct lp5523_platform_data rx51_lp5523_platform_data = {
205 .led_config = rx51_lp5523_led_config,
206 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config),
207 .clock_mode = LP5523_CLOCK_AUTO,
208 .setup_resources = rx51_lp5523_setup,
209 .release_resources = rx51_lp5523_release,
210 .enable = rx51_lp5523_enable,
211};
212#endif
213
a24e61a9
KV		 214static struct omap2_mcspi_device_config wl1251_mcspi_config = {
215 .turbo_mode = 0,
a24e61a9
KV		 216};
217
03e11104
RQ		 218static struct omap2_mcspi_device_config mipid_mcspi_config = {
219 .turbo_mode = 0,
03e11104
RQ		 220};
221
6996e7ff
RQ		 222static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
223 .turbo_mode = 0,
6996e7ff
RQ		 224};
225
a24e61a9
KV		 226static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
227 [RX51_SPI_WL1251] = {
228 .modalias = "wl1251",
229 .bus_num = 4,
230 .chip_select = 0,
231 .max_speed_hz = 48000000,
860fc976 232 .mode = SPI_MODE_3,
a24e61a9
KV		 233 .controller_data = &wl1251_mcspi_config,
234 .platform_data = &wl1251_pdata,
235 },
03e11104
RQ		 236 [RX51_SPI_MIPID] = {
237 .modalias = "acx565akm",
238 .bus_num = 1,
239 .chip_select = 2,
240 .max_speed_hz = 6000000,
241 .controller_data = &mipid_mcspi_config,
242 },
6996e7ff
RQ		 243 [RX51_SPI_TSC2005] = {
244 .modalias = "tsc2005",
245 .bus_num = 1,
246 .chip_select = 0,
6996e7ff
RQ		 247 .max_speed_hz = 6000000,
248 .controller_data = &tsc2005_mcspi_config,
3dad5356 249 .platform_data = &tsc2005_pdata,
6996e7ff 250 },
a24e61a9
KV		 251};
252
10299e2e
KJ		 253static void rx51_charger_set_power(bool on)
254{
255 gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
256}
257
258static struct isp1704_charger_data rx51_charger_data = {
259 .set_power = rx51_charger_set_power,
260};
261
fd0964c5 262static struct platform_device rx51_charger_device = {
10299e2e
KJ		 263 .name = "isp1704_charger",
264 .dev = {
265 .platform_data = &rx51_charger_data,
266 },
fd0964c5
HK		 267};
268
10299e2e
KJ		 269static void __init rx51_charger_init(void)
270{
271 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
e5fe29c7 272 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
10299e2e
KJ		 273
274 platform_device_register(&rx51_charger_device);
275}
276
f014ee32
JN		 277#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
278
279#define RX51_GPIO_CAMERA_LENS_COVER 110
280#define RX51_GPIO_CAMERA_FOCUS 68
281#define RX51_GPIO_CAMERA_CAPTURE 69
282#define RX51_GPIO_KEYPAD_SLIDE 71
283#define RX51_GPIO_LOCK_BUTTON 113
284#define RX51_GPIO_PROXIMITY 89
285
286#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
287
288static struct gpio_keys_button rx51_gpio_keys[] = {
289 {
290 .desc = "Camera Lens Cover",
291 .type = EV_SW,
292 .code = SW_CAMERA_LENS_COVER,
293 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
294 .active_low = 1,
295 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
296 }, {
297 .desc = "Camera Focus",
298 .type = EV_KEY,
299 .code = KEY_CAMERA_FOCUS,
300 .gpio = RX51_GPIO_CAMERA_FOCUS,
301 .active_low = 1,
302 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
303 }, {
304 .desc = "Camera Capture",
305 .type = EV_KEY,
306 .code = KEY_CAMERA,
307 .gpio = RX51_GPIO_CAMERA_CAPTURE,
308 .active_low = 1,
309 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
310 }, {
311 .desc = "Lock Button",
312 .type = EV_KEY,
313 .code = KEY_SCREENLOCK,
314 .gpio = RX51_GPIO_LOCK_BUTTON,
315 .active_low = 1,
316 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
317 }, {
318 .desc = "Keypad Slide",
319 .type = EV_SW,
320 .code = SW_KEYPAD_SLIDE,
321 .gpio = RX51_GPIO_KEYPAD_SLIDE,
322 .active_low = 1,
323 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
324 }, {
325 .desc = "Proximity Sensor",
326 .type = EV_SW,
327 .code = SW_FRONT_PROXIMITY,
328 .gpio = RX51_GPIO_PROXIMITY,
329 .active_low = 0,
330 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
331 }
332};
333
334static struct gpio_keys_platform_data rx51_gpio_keys_data = {
335 .buttons = rx51_gpio_keys,
336 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
337};
338
339static struct platform_device rx51_gpio_keys_device = {
340 .name = "gpio-keys",
341 .id = -1,
342 .dev = {
343 .platform_data = &rx51_gpio_keys_data,
344 },
345};
346
347static void __init rx51_add_gpio_keys(void)
348{
349 platform_device_register(&rx51_gpio_keys_device);
350}
351#else
352static void __init rx51_add_gpio_keys(void)
353{
354}
355#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
356
bead4375 357static uint32_t board_keymap[] = {
3fea6026
DT		 358 /*
359 * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row
360 * connected to the ground" matrix state.
361 */
ffe7f95b 362 KEY(0, 0, KEY_Q),
acf442dc
AK		 363 KEY(0, 1, KEY_O),
364 KEY(0, 2, KEY_P),
365 KEY(0, 3, KEY_COMMA),
366 KEY(0, 4, KEY_BACKSPACE),
367 KEY(0, 6, KEY_A),
368 KEY(0, 7, KEY_S),
3fea6026 369
acf442dc 370 KEY(1, 0, KEY_W),
ffe7f95b 371 KEY(1, 1, KEY_D),
acf442dc
AK		 372 KEY(1, 2, KEY_F),
373 KEY(1, 3, KEY_G),
374 KEY(1, 4, KEY_H),
375 KEY(1, 5, KEY_J),
376 KEY(1, 6, KEY_K),
377 KEY(1, 7, KEY_L),
3fea6026 378
acf442dc
AK		 379 KEY(2, 0, KEY_E),
380 KEY(2, 1, KEY_DOT),
ffe7f95b 381 KEY(2, 2, KEY_UP),
acf442dc
AK		 382 KEY(2, 3, KEY_ENTER),
383 KEY(2, 5, KEY_Z),
384 KEY(2, 6, KEY_X),
385 KEY(2, 7, KEY_C),
3fea6026
DT		 386 KEY(2, 8, KEY_F9),
387
acf442dc
AK		 388 KEY(3, 0, KEY_R),
389 KEY(3, 1, KEY_V),
390 KEY(3, 2, KEY_B),
ffe7f95b 391 KEY(3, 3, KEY_N),
acf442dc
AK		 392 KEY(3, 4, KEY_M),
393 KEY(3, 5, KEY_SPACE),
394 KEY(3, 6, KEY_SPACE),
395 KEY(3, 7, KEY_LEFT),
3fea6026 396
acf442dc
AK		 397 KEY(4, 0, KEY_T),
398 KEY(4, 1, KEY_DOWN),
399 KEY(4, 2, KEY_RIGHT),
ffe7f95b 400 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK		 401 KEY(4, 5, KEY_RIGHTALT),
402 KEY(4, 6, KEY_LEFTSHIFT),
2e65a207 403 KEY(4, 8, KEY_F10),
3fea6026 404
acf442dc 405 KEY(5, 0, KEY_Y),
2e65a207 406 KEY(5, 8, KEY_F11),
3fea6026 407
acf442dc 408 KEY(6, 0, KEY_U),
3fea6026 409
acf442dc
AK		 410 KEY(7, 0, KEY_I),
411 KEY(7, 1, KEY_F7),
412 KEY(7, 2, KEY_F8),
ffe7f95b
LL		 413};
414
4f543332
TL		 415static struct matrix_keymap_data board_map_data = {
416 .keymap = board_keymap,
417 .keymap_size = ARRAY_SIZE(board_keymap),
418};
419
ffe7f95b 420static struct twl4030_keypad_data rx51_kp_data = {
4f543332 421 .keymap_data = &board_map_data,
ffe7f95b
LL		 422 .rows = 8,
423 .cols = 8,
ffe7f95b
LL		 424 .rep = 1,
425};
426
ce6f0016
AH		 427/* Enable input logic and pull all lines up when eMMC is on. */
428static struct omap_board_mux rx51_mmc2_on_mux[] = {
429 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
430 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
431 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
432 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
433 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
434 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
435 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
436 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
437 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
438 { .reg_offset = OMAP_MUX_TERMINATOR },
439};
440
441/* Disable input logic and pull all lines down when eMMC is off. */
442static struct omap_board_mux rx51_mmc2_off_mux[] = {
443 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
444 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
445 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
446 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
447 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
448 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
449 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
450 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
451 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
452 { .reg_offset = OMAP_MUX_TERMINATOR },
453};
454
112485e9
BC		 455static struct omap_mux_partition *partition;
456
ce6f0016
AH		 457/*
458 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
459 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
460 */
461static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
462{
463 if (power_on)
112485e9 464 omap_mux_write_array(partition, rx51_mmc2_on_mux);
ce6f0016 465 else
112485e9 466 omap_mux_write_array(partition, rx51_mmc2_off_mux);
ce6f0016
AH		 467}
468
68ff0423 469static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL		 470 {
471 .name = "external",
472 .mmc = 1,
3a63833e 473 .caps = MMC_CAP_4_BIT_DATA,
ffe7f95b
LL		 474 .cover_only = true,
475 .gpio_cd = 160,
476 .gpio_wp = -EINVAL,
5e763d29 477 .power_saving = true,
ffe7f95b
LL		 478 },
479 {
480 .name = "internal",
481 .mmc = 2,
3a63833e
SG		 482 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
483 /* See also rx51_mmc2_remux */
ffe7f95b
LL		 484 .gpio_cd = -EINVAL,
485 .gpio_wp = -EINVAL,
5e763d29
AH		 486 .nonremovable = true,
487 .power_saving = true,
ce6f0016 488 .remux = rx51_mmc2_remux,
ffe7f95b
LL		 489 },
490 {} /* Terminator */
491};
492
786b01a8
OD		 493static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
494 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
495};
ffe7f95b 496
664a41b8
LT		 497static struct regulator_consumer_supply rx51_vaux2_supply[] = {
498 REGULATOR_SUPPLY("vdds_csib", "omap3isp"),
499};
75ccf268 500
786b01a8
OD		 501static struct regulator_consumer_supply rx51_vaux3_supply[] = {
502 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
503};
ffe7f95b 504
786b01a8
OD		 505static struct regulator_consumer_supply rx51_vsim_supply[] = {
506 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
507};
ffe7f95b 508
4cfcaef1
JN		 509static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
510 /* tlv320aic3x analog supplies */
5c7d9bbe
JN		 511 REGULATOR_SUPPLY("AVDD", "2-0018"),
512 REGULATOR_SUPPLY("DRVDD", "2-0018"),
caeeb4aa
JN		 513 REGULATOR_SUPPLY("AVDD", "2-0019"),
514 REGULATOR_SUPPLY("DRVDD", "2-0019"),
64d06691
JN		 515 /* tpa6130a2 */
516 REGULATOR_SUPPLY("Vdd", "2-0060"),
4cfcaef1 517 /* Keep vmmc as last item. It is not iterated for newer boards */
0005ae73 518 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
4cfcaef1
JN		 519};
520
521static struct regulator_consumer_supply rx51_vio_supplies[] = {
522 /* tlv320aic3x digital supplies */
5c7d9bbe
JN		 523 REGULATOR_SUPPLY("IOVDD", "2-0018"),
524 REGULATOR_SUPPLY("DVDD", "2-0018"),
caeeb4aa
JN		 525 REGULATOR_SUPPLY("IOVDD", "2-0019"),
526 REGULATOR_SUPPLY("DVDD", "2-0019"),
589541c0
JN		 527 /* Si4713 IO supply */
528 REGULATOR_SUPPLY("vio", "2-0063"),
4cfcaef1
JN		 529};
530
0581b52e 531static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
b5b9945b 532 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
589541c0
JN		 533 /* Si4713 supply */
534 REGULATOR_SUPPLY("vdd", "2-0063"),
0581b52e
RQ		 535};
536
ffe7f95b
LL		 537static struct regulator_init_data rx51_vaux1 = {
538 .constraints = {
539 .name = "V28",
540 .min_uV = 2800000,
541 .max_uV = 2800000,
000d534e 542 .always_on = true, /* due battery cover sensor */
ffe7f95b
LL		 543 .valid_modes_mask = REGULATOR_MODE_NORMAL
544 | REGULATOR_MODE_STANDBY,
545 .valid_ops_mask = REGULATOR_CHANGE_MODE
546 | REGULATOR_CHANGE_STATUS,
547 },
0581b52e
RQ		 548 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
549 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL		 550};
551
552static struct regulator_init_data rx51_vaux2 = {
553 .constraints = {
554 .name = "VCSI",
555 .min_uV = 1800000,
556 .max_uV = 1800000,
557 .valid_modes_mask = REGULATOR_MODE_NORMAL
558 | REGULATOR_MODE_STANDBY,
559 .valid_ops_mask = REGULATOR_CHANGE_MODE
560 | REGULATOR_CHANGE_STATUS,
561 },
664a41b8
LT		 562 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply),
563 .consumer_supplies = rx51_vaux2_supply,
ffe7f95b
LL		 564};
565
566/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 567static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL		 568 .constraints = {
569 .name = "VCAM_DIG_18",
570 .min_uV = 1800000,
571 .max_uV = 1800000,
572 .apply_uV = true,
573 .valid_modes_mask = REGULATOR_MODE_NORMAL
574 | REGULATOR_MODE_STANDBY,
575 .valid_ops_mask = REGULATOR_CHANGE_MODE
576 | REGULATOR_CHANGE_STATUS,
577 },
578};
579
f52eeee8
AH		 580static struct regulator_init_data rx51_vaux3_mmc = {
581 .constraints = {
582 .name = "VMMC2_30",
583 .min_uV = 2800000,
584 .max_uV = 3000000,
585 .apply_uV = true,
586 .valid_modes_mask = REGULATOR_MODE_NORMAL
587 | REGULATOR_MODE_STANDBY,
588 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
589 | REGULATOR_CHANGE_MODE
590 | REGULATOR_CHANGE_STATUS,
591 },
786b01a8
OD		 592 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
593 .consumer_supplies = rx51_vaux3_supply,
f52eeee8
AH		 594};
595
ffe7f95b
LL		 596static struct regulator_init_data rx51_vaux4 = {
597 .constraints = {
598 .name = "VCAM_ANA_28",
599 .min_uV = 2800000,
600 .max_uV = 2800000,
601 .apply_uV = true,
602 .valid_modes_mask = REGULATOR_MODE_NORMAL
603 | REGULATOR_MODE_STANDBY,
604 .valid_ops_mask = REGULATOR_CHANGE_MODE
605 | REGULATOR_CHANGE_STATUS,
606 },
607};
608
609static struct regulator_init_data rx51_vmmc1 = {
610 .constraints = {
611 .min_uV = 1850000,
612 .max_uV = 3150000,
613 .valid_modes_mask = REGULATOR_MODE_NORMAL
614 | REGULATOR_MODE_STANDBY,
615 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
616 | REGULATOR_CHANGE_MODE
617 | REGULATOR_CHANGE_STATUS,
618 },
786b01a8
OD		 619 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
620 .consumer_supplies = rx51_vmmc1_supply,
ffe7f95b
LL		 621};
622
623static struct regulator_init_data rx51_vmmc2 = {
624 .constraints = {
f2add1de
JN		 625 .name = "V28_A",
626 .min_uV = 2800000,
627 .max_uV = 3000000,
2827411e 628 .always_on = true, /* due VIO leak to AIC34 VDDs */
ffe7f95b
LL		 629 .apply_uV = true,
630 .valid_modes_mask = REGULATOR_MODE_NORMAL
631 | REGULATOR_MODE_STANDBY,
632 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
633 | REGULATOR_CHANGE_MODE
634 | REGULATOR_CHANGE_STATUS,
635 },
4cfcaef1
JN		 636 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
637 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL		 638};
639
094fc559
KJ		 640static struct regulator_init_data rx51_vpll1 = {
641 .constraints = {
642 .name = "VPLL",
643 .min_uV = 1800000,
644 .max_uV = 1800000,
645 .apply_uV = true,
646 .always_on = true,
647 .valid_modes_mask = REGULATOR_MODE_NORMAL
648 | REGULATOR_MODE_STANDBY,
649 .valid_ops_mask = REGULATOR_CHANGE_MODE,
650 },
651};
652
653static struct regulator_init_data rx51_vpll2 = {
654 .constraints = {
655 .name = "VSDI_CSI",
656 .min_uV = 1800000,
657 .max_uV = 1800000,
658 .apply_uV = true,
659 .always_on = true,
660 .valid_modes_mask = REGULATOR_MODE_NORMAL
661 | REGULATOR_MODE_STANDBY,
662 .valid_ops_mask = REGULATOR_CHANGE_MODE,
663 },
664};
665
ffe7f95b
LL		 666static struct regulator_init_data rx51_vsim = {
667 .constraints = {
668 .name = "VMMC2_IO_18",
669 .min_uV = 1800000,
670 .max_uV = 1800000,
671 .apply_uV = true,
672 .valid_modes_mask = REGULATOR_MODE_NORMAL
673 | REGULATOR_MODE_STANDBY,
674 .valid_ops_mask = REGULATOR_CHANGE_MODE
675 | REGULATOR_CHANGE_STATUS,
676 },
786b01a8
OD		 677 .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
678 .consumer_supplies = rx51_vsim_supply,
ffe7f95b
LL		 679};
680
4cfcaef1
JN		 681static struct regulator_init_data rx51_vio = {
682 .constraints = {
683 .min_uV = 1800000,
684 .max_uV = 1800000,
685 .valid_modes_mask = REGULATOR_MODE_NORMAL
686 | REGULATOR_MODE_STANDBY,
687 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
688 | REGULATOR_CHANGE_MODE
689 | REGULATOR_CHANGE_STATUS,
690 },
691 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
692 .consumer_supplies = rx51_vio_supplies,
693};
694
094fc559
KJ		 695static struct regulator_init_data rx51_vintana1 = {
696 .constraints = {
697 .name = "VINTANA1",
698 .min_uV = 1500000,
699 .max_uV = 1500000,
700 .always_on = true,
701 .valid_modes_mask = REGULATOR_MODE_NORMAL
702 | REGULATOR_MODE_STANDBY,
703 .valid_ops_mask = REGULATOR_CHANGE_MODE,
704 },
705};
706
707static struct regulator_init_data rx51_vintana2 = {
708 .constraints = {
709 .name = "VINTANA2",
710 .min_uV = 2750000,
711 .max_uV = 2750000,
712 .apply_uV = true,
713 .always_on = true,
714 .valid_modes_mask = REGULATOR_MODE_NORMAL
715 | REGULATOR_MODE_STANDBY,
716 .valid_ops_mask = REGULATOR_CHANGE_MODE,
717 },
718};
719
720static struct regulator_init_data rx51_vintdig = {
721 .constraints = {
722 .name = "VINTDIG",
723 .min_uV = 1500000,
724 .max_uV = 1500000,
725 .always_on = true,
726 .valid_modes_mask = REGULATOR_MODE_NORMAL
727 | REGULATOR_MODE_STANDBY,
728 .valid_ops_mask = REGULATOR_CHANGE_MODE,
729 },
730};
731
589541c0
JN		 732static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = {
733 .gpio_reset = RX51_FMTX_RESET_GPIO,
734};
735
736static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = {
737 I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH),
738 .platform_data = &rx51_si4713_i2c_data,
739};
740
741static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = {
742 .i2c_bus = 2,
743 .subdev_board_info = &rx51_si4713_board_info,
744};
745
07ad6ab3 746static struct platform_device rx51_si4713_dev = {
589541c0
JN		 747 .name = "radio-si4713",
748 .id = -1,
749 .dev = {
750 .platform_data = &rx51_si4713_data,
751 },
752};
753
754static __init void rx51_init_si4713(void)
755{
756 int err;
757
758 err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq");
759 if (err) {
760 printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err);
761 return;
762 }
763 rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ);
764 platform_device_register(&rx51_si4713_dev);
765}
766
ffe7f95b
LL		 767static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
768{
769 /* FIXME this gpio setup is just a placeholder for now */
bc593f5d 770 gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm");
c0ad4fac 771 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en");
ffe7f95b 772
ffe7f95b
LL		 773 return 0;
774}
775
776static struct twl4030_gpio_platform_data rx51_gpio_data = {
777 .gpio_base = OMAP_MAX_GPIO_LINES,
778 .irq_base = TWL4030_GPIO_IRQ_BASE,
779 .irq_end = TWL4030_GPIO_IRQ_END,
780 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
781 | BIT(4) | BIT(5)
782 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
783 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
784 | BIT(16) | BIT(17) ,
785 .setup = rx51_twlgpio_setup,
786};
787
9312fffb
AK		 788static struct twl4030_ins sleep_on_seq[] __initdata = {
789/*
3c684e84 790 * Turn off everything
9312fffb 791 */
3c684e84 792 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK		 793};
794
795static struct twl4030_script sleep_on_script __initdata = {
796 .script = sleep_on_seq,
797 .size = ARRAY_SIZE(sleep_on_seq),
798 .flags = TWL4030_SLEEP_SCRIPT,
799};
800
801static struct twl4030_ins wakeup_seq[] __initdata = {
802/*
3c684e84 803 * Reenable everything
9312fffb 804 */
3c684e84 805 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 806};
807
808static struct twl4030_script wakeup_script __initdata = {
809 .script = wakeup_seq,
810 .size = ARRAY_SIZE(wakeup_seq),
811 .flags = TWL4030_WAKEUP12_SCRIPT,
812};
813
814static struct twl4030_ins wakeup_p3_seq[] __initdata = {
815/*
3c684e84 816 * Reenable everything
9312fffb 817 */
3c684e84 818 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 819};
820
821static struct twl4030_script wakeup_p3_script __initdata = {
822 .script = wakeup_p3_seq,
823 .size = ARRAY_SIZE(wakeup_p3_seq),
824 .flags = TWL4030_WAKEUP3_SCRIPT,
825};
826
827static struct twl4030_ins wrst_seq[] __initdata = {
828/*
829 * Reset twl4030.
830 * Reset VDD1 regulator.
831 * Reset VDD2 regulator.
832 * Reset VPLL1 regulator.
833 * Enable sysclk output.
834 * Reenable twl4030.
835 */
836 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
837 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
838 0x13},
9312fffb
AK		 839 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
840 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
841 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
842 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 843 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
9312fffb
AK		 844 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
845};
846
847static struct twl4030_script wrst_script __initdata = {
848 .script = wrst_seq,
849 .size = ARRAY_SIZE(wrst_seq),
850 .flags = TWL4030_WRST_SCRIPT,
851};
852
853static struct twl4030_script *twl4030_scripts[] __initdata = {
854 /* wakeup12 script should be loaded before sleep script, otherwise a
855 board might hit retention before loading of wakeup script is
856 completed. This can cause boot failures depending on timing issues.
857 */
858 &wakeup_script,
859 &sleep_on_script,
860 &wakeup_p3_script,
861 &wrst_script,
862};
863
864static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK		 865 { .resource = RES_VDD1, .devgroup = -1,
866 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
867 .remap_sleep = RES_STATE_OFF
868 },
869 { .resource = RES_VDD2, .devgroup = -1,
870 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
871 .remap_sleep = RES_STATE_OFF
872 },
873 { .resource = RES_VPLL1, .devgroup = -1,
874 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
875 .remap_sleep = RES_STATE_OFF
876 },
877 { .resource = RES_VPLL2, .devgroup = -1,
878 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
879 },
880 { .resource = RES_VAUX1, .devgroup = -1,
881 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
882 },
883 { .resource = RES_VAUX2, .devgroup = -1,
884 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
885 },
886 { .resource = RES_VAUX3, .devgroup = -1,
887 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
888 },
889 { .resource = RES_VAUX4, .devgroup = -1,
890 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
891 },
892 { .resource = RES_VMMC1, .devgroup = -1,
893 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
894 },
895 { .resource = RES_VMMC2, .devgroup = -1,
896 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
897 },
898 { .resource = RES_VDAC, .devgroup = -1,
899 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
900 },
901 { .resource = RES_VSIM, .devgroup = -1,
902 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
903 },
904 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
905 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
906 },
907 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
908 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
909 },
910 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
911 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
912 },
913 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
914 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
915 },
916 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
917 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
918 },
919 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
920 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
921 },
922 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
923 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
924 },
925 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
926 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
927 },
928 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
929 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
930 },
931 { .resource = RES_32KCLKOUT, .devgroup = -1,
932 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
933 },
934 { .resource = RES_RESET, .devgroup = -1,
935 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
936 },
d7ac829f 937 { .resource = RES_MAIN_REF, .devgroup = -1,
3c684e84
AK		 938 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
939 },
9312fffb
AK		 940 { 0, 0},
941};
942
943static struct twl4030_power_data rx51_t2scripts_data __initdata = {
944 .scripts = twl4030_scripts,
945 .num = ARRAY_SIZE(twl4030_scripts),
946 .resource_config = twl4030_rconfig,
947};
948
8c3d4534 949static struct twl4030_vibra_data rx51_vibra_data __initdata = {
b7a834cc
IK		 950 .coexist = 0,
951};
952
8c3d4534 953static struct twl4030_audio_data rx51_audio_data __initdata = {
b7a834cc
IK		 954 .audio_mclk = 26000000,
955 .vibra = &rx51_vibra_data,
956};
9312fffb 957
9312fffb 958static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL		 959 /* platform_data for children goes here */
960 .gpio = &rx51_gpio_data,
961 .keypad = &rx51_kp_data,
9312fffb 962 .power = &rx51_t2scripts_data,
4ae6df5e 963 .audio = &rx51_audio_data,
ffe7f95b
LL		 964
965 .vaux1 = &rx51_vaux1,
966 .vaux2 = &rx51_vaux2,
ffe7f95b
LL		 967 .vaux4 = &rx51_vaux4,
968 .vmmc1 = &rx51_vmmc1,
094fc559
KJ		 969 .vpll1 = &rx51_vpll1,
970 .vpll2 = &rx51_vpll2,
ffe7f95b 971 .vsim = &rx51_vsim,
094fc559
KJ		 972 .vintana1 = &rx51_vintana1,
973 .vintana2 = &rx51_vintana2,
974 .vintdig = &rx51_vintdig,
4cfcaef1 975 .vio = &rx51_vio,
ffe7f95b
LL		 976};
977
f0c61d3d 978static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = {
64d06691
JN		 979 .power_gpio = 98,
980};
981
f0fba2ad
LG		 982/* Audio setup data */
983static struct aic3x_setup_data rx51_aic34_setup = {
984 .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED,
985 .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT,
986};
987
e4862f2f 988static struct aic3x_pdata rx51_aic3x_data = {
f0fba2ad
LG		 989 .setup = &rx51_aic34_setup,
990 .gpio_reset = 60,
991};
992
caeeb4aa
JN		 993static struct aic3x_pdata rx51_aic3x_data2 = {
994 .gpio_reset = 60,
995};
996
dabe929b
JN		 997static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
998 {
999 I2C_BOARD_INFO("tlv320aic3x", 0x18),
87581fd4 1000 .platform_data = &rx51_aic3x_data,
dabe929b 1001 },
caeeb4aa
JN		 1002 {
1003 I2C_BOARD_INFO("tlv320aic3x", 0x19),
1004 .platform_data = &rx51_aic3x_data2,
1005 },
70b5d737
MN		 1006#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
1007 {
1008 I2C_BOARD_INFO("tsl2563", 0x29),
1009 .platform_data = &rx51_tsl2563_platform_data,
1010 },
eeada9e8
AP		 1011#endif
1012#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
1013 {
1014 I2C_BOARD_INFO("lp5523", 0x32),
1015 .platform_data = &rx51_lp5523_platform_data,
1016 },
70b5d737 1017#endif
d77711aa
PR		 1018 {
1019 I2C_BOARD_INFO("bq27200", 0x55),
1020 },
64d06691
JN		 1021 {
1022 I2C_BOARD_INFO("tpa6130a2", 0x60),
1023 .platform_data = &rx51_tpa6130a2_data,
1024 }
dabe929b
JN		 1025};
1026
3b511201
AP		 1027static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
1028#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1029 {
1030 I2C_BOARD_INFO("lis3lv02d", 0x1d),
1031 .platform_data = &rx51_lis3lv02d_data,
3b511201
AP		 1032 },
1033#endif
1034};
1035
ffe7f95b
LL		 1036static int __init rx51_i2c_init(void)
1037{
f52eeee8 1038 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 1039 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 1040 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN		 1041 /* Only older boards use VMMC2 for internal MMC */
1042 rx51_vmmc2.num_consumer_supplies--;
1043 } else {
f52eeee8 1044 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 1045 }
4cfcaef1 1046 rx51_twldata.vmmc2 = &rx51_vmmc2;
827ed9ae 1047 omap3_pmic_get_config(&rx51_twldata,
b252b0ef
PU		 1048 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
1049 TWL_COMMON_REGULATOR_VDAC);
1050
1051 rx51_twldata.vdac->constraints.apply_uV = true;
1052 rx51_twldata.vdac->constraints.name = "VDAC";
1053
fbd8071c 1054 omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
dabe929b
JN		 1055 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
1056 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
4d04317f
TL		 1057#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1058 rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);
1059 rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);
1060#endif
3b511201
AP		 1061 omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
1062 ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
ffe7f95b
LL		 1063 return 0;
1064}
1065
aa62e90f
JY		 1066#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
1067 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
1068
1069static struct mtd_partition onenand_partitions[] = {
1070 {
1071 .name = "bootloader",
1072 .offset = 0,
1073 .size = 0x20000,
1074 .mask_flags = MTD_WRITEABLE, /* Force read-only */
1075 },
1076 {
1077 .name = "config",
1078 .offset = MTDPART_OFS_APPEND,
1079 .size = 0x60000,
1080 },
1081 {
1082 .name = "log",
1083 .offset = MTDPART_OFS_APPEND,
1084 .size = 0x40000,
1085 },
1086 {
1087 .name = "kernel",
1088 .offset = MTDPART_OFS_APPEND,
1089 .size = 0x200000,
1090 },
1091 {
1092 .name = "initfs",
1093 .offset = MTDPART_OFS_APPEND,
1094 .size = 0x200000,
1095 },
1096 {
1097 .name = "rootfs",
1098 .offset = MTDPART_OFS_APPEND,
1099 .size = MTDPART_SIZ_FULL,
1100 },
1101};
1102
5403187f
AK		 1103static struct omap_onenand_platform_data board_onenand_data[] = {
1104 {
1105 .cs = 0,
1106 .gpio_irq = 65,
1107 .parts = onenand_partitions,
1108 .nr_parts = ARRAY_SIZE(onenand_partitions),
1109 .flags = ONENAND_SYNC_READWRITE,
1110 }
aa62e90f 1111};
aa62e90f 1112#endif
ffe7f95b 1113
1a48e157
TL		 1114#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1115
1116static struct omap_smc91x_platform_data board_smc91x_data = {
1117 .cs = 1,
1118 .gpio_irq = 54,
1119 .gpio_pwrdwn = 86,
1120 .gpio_reset = 164,
1121 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
1122};
1123
1124static void __init board_smc91x_init(void)
1125{
4896e394
TL		 1126 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
1127 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
1128 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
1a48e157
TL		 1129
1130 gpmc_smc91x_init(&board_smc91x_data);
1131}
1132
1133#else
1134
1135static inline void board_smc91x_init(void)
1136{
1137}
1138
1139#endif
1140
a24e61a9
KV		 1141static void rx51_wl1251_set_power(bool enable)
1142{
1143 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
1144}
1145
bc593f5d
IG		 1146static struct gpio rx51_wl1251_gpios[] __initdata = {
1147 { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" },
1148 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" },
1149};
1150
a24e61a9
KV		 1151static void __init rx51_init_wl1251(void)
1152{
1153 int irq, ret;
1154
bc593f5d
IG		 1155 ret = gpio_request_array(rx51_wl1251_gpios,
1156 ARRAY_SIZE(rx51_wl1251_gpios));
a24e61a9
KV		 1157 if (ret < 0)
1158 goto error;
1159
a24e61a9
KV		 1160 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
1161 if (irq < 0)
1162 goto err_irq;
1163
1164 wl1251_pdata.set_power = rx51_wl1251_set_power;
1165 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
1166
1167 return;
1168
1169err_irq:
1170 gpio_free(RX51_WL1251_IRQ_GPIO);
a24e61a9 1171 gpio_free(RX51_WL1251_POWER_GPIO);
a24e61a9
KV		 1172error:
1173 printk(KERN_ERR "wl1251 board initialisation failed\n");
1174 wl1251_pdata.set_power = NULL;
1175
1176 /*
1177 * Now rx51_peripherals_spi_board_info[1].irq is zero and
1178 * set_power is null, and wl1251_probe() will fail.
1179 */
1180}
1181
3dad5356
AK		 1182static struct tsc2005_platform_data tsc2005_pdata = {
1183 .ts_pressure_max = 2048,
1184 .ts_pressure_fudge = 2,
1185 .ts_x_max = 4096,
1186 .ts_x_fudge = 4,
1187 .ts_y_max = 4096,
1188 .ts_y_fudge = 7,
1189 .ts_x_plate_ohm = 280,
1190 .esd_timeout_ms = 8000,
1191};
1192
d4860ebe
VZ		 1193static struct gpio rx51_tsc2005_gpios[] __initdata = {
1194 { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" },
1195 { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" },
1196};
1197
3dad5356
AK		 1198static void rx51_tsc2005_set_reset(bool enable)
1199{
1200 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1201}
1202
1203static void __init rx51_init_tsc2005(void)
1204{
1205 int r;
1206
d4860ebe
VZ		 1207 omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT);
1208 omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP);
3dad5356 1209
d4860ebe
VZ		 1210 r = gpio_request_array(rx51_tsc2005_gpios,
1211 ARRAY_SIZE(rx51_tsc2005_gpios));
1212 if (r < 0) {
1213 printk(KERN_ERR "tsc2005 board initialization failed\n");
3dad5356 1214 tsc2005_pdata.esd_timeout_ms = 0;
d4860ebe 1215 return;
3dad5356 1216 }
d4860ebe
VZ		 1217
1218 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
2533c2cf
TL		 1219 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq =
1220 gpio_to_irq(RX51_TSC2005_IRQ_GPIO);
3dad5356
AK		 1221}
1222
ffe7f95b
LL		 1223void __init rx51_peripherals_init(void)
1224{
ffe7f95b 1225 rx51_i2c_init();
094fc559 1226 regulator_has_full_constraints();
5403187f 1227 gpmc_onenand_init(board_onenand_data);
1a48e157 1228 board_smc91x_init();
f014ee32 1229 rx51_add_gpio_keys();
a24e61a9 1230 rx51_init_wl1251();
3dad5356 1231 rx51_init_tsc2005();
589541c0 1232 rx51_init_si4713();
a24e61a9
KV		 1233 spi_register_board_info(rx51_peripherals_spi_board_info,
1234 ARRAY_SIZE(rx51_peripherals_spi_board_info));
112485e9
BC		 1235
1236 partition = omap_mux_get("core");
1237 if (partition)
3b972bf0 1238 omap_hsmmc_init(mmc);
112485e9 1239
10299e2e 1240 rx51_charger_init();
ffe7f95b
LL		 1241}
1242
Linux kernel - Deliverables
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