Commit | Line | Data |
---|---|---|
ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
15 | #include <linux/spi/spi.h> | |
16 | #include <linux/i2c.h> | |
17 | #include <linux/i2c/twl4030.h> | |
18 | #include <linux/clk.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/regulator/machine.h> | |
21 | #include <linux/gpio.h> | |
22 | ||
23 | #include <mach/mcspi.h> | |
24 | #include <mach/mux.h> | |
25 | #include <mach/board.h> | |
26 | #include <mach/common.h> | |
27 | #include <mach/dma.h> | |
28 | #include <mach/gpmc.h> | |
29 | #include <mach/keypad.h> | |
aa62e90f | 30 | #include <mach/onenand.h> |
1a48e157 | 31 | #include <mach/gpmc-smc91x.h> |
ffe7f95b LL |
32 | |
33 | #include "mmc-twl4030.h" | |
34 | ||
f52eeee8 AH |
35 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
36 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
37 | ||
ffe7f95b LL |
38 | static int rx51_keymap[] = { |
39 | KEY(0, 0, KEY_Q), | |
40 | KEY(0, 1, KEY_W), | |
41 | KEY(0, 2, KEY_E), | |
42 | KEY(0, 3, KEY_R), | |
43 | KEY(0, 4, KEY_T), | |
44 | KEY(0, 5, KEY_Y), | |
45 | KEY(0, 6, KEY_U), | |
46 | KEY(0, 7, KEY_I), | |
47 | KEY(1, 0, KEY_O), | |
48 | KEY(1, 1, KEY_D), | |
49 | KEY(1, 2, KEY_DOT), | |
50 | KEY(1, 3, KEY_V), | |
51 | KEY(1, 4, KEY_DOWN), | |
52 | KEY(2, 0, KEY_P), | |
53 | KEY(2, 1, KEY_F), | |
54 | KEY(2, 2, KEY_UP), | |
55 | KEY(2, 3, KEY_B), | |
56 | KEY(2, 4, KEY_RIGHT), | |
57 | KEY(3, 0, KEY_COMMA), | |
58 | KEY(3, 1, KEY_G), | |
59 | KEY(3, 2, KEY_ENTER), | |
60 | KEY(3, 3, KEY_N), | |
61 | KEY(4, 0, KEY_BACKSPACE), | |
62 | KEY(4, 1, KEY_H), | |
63 | KEY(4, 3, KEY_M), | |
64 | KEY(4, 4, KEY_LEFTCTRL), | |
65 | KEY(5, 1, KEY_J), | |
66 | KEY(5, 2, KEY_Z), | |
67 | KEY(5, 3, KEY_SPACE), | |
68 | KEY(5, 4, KEY_LEFTSHIFT), | |
69 | KEY(6, 0, KEY_A), | |
70 | KEY(6, 1, KEY_K), | |
71 | KEY(6, 2, KEY_X), | |
72 | KEY(6, 3, KEY_SPACE), | |
73 | KEY(6, 4, KEY_FN), | |
74 | KEY(7, 0, KEY_S), | |
75 | KEY(7, 1, KEY_L), | |
76 | KEY(7, 2, KEY_C), | |
77 | KEY(7, 3, KEY_LEFT), | |
78 | KEY(0xff, 0, KEY_F6), | |
79 | KEY(0xff, 1, KEY_F7), | |
80 | KEY(0xff, 2, KEY_F8), | |
81 | KEY(0xff, 4, KEY_F9), | |
82 | KEY(0xff, 5, KEY_F10), | |
83 | }; | |
84 | ||
85 | static struct twl4030_keypad_data rx51_kp_data = { | |
86 | .rows = 8, | |
87 | .cols = 8, | |
88 | .keymap = rx51_keymap, | |
89 | .keymapsize = ARRAY_SIZE(rx51_keymap), | |
90 | .rep = 1, | |
91 | }; | |
92 | ||
ffe7f95b LL |
93 | static struct twl4030_madc_platform_data rx51_madc_data = { |
94 | .irq_line = 1, | |
95 | }; | |
96 | ||
97 | static struct twl4030_hsmmc_info mmc[] = { | |
98 | { | |
99 | .name = "external", | |
100 | .mmc = 1, | |
101 | .wires = 4, | |
102 | .cover_only = true, | |
103 | .gpio_cd = 160, | |
104 | .gpio_wp = -EINVAL, | |
105 | }, | |
106 | { | |
107 | .name = "internal", | |
108 | .mmc = 2, | |
109 | .wires = 8, | |
110 | .gpio_cd = -EINVAL, | |
111 | .gpio_wp = -EINVAL, | |
112 | }, | |
113 | {} /* Terminator */ | |
114 | }; | |
115 | ||
116 | static struct regulator_consumer_supply rx51_vmmc1_supply = { | |
117 | .supply = "vmmc", | |
118 | }; | |
119 | ||
120 | static struct regulator_consumer_supply rx51_vmmc2_supply = { | |
121 | .supply = "vmmc", | |
122 | }; | |
123 | ||
124 | static struct regulator_consumer_supply rx51_vsim_supply = { | |
125 | .supply = "vmmc_aux", | |
126 | }; | |
127 | ||
128 | static struct regulator_init_data rx51_vaux1 = { | |
129 | .constraints = { | |
130 | .name = "V28", | |
131 | .min_uV = 2800000, | |
132 | .max_uV = 2800000, | |
133 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
134 | | REGULATOR_MODE_STANDBY, | |
135 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
136 | | REGULATOR_CHANGE_STATUS, | |
137 | }, | |
138 | }; | |
139 | ||
140 | static struct regulator_init_data rx51_vaux2 = { | |
141 | .constraints = { | |
142 | .name = "VCSI", | |
143 | .min_uV = 1800000, | |
144 | .max_uV = 1800000, | |
145 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
146 | | REGULATOR_MODE_STANDBY, | |
147 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
148 | | REGULATOR_CHANGE_STATUS, | |
149 | }, | |
150 | }; | |
151 | ||
152 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 153 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
154 | .constraints = { |
155 | .name = "VCAM_DIG_18", | |
156 | .min_uV = 1800000, | |
157 | .max_uV = 1800000, | |
158 | .apply_uV = true, | |
159 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
160 | | REGULATOR_MODE_STANDBY, | |
161 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
162 | | REGULATOR_CHANGE_STATUS, | |
163 | }, | |
164 | }; | |
165 | ||
f52eeee8 AH |
166 | static struct regulator_init_data rx51_vaux3_mmc = { |
167 | .constraints = { | |
168 | .name = "VMMC2_30", | |
169 | .min_uV = 2800000, | |
170 | .max_uV = 3000000, | |
171 | .apply_uV = true, | |
172 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
173 | | REGULATOR_MODE_STANDBY, | |
174 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
175 | | REGULATOR_CHANGE_MODE | |
176 | | REGULATOR_CHANGE_STATUS, | |
177 | }, | |
178 | .num_consumer_supplies = 1, | |
179 | .consumer_supplies = &rx51_vmmc2_supply, | |
180 | }; | |
181 | ||
ffe7f95b LL |
182 | static struct regulator_init_data rx51_vaux4 = { |
183 | .constraints = { | |
184 | .name = "VCAM_ANA_28", | |
185 | .min_uV = 2800000, | |
186 | .max_uV = 2800000, | |
187 | .apply_uV = true, | |
188 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
189 | | REGULATOR_MODE_STANDBY, | |
190 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
191 | | REGULATOR_CHANGE_STATUS, | |
192 | }, | |
193 | }; | |
194 | ||
195 | static struct regulator_init_data rx51_vmmc1 = { | |
196 | .constraints = { | |
197 | .min_uV = 1850000, | |
198 | .max_uV = 3150000, | |
199 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
200 | | REGULATOR_MODE_STANDBY, | |
201 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
202 | | REGULATOR_CHANGE_MODE | |
203 | | REGULATOR_CHANGE_STATUS, | |
204 | }, | |
205 | .num_consumer_supplies = 1, | |
206 | .consumer_supplies = &rx51_vmmc1_supply, | |
207 | }; | |
208 | ||
209 | static struct regulator_init_data rx51_vmmc2 = { | |
210 | .constraints = { | |
211 | .name = "VMMC2_30", | |
212 | .min_uV = 1850000, | |
213 | .max_uV = 3150000, | |
214 | .apply_uV = true, | |
215 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
216 | | REGULATOR_MODE_STANDBY, | |
217 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
218 | | REGULATOR_CHANGE_MODE | |
219 | | REGULATOR_CHANGE_STATUS, | |
220 | }, | |
221 | .num_consumer_supplies = 1, | |
222 | .consumer_supplies = &rx51_vmmc2_supply, | |
223 | }; | |
224 | ||
225 | static struct regulator_init_data rx51_vsim = { | |
226 | .constraints = { | |
227 | .name = "VMMC2_IO_18", | |
228 | .min_uV = 1800000, | |
229 | .max_uV = 1800000, | |
230 | .apply_uV = true, | |
231 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
232 | | REGULATOR_MODE_STANDBY, | |
233 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
234 | | REGULATOR_CHANGE_STATUS, | |
235 | }, | |
236 | .num_consumer_supplies = 1, | |
237 | .consumer_supplies = &rx51_vsim_supply, | |
238 | }; | |
239 | ||
240 | static struct regulator_init_data rx51_vdac = { | |
241 | .constraints = { | |
242 | .min_uV = 1800000, | |
243 | .max_uV = 1800000, | |
244 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
245 | | REGULATOR_MODE_STANDBY, | |
246 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
247 | | REGULATOR_CHANGE_MODE | |
248 | | REGULATOR_CHANGE_STATUS, | |
249 | }, | |
250 | }; | |
251 | ||
252 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) | |
253 | { | |
254 | /* FIXME this gpio setup is just a placeholder for now */ | |
255 | gpio_request(gpio + 6, "backlight_pwm"); | |
256 | gpio_direction_output(gpio + 6, 0); | |
257 | gpio_request(gpio + 7, "speaker_en"); | |
258 | gpio_direction_output(gpio + 7, 1); | |
259 | ||
260 | /* set up MMC adapters, linking their regulators to them */ | |
261 | twl4030_mmc_init(mmc); | |
262 | rx51_vmmc1_supply.dev = mmc[0].dev; | |
263 | rx51_vmmc2_supply.dev = mmc[1].dev; | |
264 | rx51_vsim_supply.dev = mmc[1].dev; | |
265 | ||
266 | return 0; | |
267 | } | |
268 | ||
269 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
270 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
271 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
272 | .irq_end = TWL4030_GPIO_IRQ_END, | |
273 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) | |
274 | | BIT(4) | BIT(5) | |
275 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
276 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
277 | | BIT(16) | BIT(17) , | |
278 | .setup = rx51_twlgpio_setup, | |
279 | }; | |
280 | ||
dfc27b34 RQ |
281 | static struct twl4030_usb_data rx51_usb_data = { |
282 | .usb_mode = T2_USB_MODE_ULPI, | |
283 | }; | |
284 | ||
9312fffb AK |
285 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
286 | /* | |
287 | * Turn off VDD1 and VDD2. | |
288 | */ | |
289 | {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 4}, | |
290 | {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2}, | |
291 | /* | |
292 | * And also turn off the OMAP3 PLLs and the sysclk output. | |
293 | */ | |
294 | {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 3}, | |
295 | {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_OFF), 3}, | |
296 | }; | |
297 | ||
298 | static struct twl4030_script sleep_on_script __initdata = { | |
299 | .script = sleep_on_seq, | |
300 | .size = ARRAY_SIZE(sleep_on_seq), | |
301 | .flags = TWL4030_SLEEP_SCRIPT, | |
302 | }; | |
303 | ||
304 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
305 | /* | |
306 | * Reenable the OMAP3 PLLs. | |
307 | * Wakeup VDD1 and VDD2. | |
308 | * Reenable sysclk output. | |
309 | */ | |
310 | {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 0x30}, | |
311 | {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 0x30}, | |
312 | {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 0x37}, | |
313 | {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 3}, | |
314 | }; | |
315 | ||
316 | static struct twl4030_script wakeup_script __initdata = { | |
317 | .script = wakeup_seq, | |
318 | .size = ARRAY_SIZE(wakeup_seq), | |
319 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
320 | }; | |
321 | ||
322 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
323 | /* | |
324 | * Wakeup VDD1 (dummy to be able to insert a delay) | |
325 | * Enable CLKEN | |
326 | */ | |
327 | {MSG_SINGULAR(DEV_GRP_P1, 0x17, RES_STATE_ACTIVE), 3}, | |
328 | }; | |
329 | ||
330 | static struct twl4030_script wakeup_p3_script __initdata = { | |
331 | .script = wakeup_p3_seq, | |
332 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
333 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
334 | }; | |
335 | ||
336 | static struct twl4030_ins wrst_seq[] __initdata = { | |
337 | /* | |
338 | * Reset twl4030. | |
339 | * Reset VDD1 regulator. | |
340 | * Reset VDD2 regulator. | |
341 | * Reset VPLL1 regulator. | |
342 | * Enable sysclk output. | |
343 | * Reenable twl4030. | |
344 | */ | |
345 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
346 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
347 | 0x13}, | |
348 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 2, RES_STATE_WRST), 0x13}, | |
349 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, | |
350 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
351 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
352 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
353 | {MSG_SINGULAR(DEV_GRP_P1, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, | |
354 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, | |
355 | }; | |
356 | ||
357 | static struct twl4030_script wrst_script __initdata = { | |
358 | .script = wrst_seq, | |
359 | .size = ARRAY_SIZE(wrst_seq), | |
360 | .flags = TWL4030_WRST_SCRIPT, | |
361 | }; | |
362 | ||
363 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
364 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
365 | board might hit retention before loading of wakeup script is | |
366 | completed. This can cause boot failures depending on timing issues. | |
367 | */ | |
368 | &wakeup_script, | |
369 | &sleep_on_script, | |
370 | &wakeup_p3_script, | |
371 | &wrst_script, | |
372 | }; | |
373 | ||
374 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
375 | { .resource = RES_VINTANA1, .devgroup = -1, .type = -1, .type2 = 1 }, | |
376 | { .resource = RES_VINTANA2, .devgroup = -1, .type = -1, .type2 = 1 }, | |
377 | { .resource = RES_VINTDIG, .devgroup = -1, .type = -1, .type2 = 1 }, | |
378 | { .resource = RES_VMMC1, .devgroup = -1, .type = -1, .type2 = 3}, | |
379 | { .resource = RES_VMMC2, .devgroup = DEV_GRP_NULL, .type = -1, | |
380 | .type2 = 3}, | |
381 | { .resource = RES_VAUX1, .devgroup = -1, .type = -1, .type2 = 3}, | |
382 | { .resource = RES_VAUX2, .devgroup = -1, .type = -1, .type2 = 3}, | |
383 | { .resource = RES_VAUX3, .devgroup = -1, .type = -1, .type2 = 3}, | |
384 | { .resource = RES_VAUX4, .devgroup = -1, .type = -1, .type2 = 3}, | |
385 | { .resource = RES_VPLL2, .devgroup = -1, .type = -1, .type2 = 3}, | |
386 | { .resource = RES_VDAC, .devgroup = -1, .type = -1, .type2 = 3}, | |
387 | { .resource = RES_VSIM, .devgroup = DEV_GRP_NULL, .type = -1, | |
388 | .type2 = 3}, | |
389 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P3, .type = -1, | |
390 | .type2 = 1 }, | |
391 | { 0, 0}, | |
392 | }; | |
393 | ||
394 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
395 | .scripts = twl4030_scripts, | |
396 | .num = ARRAY_SIZE(twl4030_scripts), | |
397 | .resource_config = twl4030_rconfig, | |
398 | }; | |
399 | ||
400 | ||
401 | ||
402 | static struct twl4030_platform_data rx51_twldata __initdata = { | |
ffe7f95b LL |
403 | .irq_base = TWL4030_IRQ_BASE, |
404 | .irq_end = TWL4030_IRQ_END, | |
405 | ||
406 | /* platform_data for children goes here */ | |
407 | .gpio = &rx51_gpio_data, | |
408 | .keypad = &rx51_kp_data, | |
409 | .madc = &rx51_madc_data, | |
dfc27b34 | 410 | .usb = &rx51_usb_data, |
9312fffb | 411 | .power = &rx51_t2scripts_data, |
ffe7f95b LL |
412 | |
413 | .vaux1 = &rx51_vaux1, | |
414 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
415 | .vaux4 = &rx51_vaux4, |
416 | .vmmc1 = &rx51_vmmc1, | |
ffe7f95b LL |
417 | .vsim = &rx51_vsim, |
418 | .vdac = &rx51_vdac, | |
419 | }; | |
420 | ||
421 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_1[] = { | |
422 | { | |
423 | I2C_BOARD_INFO("twl5030", 0x48), | |
424 | .flags = I2C_CLIENT_WAKE, | |
425 | .irq = INT_34XX_SYS_NIRQ, | |
426 | .platform_data = &rx51_twldata, | |
427 | }, | |
428 | }; | |
429 | ||
430 | static int __init rx51_i2c_init(void) | |
431 | { | |
f52eeee8 AH |
432 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
433 | system_rev >= SYSTEM_REV_B_USES_VAUX3) | |
434 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; | |
435 | else { | |
436 | rx51_twldata.vaux3 = &rx51_vaux3_cam; | |
437 | rx51_twldata.vmmc2 = &rx51_vmmc2; | |
438 | } | |
ffe7f95b LL |
439 | omap_register_i2c_bus(1, 2600, rx51_peripherals_i2c_board_info_1, |
440 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); | |
441 | omap_register_i2c_bus(2, 100, NULL, 0); | |
442 | omap_register_i2c_bus(3, 400, NULL, 0); | |
443 | return 0; | |
444 | } | |
445 | ||
aa62e90f JY |
446 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
447 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
448 | ||
449 | static struct mtd_partition onenand_partitions[] = { | |
450 | { | |
451 | .name = "bootloader", | |
452 | .offset = 0, | |
453 | .size = 0x20000, | |
454 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
455 | }, | |
456 | { | |
457 | .name = "config", | |
458 | .offset = MTDPART_OFS_APPEND, | |
459 | .size = 0x60000, | |
460 | }, | |
461 | { | |
462 | .name = "log", | |
463 | .offset = MTDPART_OFS_APPEND, | |
464 | .size = 0x40000, | |
465 | }, | |
466 | { | |
467 | .name = "kernel", | |
468 | .offset = MTDPART_OFS_APPEND, | |
469 | .size = 0x200000, | |
470 | }, | |
471 | { | |
472 | .name = "initfs", | |
473 | .offset = MTDPART_OFS_APPEND, | |
474 | .size = 0x200000, | |
475 | }, | |
476 | { | |
477 | .name = "rootfs", | |
478 | .offset = MTDPART_OFS_APPEND, | |
479 | .size = MTDPART_SIZ_FULL, | |
480 | }, | |
481 | }; | |
482 | ||
483 | static struct omap_onenand_platform_data board_onenand_data = { | |
484 | .cs = 0, | |
485 | .gpio_irq = 65, | |
486 | .parts = onenand_partitions, | |
487 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
c8e6488f | 488 | .flags = ONENAND_SYNC_READWRITE, |
aa62e90f JY |
489 | }; |
490 | ||
491 | static void __init board_onenand_init(void) | |
492 | { | |
493 | gpmc_onenand_init(&board_onenand_data); | |
494 | } | |
495 | ||
496 | #else | |
497 | ||
498 | static inline void board_onenand_init(void) | |
499 | { | |
500 | } | |
501 | ||
502 | #endif | |
ffe7f95b | 503 | |
1a48e157 TL |
504 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
505 | ||
506 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
507 | .cs = 1, | |
508 | .gpio_irq = 54, | |
509 | .gpio_pwrdwn = 86, | |
510 | .gpio_reset = 164, | |
511 | .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL, | |
512 | }; | |
513 | ||
514 | static void __init board_smc91x_init(void) | |
515 | { | |
516 | omap_cfg_reg(U8_34XX_GPIO54_DOWN); | |
517 | omap_cfg_reg(G25_34XX_GPIO86_OUT); | |
518 | omap_cfg_reg(H19_34XX_GPIO164_OUT); | |
519 | ||
520 | gpmc_smc91x_init(&board_smc91x_data); | |
521 | } | |
522 | ||
523 | #else | |
524 | ||
525 | static inline void board_smc91x_init(void) | |
526 | { | |
527 | } | |
528 | ||
529 | #endif | |
530 | ||
ffe7f95b LL |
531 | void __init rx51_peripherals_init(void) |
532 | { | |
ffe7f95b | 533 | rx51_i2c_init(); |
aa62e90f | 534 | board_onenand_init(); |
1a48e157 | 535 | board_smc91x_init(); |
ffe7f95b LL |
536 | } |
537 |