[deliverable/linux.git] / arch / arm / mach-omap2 / board-zoom.c

/*
 * Copyright (C) 2009-2010 Texas Instruments Inc.
 * Mikkel Christensen <mlc@ti.com>
 * Felipe Balbi <balbi@ti.com>
 *
 * Modified from mach-omap2/board-ldp.c
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/gpio.h>
#include <linux/i2c/twl.h>
#include <linux/mtd/nand.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>

#include <plat/common.h>
#include <plat/board.h>
#include <plat/usb.h>

#include <mach/board-zoom.h>

#include "board-flash.h"
#include "mux.h"
#include "sdram-micron-mt46h32m32lf-6.h"
#include "sdram-hynix-h8mbx00u0mer-0em.h"

#define ZOOM3_EHCI_RESET_GPIO		64

static void __init omap_zoom_init_early(void)
{
	omap2_init_common_infrastructure();
}

#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
	/* WLAN IRQ - GPIO 162 */
	OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
	/* WLAN POWER ENABLE - GPIO 101 */
	OMAP3_MUX(CAM_D2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
	/* WLAN SDIO: MMC3 CMD */
	OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP),
	/* WLAN SDIO: MMC3 CLK */
	OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
	/* WLAN SDIO: MMC3 DAT[0-3] */
	OMAP3_MUX(ETK_D3, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
	OMAP3_MUX(ETK_D4, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
	OMAP3_MUX(ETK_D5, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
	OMAP3_MUX(ETK_D6, OMAP_MUX_MODE2 | OMAP_PIN_INPUT_PULLUP),
	{ .reg_offset = OMAP_MUX_TERMINATOR },
};
#endif

static struct mtd_partition zoom_nand_partitions[] = {
	/* All the partition sizes are listed in terms of NAND block size */
	{
		.name		= "X-Loader-NAND",
		.offset		= 0,
		.size		= 4 * (64 * 2048),	/* 512KB, 0x80000 */
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "U-Boot-NAND",
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x80000 */
		.size		= 10 * (64 * 2048),	/* 1.25MB, 0x140000 */
		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
	},
	{
		.name		= "Boot Env-NAND",
		.offset		= MTDPART_OFS_APPEND,   /* Offset = 0x1c0000 */
		.size		= 2 * (64 * 2048),	/* 256KB, 0x40000 */
	},
	{
		.name		= "Kernel-NAND",
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x0200000*/
		.size		= 240 * (64 * 2048),	/* 30M, 0x1E00000 */
	},
	{
		.name		= "system",
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x2000000 */
		.size		= 3328 * (64 * 2048),	/* 416M, 0x1A000000 */
	},
	{
		.name		= "userdata",
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x1C000000*/
		.size		= 256 * (64 * 2048),	/* 32M, 0x2000000 */
	},
	{
		.name		= "cache",
		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x1E000000*/
		.size		= 256 * (64 * 2048),	/* 32M, 0x2000000 */
	},
};

static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
	.port_mode[0]		= OMAP_USBHS_PORT_MODE_UNUSED,
	.port_mode[1]		= OMAP_EHCI_PORT_MODE_PHY,
	.port_mode[2]		= OMAP_USBHS_PORT_MODE_UNUSED,
	.phy_reset		= true,
	.reset_gpio_port[0]	= -EINVAL,
	.reset_gpio_port[1]	= ZOOM3_EHCI_RESET_GPIO,
	.reset_gpio_port[2]	= -EINVAL,
};

static void __init omap_zoom_init(void)
{
	if (machine_is_omap_zoom2()) {
		omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
	} else if (machine_is_omap_zoom3()) {
		omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
		omap_mux_init_gpio(ZOOM3_EHCI_RESET_GPIO, OMAP_PIN_OUTPUT);
		usbhs_init(&usbhs_bdata);
	}

	board_nand_init(zoom_nand_partitions, ARRAY_SIZE(zoom_nand_partitions),
						ZOOM_NAND_CS, NAND_BUSWIDTH_16);
	zoom_debugboard_init();
	zoom_peripherals_init();

	if (machine_is_omap_zoom2())
		omap_sdrc_init(mt46h32m32lf6_sdrc_params,
					  mt46h32m32lf6_sdrc_params);
	else if (machine_is_omap_zoom3())
		omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
					  h8mbx00u0mer0em_sdrc_params);

	zoom_display_init();
}

MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
	.boot_params	= 0x80000100,
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap_zoom_init_early,
	.init_irq	= omap3_init_irq,
	.init_machine	= omap_zoom_init,
	.timer		= &omap3_timer,
MACHINE_END

MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
	.boot_params	= 0x80000100,
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap_zoom_init_early,
	.init_irq	= omap3_init_irq,
	.init_machine	= omap_zoom_init,
	.timer		= &omap3_timer,
MACHINE_END
Commit	Line	Data
5f35fbe8	1	/*
20826853 FB	2	* Copyright (C) 2009-2010 Texas Instruments Inc.
	3	* Mikkel Christensen <mlc@ti.com>
	4	* Felipe Balbi <balbi@ti.com>
5f35fbe8	5	*
20826853	6	* Modified from mach-omap2/board-ldp.c
5f35fbe8	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
	12
	13	#include <linux/kernel.h>
	14	#include <linux/init.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/input.h>
	17	#include <linux/gpio.h>
20826853	18	#include <linux/i2c/twl.h>
d5ce2b65	19	#include <linux/mtd/nand.h>
5f35fbe8	20
	21	#include <asm/mach-types.h>
	22	#include <asm/mach/arch.h>
	23
5f35fbe8	24	#include <plat/common.h>
5f35fbe8	25	#include <plat/board.h>
31e464cd	26	#include <plat/usb.h>
5f35fbe8	27
20826853 FB	28	#include <mach/board-zoom.h>
20826853 FB	29
04aeae77	30	#include "board-flash.h"
662c8b55	31	#include "mux.h"
20826853	32	#include "sdram-micron-mt46h32m32lf-6.h"
5f35fbe8	33	#include "sdram-hynix-h8mbx00u0mer-0em.h"
5f35fbe8	34
c6c4dea4 FB	35	#define ZOOM3_EHCI_RESET_GPIO 64
c6c4dea4 FB	36
3dc3bad6	37	static void __init omap_zoom_init_early(void)
20826853	38	{
4805734b	39	omap2_init_common_infrastructure();
20826853 FB	40	}
	41
	42	#ifdef CONFIG_OMAP_MUX
	43	static struct omap_board_mux board_mux[] __initdata = {
	44	/* WLAN IRQ - GPIO 162 */
02b7b94e	45	OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 \| OMAP_PIN_INPUT),
20826853 FB	46	/* WLAN POWER ENABLE - GPIO 101 */
	47	OMAP3_MUX(CAM_D2, OMAP_MUX_MODE4 \| OMAP_PIN_OUTPUT),
	48	/* WLAN SDIO: MMC3 CMD */
	49	OMAP3_MUX(MCSPI1_CS1, OMAP_MUX_MODE3 \| OMAP_PIN_INPUT_PULLUP),
	50	/* WLAN SDIO: MMC3 CLK */
	51	OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE2 \| OMAP_PIN_INPUT_PULLUP),
	52	/* WLAN SDIO: MMC3 DAT[0-3] */
	53	OMAP3_MUX(ETK_D3, OMAP_MUX_MODE2 \| OMAP_PIN_INPUT_PULLUP),
	54	OMAP3_MUX(ETK_D4, OMAP_MUX_MODE2 \| OMAP_PIN_INPUT_PULLUP),
	55	OMAP3_MUX(ETK_D5, OMAP_MUX_MODE2 \| OMAP_PIN_INPUT_PULLUP),
	56	OMAP3_MUX(ETK_D6, OMAP_MUX_MODE2 \| OMAP_PIN_INPUT_PULLUP),
	57	{ .reg_offset = OMAP_MUX_TERMINATOR },
5f35fbe8	58	};
20826853	59	#endif
5f35fbe8	60
e08b105e SG	61	static struct mtd_partition zoom_nand_partitions[] = {
	62	/* All the partition sizes are listed in terms of NAND block size */
	63	{
	64	.name = "X-Loader-NAND",
	65	.offset = 0,
	66	.size = 4 * (64 * 2048), /* 512KB, 0x80000 */
	67	.mask_flags = MTD_WRITEABLE, /* force read-only */
	68	},
	69	{
	70	.name = "U-Boot-NAND",
	71	.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
	72	.size = 10 * (64 * 2048), /* 1.25MB, 0x140000 */
	73	.mask_flags = MTD_WRITEABLE, /* force read-only */
	74	},
	75	{
	76	.name = "Boot Env-NAND",
	77	.offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
	78	.size = 2 * (64 * 2048), /* 256KB, 0x40000 */
	79	},
	80	{
	81	.name = "Kernel-NAND",
	82	.offset = MTDPART_OFS_APPEND, /* Offset = 0x0200000*/
	83	.size = 240 * (64 * 2048), /* 30M, 0x1E00000 */
	84	},
	85	{
	86	.name = "system",
	87	.offset = MTDPART_OFS_APPEND, /* Offset = 0x2000000 */
	88	.size = 3328 * (64 * 2048), /* 416M, 0x1A000000 */
	89	},
	90	{
	91	.name = "userdata",
	92	.offset = MTDPART_OFS_APPEND, /* Offset = 0x1C000000*/
	93	.size = 256 * (64 * 2048), /* 32M, 0x2000000 */
	94	},
	95	{
	96	.name = "cache",
	97	.offset = MTDPART_OFS_APPEND, /* Offset = 0x1E000000*/
	98	.size = 256 * (64 * 2048), /* 32M, 0x2000000 */
	99	},
	100	};
	101
181b250c KM	102	static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
	103	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
	104	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
	105	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
31e464cd	106	.phy_reset = true,
31e464cd	107	.reset_gpio_port[0] = -EINVAL,
c6c4dea4	108	.reset_gpio_port[1] = ZOOM3_EHCI_RESET_GPIO,
31e464cd	109	.reset_gpio_port[2] = -EINVAL,
	110	};
	111
5f35fbe8	112	static void __init omap_zoom_init(void)
5f35fbe8	113	{
20826853 FB	114	if (machine_is_omap_zoom2()) {
	115	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
	116	} else if (machine_is_omap_zoom3()) {
	117	omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
c6c4dea4	118	omap_mux_init_gpio(ZOOM3_EHCI_RESET_GPIO, OMAP_PIN_OUTPUT);
9e64bb1e	119	usbhs_init(&usbhs_bdata);
20826853 FB	120	}
20826853 FB	121
d5ce2b65 SG	122	board_nand_init(zoom_nand_partitions, ARRAY_SIZE(zoom_nand_partitions),
d5ce2b65 SG	123	ZOOM_NAND_CS, NAND_BUSWIDTH_16);
5f35fbe8	124	zoom_debugboard_init();
20826853	125	zoom_peripherals_init();
a4ca9dbe TL	126
	127	if (machine_is_omap_zoom2())
	128	omap_sdrc_init(mt46h32m32lf6_sdrc_params,
	129	mt46h32m32lf6_sdrc_params);
	130	else if (machine_is_omap_zoom3())
	131	omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
	132	h8mbx00u0mer0em_sdrc_params);
	133
ed3f9095	134	zoom_display_init();
5f35fbe8	135	}
5f35fbe8	136
20826853 FB	137	MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
20826853 FB	138	.boot_params = 0x80000100,
20826853	139	.reserve = omap_reserve,
3dc3bad6 RKAL	140	.map_io = omap3_map_io,
3dc3bad6 RKAL	141	.init_early = omap_zoom_init_early,
741e3a89	142	.init_irq = omap3_init_irq,
20826853	143	.init_machine = omap_zoom_init,
e74984e4	144	.timer = &omap3_timer,
20826853 FB	145	MACHINE_END
20826853 FB	146
5f35fbe8	147	MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
5f35fbe8	148	.boot_params = 0x80000100,
71ee7dad	149	.reserve = omap_reserve,
3dc3bad6 RKAL	150	.map_io = omap3_map_io,
3dc3bad6 RKAL	151	.init_early = omap_zoom_init_early,
741e3a89	152	.init_irq = omap3_init_irq,
5f35fbe8	153	.init_machine = omap_zoom_init,
e74984e4	154	.timer = &omap3_timer,
5f35fbe8	155	MACHINE_END