Merge branch 'core-hweight-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / arm / mach-omap2 / clock2xxx.c
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046d6b28 1/*
da4d2904 2 * clock2xxx.c - OMAP2xxx-specific clock integration code
046d6b28 3 *
da4d2904
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4 * Copyright (C) 2005-2008 Texas Instruments, Inc.
5 * Copyright (C) 2004-2010 Nokia Corporation
046d6b28 6 *
da4d2904
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7 * Contacts:
8 * Richard Woodruff <r-woodruff2@ti.com>
9 * Paul Walmsley
046d6b28 10 *
da4d2904
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11 * Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
12 * Gordon McNutt and RidgeRun, Inc.
046d6b28
TL
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 */
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18#undef DEBUG
19
046d6b28 20#include <linux/kernel.h>
046d6b28 21#include <linux/errno.h>
f8ce2547 22#include <linux/clk.h>
6b8858a9 23#include <linux/io.h>
046d6b28 24
ce491cf8 25#include <plat/clock.h>
046d6b28 26
6b8858a9 27#include "clock.h"
d8a94458 28#include "clock2xxx.h"
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29#include "cm.h"
30#include "cm-regbits-24xx.h"
046d6b28 31
d8a94458 32struct clk *vclk, *sclk, *dclk;
046d6b28 33
da4d2904 34/*
6b8858a9 35 * Omap24xx specific clock functions
da4d2904 36 */
046d6b28 37
ae78dcf7
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38/*
39 * Set clocks for bypass mode for reboot to work.
40 */
feec1277 41void omap2xxx_clk_prepare_for_reboot(void)
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42{
43 u32 rate;
44
45 if (vclk == NULL || sclk == NULL)
46 return;
47
48 rate = clk_get_rate(sclk);
49 clk_set_rate(vclk, rate);
50}
51
046d6b28 52/*
4d30e82c
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53 * Switch the MPU rate if specified on cmdline. We cannot do this
54 * early until cmdline is parsed. XXX This should be removed from the
55 * clock code and handled by the OPP layer code in the near future.
046d6b28 56 */
4680c29f 57static int __init omap2xxx_clk_arch_init(void)
046d6b28 58{
4d30e82c 59 int ret;
d8a94458 60
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61 if (!cpu_is_omap24xx())
62 return 0;
63
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64 ret = omap2_clk_switch_mpurate_at_boot("virt_prcm_set");
65 if (!ret)
66 omap2_clk_print_new_rates("sys_ck", "dpll_ck", "mpu_ck");
046d6b28 67
4d30e82c 68 return ret;
046d6b28 69}
4d30e82c 70
4680c29f 71arch_initcall(omap2xxx_clk_arch_init);
046d6b28 72
046d6b28 73
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