projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| d8a94458 PW |
1 | /* |
| 2 | * OMAP2 clock function prototypes and macros | |
| 3 | * | |
| 81b34fbe PW |
4 | * Copyright (C) 2005-2010 Texas Instruments, Inc. |
| 5 | * Copyright (C) 2004-2010 Nokia Corporation | |
| d8a94458 PW |
6 | */ |
| 7 | ||
| 81b34fbe PW |
8 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H |
| 9 | #define __ARCH_ARM_MACH_OMAP2_CLOCK2XXX_H | |
| d8a94458 | 10 | |
| ed1ebc49 RN |
11 | #include <linux/clk-provider.h> |
| 12 | #include "clock.h" | |
| 13 | ||
| 14 | unsigned long omap2_table_mpu_recalc(struct clk_hw *clk, | |
| 15 | unsigned long parent_rate); | |
| 16 | int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, | |
| 17 | unsigned long parent_rate); | |
| 18 | long omap2_round_to_table_rate(struct clk_hw *hw, unsigned long rate, | |
| 19 | unsigned long *parent_rate); | |
| 20 | unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk, | |
| 21 | unsigned long parent_rate); | |
| 22 | unsigned long omap2_osc_clk_recalc(struct clk_hw *clk, | |
| 23 | unsigned long parent_rate); | |
| 24 | unsigned long omap2_dpllcore_recalc(struct clk_hw *hw, | |
| 25 | unsigned long parent_rate); | |
| 26 | int omap2_reprogram_dpllcore(struct clk_hw *clk, unsigned long rate, | |
| 27 | unsigned long parent_rate); | |
| 28 | void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw); | |
| 7a2bd1cc PW |
29 | unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw, |
| 30 | unsigned long parent_rate); | |
| 31 | unsigned long omap2_clk_apll96_recalc(struct clk_hw *hw, | |
| 32 | unsigned long parent_rate); | |
| 5f039377 | 33 | unsigned long omap2xxx_clk_get_core_rate(void); |
| 49214640 | 34 | u32 omap2xxx_get_apll_clkin(void); |
| 87a1b26c | 35 | u32 omap2xxx_get_sysclkdiv(void); |
| feec1277 | 36 | void omap2xxx_clk_prepare_for_reboot(void); |
| baa689b8 PW |
37 | void omap2xxx_clkt_vps_check_bootloader_rates(void); |
| 38 | void omap2xxx_clkt_vps_late_init(void); | |
| d8a94458 | 39 | |
| 59b479e0 | 40 | #ifdef CONFIG_SOC_OMAP2420 |
| 81b34fbe | 41 | int omap2420_clk_init(void); |
| d8a94458 | 42 | #else |
| b481cea3 | 43 | #define omap2420_clk_init() do { } while(0) |
| d8a94458 PW |
44 | #endif |
| 45 | ||
| 59b479e0 | 46 | #ifdef CONFIG_SOC_OMAP2430 |
| 81b34fbe PW |
47 | int omap2430_clk_init(void); |
| 48 | #else | |
| b481cea3 | 49 | #define omap2430_clk_init() do { } while(0) |
| 81b34fbe PW |
50 | #endif |
| 51 | ||
| b6ffa050 | 52 | extern void __iomem *prcm_clksrc_ctrl; |
| d8a94458 | 53 | |
| ed1ebc49 RN |
54 | extern struct clk_hw *dclk_hw; |
| 55 | int omap2_enable_osc_ck(struct clk_hw *hw); | |
| 56 | void omap2_disable_osc_ck(struct clk_hw *hw); | |
| 57 | int omap2_clk_apll96_enable(struct clk_hw *hw); | |
| 58 | int omap2_clk_apll54_enable(struct clk_hw *hw); | |
| 59 | void omap2_clk_apll96_disable(struct clk_hw *hw); | |
| 60 | void omap2_clk_apll54_disable(struct clk_hw *hw); | |
| d8a94458 PW |
61 | |
| 62 | #endif |