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d8a94458 PW |
1 | /* |
2 | * OMAP2 clock function prototypes and macros | |
3 | * | |
4 | * Copyright (C) 2005-2009 Texas Instruments, Inc. | |
5 | * Copyright (C) 2004-2009 Nokia Corporation | |
6 | */ | |
7 | ||
8 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_24XX_H | |
9 | #define __ARCH_ARM_MACH_OMAP2_CLOCK_24XX_H | |
10 | ||
11 | unsigned long omap2_table_mpu_recalc(struct clk *clk); | |
12 | int omap2_select_table_rate(struct clk *clk, unsigned long rate); | |
13 | long omap2_round_to_table_rate(struct clk *clk, unsigned long rate); | |
44da0a51 | 14 | unsigned long omap2xxx_sys_clk_recalc(struct clk *clk); |
d8a94458 | 15 | unsigned long omap2_osc_clk_recalc(struct clk *clk); |
d8a94458 PW |
16 | unsigned long omap2_dpllcore_recalc(struct clk *clk); |
17 | int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate); | |
18 | unsigned long omap2xxx_clk_get_core_rate(struct clk *clk); | |
49214640 | 19 | u32 omap2xxx_get_apll_clkin(void); |
87a1b26c | 20 | u32 omap2xxx_get_sysclkdiv(void); |
feec1277 | 21 | void omap2xxx_clk_prepare_for_reboot(void); |
e80a9729 | 22 | int omap2xxx_clk_init(void); |
d8a94458 PW |
23 | |
24 | /* REVISIT: These should be set dynamically for CONFIG_MULTI_OMAP2 */ | |
25 | #ifdef CONFIG_ARCH_OMAP2420 | |
26 | #define OMAP_CM_REGADDR OMAP2420_CM_REGADDR | |
27 | #define OMAP24XX_PRCM_CLKOUT_CTRL OMAP2420_PRCM_CLKOUT_CTRL | |
28 | #define OMAP24XX_PRCM_CLKEMUL_CTRL OMAP2420_PRCM_CLKEMUL_CTRL | |
29 | #else | |
30 | #define OMAP_CM_REGADDR OMAP2430_CM_REGADDR | |
31 | #define OMAP24XX_PRCM_CLKOUT_CTRL OMAP2430_PRCM_CLKOUT_CTRL | |
32 | #define OMAP24XX_PRCM_CLKEMUL_CTRL OMAP2430_PRCM_CLKEMUL_CTRL | |
33 | #endif | |
34 | ||
35 | extern void __iomem *prcm_clksrc_ctrl; | |
36 | ||
37 | extern struct clk *dclk; | |
38 | ||
39 | extern const struct clkops clkops_omap2430_i2chs_wait; | |
40 | extern const struct clkops clkops_oscck; | |
41 | extern const struct clkops clkops_apll96; | |
42 | extern const struct clkops clkops_apll54; | |
43 | ||
44 | #endif |