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657ebfad PW |
1 | /* |
2 | * OMAP3517/3505-specific clock framework functions | |
3 | * | |
4 | * Copyright (C) 2010 Texas Instruments, Inc. | |
ec538e30 | 5 | * Copyright (C) 2011 Nokia Corporation |
657ebfad PW |
6 | * |
7 | * Ranjith Lohithakshan | |
8 | * Paul Walmsley | |
9 | * | |
10 | * Parts of this code are based on code written by | |
11 | * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu, | |
12 | * Russell King | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License version 2 as | |
16 | * published by the Free Software Foundation. | |
17 | */ | |
18 | #undef DEBUG | |
19 | ||
20 | #include <linux/kernel.h> | |
21 | #include <linux/clk.h> | |
22 | #include <linux/io.h> | |
23 | ||
657ebfad PW |
24 | #include "clock.h" |
25 | #include "clock3517.h" | |
ff4ae5d9 | 26 | #include "cm3xxx.h" |
657ebfad PW |
27 | #include "cm-regbits-34xx.h" |
28 | ||
29 | /* | |
30 | * In AM35xx IPSS, the {ICK,FCK} enable bits for modules are exported | |
31 | * in the same register at a bit offset of 0x8. The EN_ACK for ICK is | |
32 | * at an offset of 4 from ICK enable bit. | |
33 | */ | |
34 | #define AM35XX_IPSS_ICK_MASK 0xF | |
35 | #define AM35XX_IPSS_ICK_EN_ACK_OFFSET 0x4 | |
36 | #define AM35XX_IPSS_ICK_FCK_OFFSET 0x8 | |
37 | #define AM35XX_IPSS_CLK_IDLEST_VAL 0 | |
38 | ||
39 | /** | |
40 | * am35xx_clk_find_idlest - return clock ACK info for AM35XX IPSS | |
41 | * @clk: struct clk * being enabled | |
42 | * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into | |
43 | * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into | |
44 | * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator | |
45 | * | |
46 | * The interface clocks on AM35xx IPSS reflects the clock idle status | |
47 | * in the enable register itsel at a bit offset of 4 from the enable | |
48 | * bit. A value of 1 indicates that clock is enabled. | |
49 | */ | |
b4777a21 | 50 | static void am35xx_clk_find_idlest(struct clk_hw_omap *clk, |
657ebfad PW |
51 | void __iomem **idlest_reg, |
52 | u8 *idlest_bit, | |
53 | u8 *idlest_val) | |
54 | { | |
55 | *idlest_reg = (__force void __iomem *)(clk->enable_reg); | |
56 | *idlest_bit = clk->enable_bit + AM35XX_IPSS_ICK_EN_ACK_OFFSET; | |
57 | *idlest_val = AM35XX_IPSS_CLK_IDLEST_VAL; | |
58 | } | |
59 | ||
60 | /** | |
61 | * am35xx_clk_find_companion - find companion clock to @clk | |
62 | * @clk: struct clk * to find the companion clock of | |
63 | * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in | |
64 | * @other_bit: u8 ** to return the companion clock bit shift in | |
65 | * | |
66 | * Some clocks don't have companion clocks. For example, modules with | |
67 | * only an interface clock (such as HECC) don't have a companion | |
68 | * clock. Right now, this code relies on the hardware exporting a bit | |
69 | * in the correct companion register that indicates that the | |
70 | * nonexistent 'companion clock' is active. Future patches will | |
71 | * associate this type of code with per-module data structures to | |
72 | * avoid this issue, and remove the casts. No return value. | |
73 | */ | |
b4777a21 RN |
74 | static void am35xx_clk_find_companion(struct clk_hw_omap *clk, |
75 | void __iomem **other_reg, | |
b4777a21 | 76 | u8 *other_bit) |
657ebfad PW |
77 | { |
78 | *other_reg = (__force void __iomem *)(clk->enable_reg); | |
79 | if (clk->enable_bit & AM35XX_IPSS_ICK_MASK) | |
80 | *other_bit = clk->enable_bit + AM35XX_IPSS_ICK_FCK_OFFSET; | |
81 | else | |
82 | *other_bit = clk->enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET; | |
83 | } | |
b4777a21 RN |
84 | const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait = { |
85 | .find_idlest = am35xx_clk_find_idlest, | |
86 | .find_companion = am35xx_clk_find_companion, | |
87 | }; | |
657ebfad PW |
88 | |
89 | /** | |
90 | * am35xx_clk_ipss_find_idlest - return CM_IDLEST info for IPSS | |
91 | * @clk: struct clk * being enabled | |
92 | * @idlest_reg: void __iomem ** to store CM_IDLEST reg address into | |
93 | * @idlest_bit: pointer to a u8 to store the CM_IDLEST bit shift into | |
94 | * @idlest_val: pointer to a u8 to store the CM_IDLEST indicator | |
95 | * | |
96 | * The IPSS target CM_IDLEST bit is at a different shift from the | |
97 | * CM_{I,F}CLKEN bit. Pass back the correct info via @idlest_reg | |
98 | * and @idlest_bit. No return value. | |
99 | */ | |
b4777a21 | 100 | static void am35xx_clk_ipss_find_idlest(struct clk_hw_omap *clk, |
657ebfad PW |
101 | void __iomem **idlest_reg, |
102 | u8 *idlest_bit, | |
103 | u8 *idlest_val) | |
104 | { | |
105 | u32 r; | |
106 | ||
107 | r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); | |
108 | *idlest_reg = (__force void __iomem *)r; | |
109 | *idlest_bit = AM35XX_ST_IPSS_SHIFT; | |
110 | *idlest_val = OMAP34XX_CM_IDLEST_VAL; | |
111 | } | |
25f4214e | 112 | |
b4777a21 RN |
113 | const struct clk_hw_omap_ops clkhwops_am35xx_ipss_wait = { |
114 | .allow_idle = omap2_clkt_iclk_allow_idle, | |
115 | .deny_idle = omap2_clkt_iclk_deny_idle, | |
116 | .find_idlest = am35xx_clk_ipss_find_idlest, | |
117 | .find_companion = omap2_clk_dflt_find_companion, | |
118 | }; |