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972c5427 RN |
1 | /* |
2 | * OMAP4 clock function prototypes and macros | |
3 | * | |
4 | * Copyright (C) 2009 Texas Instruments, Inc. | |
93340a22 | 5 | * Copyright (C) 2010 Nokia Corporation |
972c5427 RN |
6 | */ |
7 | ||
657ebfad PW |
8 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H |
9 | #define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H | |
972c5427 | 10 | |
a1900f2e MT |
11 | /* |
12 | * OMAP4430_REGM4XEN_MULT: If the CM_CLKMODE_DPLL_ABE.DPLL_REGM4XEN bit is | |
13 | * set, then the DPLL's lock frequency is multiplied by 4 (OMAP4430 TRM | |
14 | * vV Section 3.6.3.3.1 "DPLLs Output Clocks Parameters") | |
15 | */ | |
16 | #define OMAP4430_REGM4XEN_MULT 4 | |
17 | ||
e80a9729 PW |
18 | int omap4xxx_clk_init(void); |
19 | ||
972c5427 | 20 | #endif |