[deliverable/linux.git] / arch / arm / mach-omap2 / cm2xxx_3xxx.c

/*
 * OMAP2/3 CM module functions
 *
 * Copyright (C) 2009 Nokia Corporation
 * Paul Walmsley
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/io.h>

#include <plat/common.h>

#include "cm.h"
#include "cm2xxx_3xxx.h"
#include "cm-regbits-24xx.h"
#include "cm-regbits-34xx.h"

static const u8 cm_idlest_offs[] = {
	CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
};

u32 cm_read_mod_reg(s16 module, u16 idx)
{
	return __raw_readl(cm_base + module + idx);
}

void cm_write_mod_reg(u32 val, s16 module, u16 idx)
{
	__raw_writel(val, cm_base + module + idx);
}

/* Read-modify-write a register in a CM module. Caller must lock */
u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx)
{
	u32 v;

	v = cm_read_mod_reg(module, idx);
	v &= ~mask;
	v |= bits;
	cm_write_mod_reg(v, module, idx);

	return v;
}

u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
{
	return cm_rmw_mod_reg_bits(bits, bits, module, idx);
}

u32 cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
{
	return cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
}

/**
 * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby
 * @prcm_mod: PRCM module offset
 * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
 *
 * XXX document
 */
int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
{
	int ena = 0, i = 0;
	u8 cm_idlest_reg;
	u32 mask;

	if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs)))
		return -EINVAL;

	cm_idlest_reg = cm_idlest_offs[idlest_id - 1];

	mask = 1 << idlest_shift;

	if (cpu_is_omap24xx())
		ena = mask;
	else if (cpu_is_omap34xx())
		ena = 0;
	else
		BUG();

	omap_test_timeout(((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena),
			  MAX_MODULE_READY_TIME, i);

	return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
}

/*
 * Context save/restore code - OMAP3 only
 */
#ifdef CONFIG_ARCH_OMAP3
struct omap3_cm_regs {
	u32 iva2_cm_clksel1;
	u32 iva2_cm_clksel2;
	u32 cm_sysconfig;
	u32 sgx_cm_clksel;
	u32 dss_cm_clksel;
	u32 cam_cm_clksel;
	u32 per_cm_clksel;
	u32 emu_cm_clksel;
	u32 emu_cm_clkstctrl;
	u32 pll_cm_autoidle2;
	u32 pll_cm_clksel4;
	u32 pll_cm_clksel5;
	u32 pll_cm_clken2;
	u32 cm_polctrl;
	u32 iva2_cm_fclken;
	u32 iva2_cm_clken_pll;
	u32 core_cm_fclken1;
	u32 core_cm_fclken3;
	u32 sgx_cm_fclken;
	u32 wkup_cm_fclken;
	u32 dss_cm_fclken;
	u32 cam_cm_fclken;
	u32 per_cm_fclken;
	u32 usbhost_cm_fclken;
	u32 core_cm_iclken1;
	u32 core_cm_iclken2;
	u32 core_cm_iclken3;
	u32 sgx_cm_iclken;
	u32 wkup_cm_iclken;
	u32 dss_cm_iclken;
	u32 cam_cm_iclken;
	u32 per_cm_iclken;
	u32 usbhost_cm_iclken;
	u32 iva2_cm_autoidle2;
	u32 mpu_cm_autoidle2;
	u32 iva2_cm_clkstctrl;
	u32 mpu_cm_clkstctrl;
	u32 core_cm_clkstctrl;
	u32 sgx_cm_clkstctrl;
	u32 dss_cm_clkstctrl;
	u32 cam_cm_clkstctrl;
	u32 per_cm_clkstctrl;
	u32 neon_cm_clkstctrl;
	u32 usbhost_cm_clkstctrl;
	u32 core_cm_autoidle1;
	u32 core_cm_autoidle2;
	u32 core_cm_autoidle3;
	u32 wkup_cm_autoidle;
	u32 dss_cm_autoidle;
	u32 cam_cm_autoidle;
	u32 per_cm_autoidle;
	u32 usbhost_cm_autoidle;
	u32 sgx_cm_sleepdep;
	u32 dss_cm_sleepdep;
	u32 cam_cm_sleepdep;
	u32 per_cm_sleepdep;
	u32 usbhost_cm_sleepdep;
	u32 cm_clkout_ctrl;
};

static struct omap3_cm_regs cm_context;

void omap3_cm_save_context(void)
{
	cm_context.iva2_cm_clksel1 =
		cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1);
	cm_context.iva2_cm_clksel2 =
		cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2);
	cm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG);
	cm_context.sgx_cm_clksel =
		cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
	cm_context.dss_cm_clksel =
		cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL);
	cm_context.cam_cm_clksel =
		cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSEL);
	cm_context.per_cm_clksel =
		cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSEL);
	cm_context.emu_cm_clksel =
		cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);
	cm_context.emu_cm_clkstctrl =
		cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);
	cm_context.pll_cm_autoidle2 =
		cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
	cm_context.pll_cm_clksel4 =
		cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4);
	cm_context.pll_cm_clksel5 =
		cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
	cm_context.pll_cm_clken2 =
		cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2);
	cm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL);
	cm_context.iva2_cm_fclken =
		cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN);
	cm_context.iva2_cm_clken_pll = cm_read_mod_reg(OMAP3430_IVA2_MOD,
						       OMAP3430_CM_CLKEN_PLL);
	cm_context.core_cm_fclken1 =
		cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
	cm_context.core_cm_fclken3 =
		cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
	cm_context.sgx_cm_fclken =
		cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN);
	cm_context.wkup_cm_fclken =
		cm_read_mod_reg(WKUP_MOD, CM_FCLKEN);
	cm_context.dss_cm_fclken =
		cm_read_mod_reg(OMAP3430_DSS_MOD, CM_FCLKEN);
	cm_context.cam_cm_fclken =
		cm_read_mod_reg(OMAP3430_CAM_MOD, CM_FCLKEN);
	cm_context.per_cm_fclken =
		cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN);
	cm_context.usbhost_cm_fclken =
		cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN);
	cm_context.core_cm_iclken1 =
		cm_read_mod_reg(CORE_MOD, CM_ICLKEN1);
	cm_context.core_cm_iclken2 =
		cm_read_mod_reg(CORE_MOD, CM_ICLKEN2);
	cm_context.core_cm_iclken3 =
		cm_read_mod_reg(CORE_MOD, CM_ICLKEN3);
	cm_context.sgx_cm_iclken =
		cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_ICLKEN);
	cm_context.wkup_cm_iclken =
		cm_read_mod_reg(WKUP_MOD, CM_ICLKEN);
	cm_context.dss_cm_iclken =
		cm_read_mod_reg(OMAP3430_DSS_MOD, CM_ICLKEN);
	cm_context.cam_cm_iclken =
		cm_read_mod_reg(OMAP3430_CAM_MOD, CM_ICLKEN);
	cm_context.per_cm_iclken =
		cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN);
	cm_context.usbhost_cm_iclken =
		cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN);
	cm_context.iva2_cm_autoidle2 =
		cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
	cm_context.mpu_cm_autoidle2 =
		cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2);
	cm_context.iva2_cm_clkstctrl =
		cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP2_CM_CLKSTCTRL);
	cm_context.mpu_cm_clkstctrl =
		cm_read_mod_reg(MPU_MOD, OMAP2_CM_CLKSTCTRL);
	cm_context.core_cm_clkstctrl =
		cm_read_mod_reg(CORE_MOD, OMAP2_CM_CLKSTCTRL);
	cm_context.sgx_cm_clkstctrl =
		cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP2_CM_CLKSTCTRL);
	cm_context.dss_cm_clkstctrl =
		cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP2_CM_CLKSTCTRL);
	cm_context.cam_cm_clkstctrl =
		cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP2_CM_CLKSTCTRL);
	cm_context.per_cm_clkstctrl =
		cm_read_mod_reg(OMAP3430_PER_MOD, OMAP2_CM_CLKSTCTRL);
	cm_context.neon_cm_clkstctrl =
		cm_read_mod_reg(OMAP3430_NEON_MOD, OMAP2_CM_CLKSTCTRL);
	cm_context.usbhost_cm_clkstctrl =
		cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL);
	cm_context.core_cm_autoidle1 =
		cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1);
	cm_context.core_cm_autoidle2 =
		cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE2);
	cm_context.core_cm_autoidle3 =
		cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE3);
	cm_context.wkup_cm_autoidle =
		cm_read_mod_reg(WKUP_MOD, CM_AUTOIDLE);
	cm_context.dss_cm_autoidle =
		cm_read_mod_reg(OMAP3430_DSS_MOD, CM_AUTOIDLE);
	cm_context.cam_cm_autoidle =
		cm_read_mod_reg(OMAP3430_CAM_MOD, CM_AUTOIDLE);
	cm_context.per_cm_autoidle =
		cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
	cm_context.usbhost_cm_autoidle =
		cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE);
	cm_context.sgx_cm_sleepdep =
		cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP3430_CM_SLEEPDEP);
	cm_context.dss_cm_sleepdep =
		cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP3430_CM_SLEEPDEP);
	cm_context.cam_cm_sleepdep =
		cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP3430_CM_SLEEPDEP);
	cm_context.per_cm_sleepdep =
		cm_read_mod_reg(OMAP3430_PER_MOD, OMAP3430_CM_SLEEPDEP);
	cm_context.usbhost_cm_sleepdep =
		cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP);
	cm_context.cm_clkout_ctrl =
		cm_read_mod_reg(OMAP3430_CCR_MOD, OMAP3_CM_CLKOUT_CTRL_OFFSET);
}

void omap3_cm_restore_context(void)
{
	cm_write_mod_reg(cm_context.iva2_cm_clksel1, OMAP3430_IVA2_MOD,
			 CM_CLKSEL1);
	cm_write_mod_reg(cm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD,
			 CM_CLKSEL2);
	__raw_writel(cm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG);
	cm_write_mod_reg(cm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD,
			 CM_CLKSEL);
	cm_write_mod_reg(cm_context.dss_cm_clksel, OMAP3430_DSS_MOD,
			 CM_CLKSEL);
	cm_write_mod_reg(cm_context.cam_cm_clksel, OMAP3430_CAM_MOD,
			 CM_CLKSEL);
	cm_write_mod_reg(cm_context.per_cm_clksel, OMAP3430_PER_MOD,
			 CM_CLKSEL);
	cm_write_mod_reg(cm_context.emu_cm_clksel, OMAP3430_EMU_MOD,
			 CM_CLKSEL1);
	cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD,
			 OMAP2_CM_CLKSTCTRL);
	cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,
			 CM_AUTOIDLE2);
	cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,
			 OMAP3430ES2_CM_CLKSEL4);
	cm_write_mod_reg(cm_context.pll_cm_clksel5, PLL_MOD,
			 OMAP3430ES2_CM_CLKSEL5);
	cm_write_mod_reg(cm_context.pll_cm_clken2, PLL_MOD,
			 OMAP3430ES2_CM_CLKEN2);
	__raw_writel(cm_context.cm_polctrl, OMAP3430_CM_POLCTRL);
	cm_write_mod_reg(cm_context.iva2_cm_fclken, OMAP3430_IVA2_MOD,
			 CM_FCLKEN);
	cm_write_mod_reg(cm_context.iva2_cm_clken_pll, OMAP3430_IVA2_MOD,
			 OMAP3430_CM_CLKEN_PLL);
	cm_write_mod_reg(cm_context.core_cm_fclken1, CORE_MOD, CM_FCLKEN1);
	cm_write_mod_reg(cm_context.core_cm_fclken3, CORE_MOD,
			 OMAP3430ES2_CM_FCLKEN3);
	cm_write_mod_reg(cm_context.sgx_cm_fclken, OMAP3430ES2_SGX_MOD,
			 CM_FCLKEN);
	cm_write_mod_reg(cm_context.wkup_cm_fclken, WKUP_MOD, CM_FCLKEN);
	cm_write_mod_reg(cm_context.dss_cm_fclken, OMAP3430_DSS_MOD,
			 CM_FCLKEN);
	cm_write_mod_reg(cm_context.cam_cm_fclken, OMAP3430_CAM_MOD,
			 CM_FCLKEN);
	cm_write_mod_reg(cm_context.per_cm_fclken, OMAP3430_PER_MOD,
			 CM_FCLKEN);
	cm_write_mod_reg(cm_context.usbhost_cm_fclken,
			 OMAP3430ES2_USBHOST_MOD, CM_FCLKEN);
	cm_write_mod_reg(cm_context.core_cm_iclken1, CORE_MOD, CM_ICLKEN1);
	cm_write_mod_reg(cm_context.core_cm_iclken2, CORE_MOD, CM_ICLKEN2);
	cm_write_mod_reg(cm_context.core_cm_iclken3, CORE_MOD, CM_ICLKEN3);
	cm_write_mod_reg(cm_context.sgx_cm_iclken, OMAP3430ES2_SGX_MOD,
			 CM_ICLKEN);
	cm_write_mod_reg(cm_context.wkup_cm_iclken, WKUP_MOD, CM_ICLKEN);
	cm_write_mod_reg(cm_context.dss_cm_iclken, OMAP3430_DSS_MOD,
			 CM_ICLKEN);
	cm_write_mod_reg(cm_context.cam_cm_iclken, OMAP3430_CAM_MOD,
			 CM_ICLKEN);
	cm_write_mod_reg(cm_context.per_cm_iclken, OMAP3430_PER_MOD,
			 CM_ICLKEN);
	cm_write_mod_reg(cm_context.usbhost_cm_iclken,
			 OMAP3430ES2_USBHOST_MOD, CM_ICLKEN);
	cm_write_mod_reg(cm_context.iva2_cm_autoidle2, OMAP3430_IVA2_MOD,
			 CM_AUTOIDLE2);
	cm_write_mod_reg(cm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2);
	cm_write_mod_reg(cm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD,
			 OMAP2_CM_CLKSTCTRL);
	cm_write_mod_reg(cm_context.mpu_cm_clkstctrl, MPU_MOD,
			 OMAP2_CM_CLKSTCTRL);
	cm_write_mod_reg(cm_context.core_cm_clkstctrl, CORE_MOD,
			 OMAP2_CM_CLKSTCTRL);
	cm_write_mod_reg(cm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD,
			 OMAP2_CM_CLKSTCTRL);
	cm_write_mod_reg(cm_context.dss_cm_clkstctrl, OMAP3430_DSS_MOD,
			 OMAP2_CM_CLKSTCTRL);
	cm_write_mod_reg(cm_context.cam_cm_clkstctrl, OMAP3430_CAM_MOD,
			 OMAP2_CM_CLKSTCTRL);
	cm_write_mod_reg(cm_context.per_cm_clkstctrl, OMAP3430_PER_MOD,
			 OMAP2_CM_CLKSTCTRL);
	cm_write_mod_reg(cm_context.neon_cm_clkstctrl, OMAP3430_NEON_MOD,
			 OMAP2_CM_CLKSTCTRL);
	cm_write_mod_reg(cm_context.usbhost_cm_clkstctrl,
			 OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL);
	cm_write_mod_reg(cm_context.core_cm_autoidle1, CORE_MOD,
			 CM_AUTOIDLE1);
	cm_write_mod_reg(cm_context.core_cm_autoidle2, CORE_MOD,
			 CM_AUTOIDLE2);
	cm_write_mod_reg(cm_context.core_cm_autoidle3, CORE_MOD,
			 CM_AUTOIDLE3);
	cm_write_mod_reg(cm_context.wkup_cm_autoidle, WKUP_MOD, CM_AUTOIDLE);
	cm_write_mod_reg(cm_context.dss_cm_autoidle, OMAP3430_DSS_MOD,
			 CM_AUTOIDLE);
	cm_write_mod_reg(cm_context.cam_cm_autoidle, OMAP3430_CAM_MOD,
			 CM_AUTOIDLE);
	cm_write_mod_reg(cm_context.per_cm_autoidle, OMAP3430_PER_MOD,
			 CM_AUTOIDLE);
	cm_write_mod_reg(cm_context.usbhost_cm_autoidle,
			 OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE);
	cm_write_mod_reg(cm_context.sgx_cm_sleepdep, OMAP3430ES2_SGX_MOD,
			 OMAP3430_CM_SLEEPDEP);
	cm_write_mod_reg(cm_context.dss_cm_sleepdep, OMAP3430_DSS_MOD,
			 OMAP3430_CM_SLEEPDEP);
	cm_write_mod_reg(cm_context.cam_cm_sleepdep, OMAP3430_CAM_MOD,
			 OMAP3430_CM_SLEEPDEP);
	cm_write_mod_reg(cm_context.per_cm_sleepdep, OMAP3430_PER_MOD,
			 OMAP3430_CM_SLEEPDEP);
	cm_write_mod_reg(cm_context.usbhost_cm_sleepdep,
			 OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP);
	cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD,
			 OMAP3_CM_CLKOUT_CTRL_OFFSET);
}
#endif
Commit	Line	Data
71348bca PW	1	/*
	2	* OMAP2/3 CM module functions
	3	*
	4	* Copyright (C) 2009 Nokia Corporation
	5	* Paul Walmsley
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
	12	#include <linux/kernel.h>
71348bca PW	13	#include <linux/types.h>
	14	#include <linux/delay.h>
	15	#include <linux/spinlock.h>
	16	#include <linux/list.h>
	17	#include <linux/errno.h>
	18	#include <linux/err.h>
	19	#include <linux/io.h>
	20
6f8b7ff5 PW	21	#include <plat/common.h>
6f8b7ff5 PW	22
71348bca	23	#include "cm.h"
59fb659b	24	#include "cm2xxx_3xxx.h"
71348bca PW	25	#include "cm-regbits-24xx.h"
	26	#include "cm-regbits-34xx.h"
	27
71348bca PW	28	static const u8 cm_idlest_offs[] = {
	29	CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
	30	};
	31
59fb659b PW	32	u32 cm_read_mod_reg(s16 module, u16 idx)
	33	{
	34	return __raw_readl(cm_base + module + idx);
	35	}
	36
	37	void cm_write_mod_reg(u32 val, s16 module, u16 idx)
	38	{
	39	__raw_writel(val, cm_base + module + idx);
	40	}
	41
	42	/* Read-modify-write a register in a CM module. Caller must lock */
	43	u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx)
	44	{
	45	u32 v;
	46
	47	v = cm_read_mod_reg(module, idx);
	48	v &= ~mask;
	49	v \|= bits;
	50	cm_write_mod_reg(v, module, idx);
	51
	52	return v;
	53	}
	54
	55	u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
	56	{
	57	return cm_rmw_mod_reg_bits(bits, bits, module, idx);
	58	}
	59
	60	u32 cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
	61	{
	62	return cm_rmw_mod_reg_bits(bits, 0x0, module, idx);
	63	}
	64
71348bca PW	65	/**
	66	* omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby
	67	* @prcm_mod: PRCM module offset
	68	* @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
	69	* @idlest_shift: shift of the bit in the CM_IDLEST* register to check
	70	*
	71	* XXX document
	72	*/
	73	int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
	74	{
	75	int ena = 0, i = 0;
	76	u8 cm_idlest_reg;
	77	u32 mask;
	78
	79	if (!idlest_id \|\| (idlest_id > ARRAY_SIZE(cm_idlest_offs)))
	80	return -EINVAL;
	81
	82	cm_idlest_reg = cm_idlest_offs[idlest_id - 1];
	83
64056167 KH	84	mask = 1 << idlest_shift;
64056167 KH	85
71348bca	86	if (cpu_is_omap24xx())
64056167	87	ena = mask;
71348bca PW	88	else if (cpu_is_omap34xx())
	89	ena = 0;
	90	else
	91	BUG();
	92
6f8b7ff5 PW	93	omap_test_timeout(((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena),
6f8b7ff5 PW	94	MAX_MODULE_READY_TIME, i);
71348bca PW	95
	96	return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
	97	}
	98
f0611a5c PW	99	/*
	100	* Context save/restore code - OMAP3 only
	101	*/
	102	#ifdef CONFIG_ARCH_OMAP3
	103	struct omap3_cm_regs {
	104	u32 iva2_cm_clksel1;
	105	u32 iva2_cm_clksel2;
	106	u32 cm_sysconfig;
	107	u32 sgx_cm_clksel;
	108	u32 dss_cm_clksel;
	109	u32 cam_cm_clksel;
	110	u32 per_cm_clksel;
	111	u32 emu_cm_clksel;
	112	u32 emu_cm_clkstctrl;
	113	u32 pll_cm_autoidle2;
	114	u32 pll_cm_clksel4;
	115	u32 pll_cm_clksel5;
	116	u32 pll_cm_clken2;
	117	u32 cm_polctrl;
	118	u32 iva2_cm_fclken;
	119	u32 iva2_cm_clken_pll;
	120	u32 core_cm_fclken1;
	121	u32 core_cm_fclken3;
	122	u32 sgx_cm_fclken;
	123	u32 wkup_cm_fclken;
	124	u32 dss_cm_fclken;
	125	u32 cam_cm_fclken;
	126	u32 per_cm_fclken;
	127	u32 usbhost_cm_fclken;
	128	u32 core_cm_iclken1;
	129	u32 core_cm_iclken2;
	130	u32 core_cm_iclken3;
	131	u32 sgx_cm_iclken;
	132	u32 wkup_cm_iclken;
	133	u32 dss_cm_iclken;
	134	u32 cam_cm_iclken;
	135	u32 per_cm_iclken;
	136	u32 usbhost_cm_iclken;
	137	u32 iva2_cm_autoidle2;
	138	u32 mpu_cm_autoidle2;
	139	u32 iva2_cm_clkstctrl;
	140	u32 mpu_cm_clkstctrl;
	141	u32 core_cm_clkstctrl;
	142	u32 sgx_cm_clkstctrl;
	143	u32 dss_cm_clkstctrl;
	144	u32 cam_cm_clkstctrl;
	145	u32 per_cm_clkstctrl;
	146	u32 neon_cm_clkstctrl;
	147	u32 usbhost_cm_clkstctrl;
	148	u32 core_cm_autoidle1;
	149	u32 core_cm_autoidle2;
	150	u32 core_cm_autoidle3;
	151	u32 wkup_cm_autoidle;
	152	u32 dss_cm_autoidle;
	153	u32 cam_cm_autoidle;
	154	u32 per_cm_autoidle;
	155	u32 usbhost_cm_autoidle;
	156	u32 sgx_cm_sleepdep;
	157	u32 dss_cm_sleepdep;
	158	u32 cam_cm_sleepdep;
	159	u32 per_cm_sleepdep;
	160	u32 usbhost_cm_sleepdep;
	161	u32 cm_clkout_ctrl;
	162	};
163
164	static struct omap3_cm_regs cm_context;
165
166	void omap3_cm_save_context(void)
167	{
168	cm_context.iva2_cm_clksel1 =
169	cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1);
170	cm_context.iva2_cm_clksel2 =
171	cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2);
172	cm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG);
173	cm_context.sgx_cm_clksel =
174	cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
175	cm_context.dss_cm_clksel =
176	cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL);
177	cm_context.cam_cm_clksel =
178	cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSEL);
179	cm_context.per_cm_clksel =
180	cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSEL);
181	cm_context.emu_cm_clksel =
182	cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);
183	cm_context.emu_cm_clkstctrl =
184	cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);
185	cm_context.pll_cm_autoidle2 =
186	cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
187	cm_context.pll_cm_clksel4 =
188	cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4);
189	cm_context.pll_cm_clksel5 =
190	cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
191	cm_context.pll_cm_clken2 =
192	cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2);
193	cm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL);
194	cm_context.iva2_cm_fclken =
195	cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN);
196	cm_context.iva2_cm_clken_pll = cm_read_mod_reg(OMAP3430_IVA2_MOD,
197	OMAP3430_CM_CLKEN_PLL);
198	cm_context.core_cm_fclken1 =
199	cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
200	cm_context.core_cm_fclken3 =
201	cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3);
202	cm_context.sgx_cm_fclken =
203	cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN);
204	cm_context.wkup_cm_fclken =
205	cm_read_mod_reg(WKUP_MOD, CM_FCLKEN);
206	cm_context.dss_cm_fclken =
207	cm_read_mod_reg(OMAP3430_DSS_MOD, CM_FCLKEN);
208	cm_context.cam_cm_fclken =
209	cm_read_mod_reg(OMAP3430_CAM_MOD, CM_FCLKEN);
210	cm_context.per_cm_fclken =
211	cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN);
212	cm_context.usbhost_cm_fclken =
213	cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN);
214	cm_context.core_cm_iclken1 =
215	cm_read_mod_reg(CORE_MOD, CM_ICLKEN1);
216	cm_context.core_cm_iclken2 =
217	cm_read_mod_reg(CORE_MOD, CM_ICLKEN2);
218	cm_context.core_cm_iclken3 =
219	cm_read_mod_reg(CORE_MOD, CM_ICLKEN3);
220	cm_context.sgx_cm_iclken =
221	cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_ICLKEN);
222	cm_context.wkup_cm_iclken =
223	cm_read_mod_reg(WKUP_MOD, CM_ICLKEN);
224	cm_context.dss_cm_iclken =
225	cm_read_mod_reg(OMAP3430_DSS_MOD, CM_ICLKEN);
226	cm_context.cam_cm_iclken =
227	cm_read_mod_reg(OMAP3430_CAM_MOD, CM_ICLKEN);
228	cm_context.per_cm_iclken =
229	cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN);
230	cm_context.usbhost_cm_iclken =
231	cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN);
232	cm_context.iva2_cm_autoidle2 =
233	cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
234	cm_context.mpu_cm_autoidle2 =
235	cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2);
236	cm_context.iva2_cm_clkstctrl =
237	cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP2_CM_CLKSTCTRL);
238	cm_context.mpu_cm_clkstctrl =
239	cm_read_mod_reg(MPU_MOD, OMAP2_CM_CLKSTCTRL);
240	cm_context.core_cm_clkstctrl =
241	cm_read_mod_reg(CORE_MOD, OMAP2_CM_CLKSTCTRL);
242	cm_context.sgx_cm_clkstctrl =
243	cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP2_CM_CLKSTCTRL);
244	cm_context.dss_cm_clkstctrl =
245	cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP2_CM_CLKSTCTRL);
246	cm_context.cam_cm_clkstctrl =
247	cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP2_CM_CLKSTCTRL);
248	cm_context.per_cm_clkstctrl =
249	cm_read_mod_reg(OMAP3430_PER_MOD, OMAP2_CM_CLKSTCTRL);
250	cm_context.neon_cm_clkstctrl =
251	cm_read_mod_reg(OMAP3430_NEON_MOD, OMAP2_CM_CLKSTCTRL);
252	cm_context.usbhost_cm_clkstctrl =
253	cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL);
254	cm_context.core_cm_autoidle1 =
255	cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1);
256	cm_context.core_cm_autoidle2 =
257	cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE2);
258	cm_context.core_cm_autoidle3 =
259	cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE3);
260	cm_context.wkup_cm_autoidle =
261	cm_read_mod_reg(WKUP_MOD, CM_AUTOIDLE);
262	cm_context.dss_cm_autoidle =
263	cm_read_mod_reg(OMAP3430_DSS_MOD, CM_AUTOIDLE);
264	cm_context.cam_cm_autoidle =
265	cm_read_mod_reg(OMAP3430_CAM_MOD, CM_AUTOIDLE);
266	cm_context.per_cm_autoidle =
267	cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
268	cm_context.usbhost_cm_autoidle =
269	cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE);
270	cm_context.sgx_cm_sleepdep =
271	cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP3430_CM_SLEEPDEP);
272	cm_context.dss_cm_sleepdep =
273	cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP3430_CM_SLEEPDEP);
274	cm_context.cam_cm_sleepdep =
275	cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP3430_CM_SLEEPDEP);
276	cm_context.per_cm_sleepdep =
277	cm_read_mod_reg(OMAP3430_PER_MOD, OMAP3430_CM_SLEEPDEP);
278	cm_context.usbhost_cm_sleepdep =
279	cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP);
280	cm_context.cm_clkout_ctrl =
281	cm_read_mod_reg(OMAP3430_CCR_MOD, OMAP3_CM_CLKOUT_CTRL_OFFSET);
282	}
283
284	void omap3_cm_restore_context(void)
285	{
286	cm_write_mod_reg(cm_context.iva2_cm_clksel1, OMAP3430_IVA2_MOD,
287	CM_CLKSEL1);
288	cm_write_mod_reg(cm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD,
289	CM_CLKSEL2);
290	__raw_writel(cm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG);
291	cm_write_mod_reg(cm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD,
292	CM_CLKSEL);
293	cm_write_mod_reg(cm_context.dss_cm_clksel, OMAP3430_DSS_MOD,
294	CM_CLKSEL);
295	cm_write_mod_reg(cm_context.cam_cm_clksel, OMAP3430_CAM_MOD,
296	CM_CLKSEL);
297	cm_write_mod_reg(cm_context.per_cm_clksel, OMAP3430_PER_MOD,
298	CM_CLKSEL);
299	cm_write_mod_reg(cm_context.emu_cm_clksel, OMAP3430_EMU_MOD,
300	CM_CLKSEL1);
301	cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD,
302	OMAP2_CM_CLKSTCTRL);
303	cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,
304	CM_AUTOIDLE2);
305	cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,
306	OMAP3430ES2_CM_CLKSEL4);
307	cm_write_mod_reg(cm_context.pll_cm_clksel5, PLL_MOD,
308	OMAP3430ES2_CM_CLKSEL5);
309	cm_write_mod_reg(cm_context.pll_cm_clken2, PLL_MOD,
310	OMAP3430ES2_CM_CLKEN2);
311	__raw_writel(cm_context.cm_polctrl, OMAP3430_CM_POLCTRL);
312	cm_write_mod_reg(cm_context.iva2_cm_fclken, OMAP3430_IVA2_MOD,
313	CM_FCLKEN);
314	cm_write_mod_reg(cm_context.iva2_cm_clken_pll, OMAP3430_IVA2_MOD,
315	OMAP3430_CM_CLKEN_PLL);
316	cm_write_mod_reg(cm_context.core_cm_fclken1, CORE_MOD, CM_FCLKEN1);
317	cm_write_mod_reg(cm_context.core_cm_fclken3, CORE_MOD,
318	OMAP3430ES2_CM_FCLKEN3);
319	cm_write_mod_reg(cm_context.sgx_cm_fclken, OMAP3430ES2_SGX_MOD,
320	CM_FCLKEN);
321	cm_write_mod_reg(cm_context.wkup_cm_fclken, WKUP_MOD, CM_FCLKEN);
322	cm_write_mod_reg(cm_context.dss_cm_fclken, OMAP3430_DSS_MOD,
323	CM_FCLKEN);
324	cm_write_mod_reg(cm_context.cam_cm_fclken, OMAP3430_CAM_MOD,
325	CM_FCLKEN);
326	cm_write_mod_reg(cm_context.per_cm_fclken, OMAP3430_PER_MOD,
327	CM_FCLKEN);
328	cm_write_mod_reg(cm_context.usbhost_cm_fclken,
329	OMAP3430ES2_USBHOST_MOD, CM_FCLKEN);
330	cm_write_mod_reg(cm_context.core_cm_iclken1, CORE_MOD, CM_ICLKEN1);
331	cm_write_mod_reg(cm_context.core_cm_iclken2, CORE_MOD, CM_ICLKEN2);
332	cm_write_mod_reg(cm_context.core_cm_iclken3, CORE_MOD, CM_ICLKEN3);
333	cm_write_mod_reg(cm_context.sgx_cm_iclken, OMAP3430ES2_SGX_MOD,
334	CM_ICLKEN);
335	cm_write_mod_reg(cm_context.wkup_cm_iclken, WKUP_MOD, CM_ICLKEN);
336	cm_write_mod_reg(cm_context.dss_cm_iclken, OMAP3430_DSS_MOD,
337	CM_ICLKEN);
338	cm_write_mod_reg(cm_context.cam_cm_iclken, OMAP3430_CAM_MOD,
339	CM_ICLKEN);
340	cm_write_mod_reg(cm_context.per_cm_iclken, OMAP3430_PER_MOD,
341	CM_ICLKEN);
342	cm_write_mod_reg(cm_context.usbhost_cm_iclken,
343	OMAP3430ES2_USBHOST_MOD, CM_ICLKEN);
344	cm_write_mod_reg(cm_context.iva2_cm_autoidle2, OMAP3430_IVA2_MOD,
345	CM_AUTOIDLE2);
346	cm_write_mod_reg(cm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2);
347	cm_write_mod_reg(cm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD,
348	OMAP2_CM_CLKSTCTRL);
349	cm_write_mod_reg(cm_context.mpu_cm_clkstctrl, MPU_MOD,
350	OMAP2_CM_CLKSTCTRL);
351	cm_write_mod_reg(cm_context.core_cm_clkstctrl, CORE_MOD,
352	OMAP2_CM_CLKSTCTRL);
353	cm_write_mod_reg(cm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD,
354	OMAP2_CM_CLKSTCTRL);
355	cm_write_mod_reg(cm_context.dss_cm_clkstctrl, OMAP3430_DSS_MOD,
356	OMAP2_CM_CLKSTCTRL);
357	cm_write_mod_reg(cm_context.cam_cm_clkstctrl, OMAP3430_CAM_MOD,
358	OMAP2_CM_CLKSTCTRL);
359	cm_write_mod_reg(cm_context.per_cm_clkstctrl, OMAP3430_PER_MOD,
360	OMAP2_CM_CLKSTCTRL);
361	cm_write_mod_reg(cm_context.neon_cm_clkstctrl, OMAP3430_NEON_MOD,
362	OMAP2_CM_CLKSTCTRL);
363	cm_write_mod_reg(cm_context.usbhost_cm_clkstctrl,
364	OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL);
365	cm_write_mod_reg(cm_context.core_cm_autoidle1, CORE_MOD,
366	CM_AUTOIDLE1);
367	cm_write_mod_reg(cm_context.core_cm_autoidle2, CORE_MOD,
368	CM_AUTOIDLE2);
369	cm_write_mod_reg(cm_context.core_cm_autoidle3, CORE_MOD,
370	CM_AUTOIDLE3);
371	cm_write_mod_reg(cm_context.wkup_cm_autoidle, WKUP_MOD, CM_AUTOIDLE);
372	cm_write_mod_reg(cm_context.dss_cm_autoidle, OMAP3430_DSS_MOD,
373	CM_AUTOIDLE);
374	cm_write_mod_reg(cm_context.cam_cm_autoidle, OMAP3430_CAM_MOD,
375	CM_AUTOIDLE);
376	cm_write_mod_reg(cm_context.per_cm_autoidle, OMAP3430_PER_MOD,
377	CM_AUTOIDLE);
378	cm_write_mod_reg(cm_context.usbhost_cm_autoidle,
379	OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE);
380	cm_write_mod_reg(cm_context.sgx_cm_sleepdep, OMAP3430ES2_SGX_MOD,
381	OMAP3430_CM_SLEEPDEP);
382	cm_write_mod_reg(cm_context.dss_cm_sleepdep, OMAP3430_DSS_MOD,
383	OMAP3430_CM_SLEEPDEP);
384	cm_write_mod_reg(cm_context.cam_cm_sleepdep, OMAP3430_CAM_MOD,
385	OMAP3430_CM_SLEEPDEP);
386	cm_write_mod_reg(cm_context.per_cm_sleepdep, OMAP3430_PER_MOD,
387	OMAP3430_CM_SLEEPDEP);
388	cm_write_mod_reg(cm_context.usbhost_cm_sleepdep,
389	OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP);
390	cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD,
391	OMAP3_CM_CLKOUT_CTRL_OFFSET);
392	}
393	#endif