[deliverable/linux.git] / arch / arm / mach-omap2 / cm_common.c

/*
 * OMAP2+ common Clock Management (CM) IP block functions
 *
 * Copyright (C) 2012 Texas Instruments, Inc.
 * Paul Walmsley
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * XXX This code should eventually be moved to a CM driver.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/bug.h>
#include <linux/of.h>
#include <linux/of_address.h>

#include "cm2xxx.h"
#include "cm3xxx.h"
#include "cm33xx.h"
#include "cm44xx.h"
#include "clock.h"

/*
 * cm_ll_data: function pointers to SoC-specific implementations of
 * common CM functions
 */
static struct cm_ll_data null_cm_ll_data;
static struct cm_ll_data *cm_ll_data = &null_cm_ll_data;

/* cm_base: base virtual address of the CM IP block */
void __iomem *cm_base;

/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
void __iomem *cm2_base;

#define CM_NO_CLOCKS		0x1
#define CM_SINGLE_INSTANCE	0x2

/**
 * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
 * @cm: CM base virtual address
 * @cm2: CM2 base virtual address (if present on the booted SoC)
 *
 * XXX Will be replaced when the PRM/CM drivers are completed.
 */
void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2)
{
	cm_base = cm;
	cm2_base = cm2;
}

/**
 * cm_split_idlest_reg - split CM_IDLEST reg addr into its components
 * @idlest_reg: CM_IDLEST* virtual address
 * @prcm_inst: pointer to an s16 to return the PRCM instance offset
 * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
 *
 * Given an absolute CM_IDLEST register address @idlest_reg, passes
 * the PRCM instance offset and IDLEST register ID back to the caller
 * via the @prcm_inst and @idlest_reg_id.  Returns -EINVAL upon error,
 * or 0 upon success.  XXX This function is only needed until absolute
 * register addresses are removed from the OMAP struct clk records.
 */
int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
			u8 *idlest_reg_id)
{
	if (!cm_ll_data->split_idlest_reg) {
		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
			  __func__);
		return -EINVAL;
	}

	return cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
					   idlest_reg_id);
}

/**
 * omap_cm_wait_module_ready - wait for a module to leave idle or standby
 * @part: PRCM partition
 * @prcm_mod: PRCM module offset
 * @idlest_reg: CM_IDLESTx register
 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
 *
 * Wait for the PRCM to indicate that the module identified by
 * (@prcm_mod, @idlest_id, @idlest_shift) is clocked.  Return 0 upon
 * success, -EBUSY if the module doesn't enable in time, or -EINVAL if
 * no per-SoC wait_module_ready() function pointer has been registered
 * or if the idlest register is unknown on the SoC.
 */
int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
			      u8 idlest_shift)
{
	if (!cm_ll_data->wait_module_ready) {
		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
			  __func__);
		return -EINVAL;
	}

	return cm_ll_data->wait_module_ready(part, prcm_mod, idlest_reg,
					     idlest_shift);
}

/**
 * omap_cm_wait_module_idle - wait for a module to enter idle or standby
 * @part: PRCM partition
 * @prcm_mod: PRCM module offset
 * @idlest_reg: CM_IDLESTx register
 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
 *
 * Wait for the PRCM to indicate that the module identified by
 * (@prcm_mod, @idlest_id, @idlest_shift) is no longer clocked.  Return
 * 0 upon success, -EBUSY if the module doesn't enable in time, or
 * -EINVAL if no per-SoC wait_module_idle() function pointer has been
 * registered or if the idlest register is unknown on the SoC.
 */
int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,
			     u8 idlest_shift)
{
	if (!cm_ll_data->wait_module_idle) {
		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
			  __func__);
		return -EINVAL;
	}

	return cm_ll_data->wait_module_idle(part, prcm_mod, idlest_reg,
					    idlest_shift);
}

/**
 * omap_cm_module_enable - enable a module
 * @mode: target mode for the module
 * @part: PRCM partition
 * @inst: PRCM instance
 * @clkctrl_offs: CM_CLKCTRL register offset for the module
 *
 * Enables clocks for a module identified by (@part, @inst, @clkctrl_offs)
 * making its IO space accessible. Return 0 upon success, -EINVAL if no
 * per-SoC module_enable() function pointer has been registered.
 */
int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs)
{
	if (!cm_ll_data->module_enable) {
		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
			  __func__);
		return -EINVAL;
	}

	cm_ll_data->module_enable(mode, part, inst, clkctrl_offs);
	return 0;
}

/**
 * omap_cm_module_disable - disable a module
 * @part: PRCM partition
 * @inst: PRCM instance
 * @clkctrl_offs: CM_CLKCTRL register offset for the module
 *
 * Disables clocks for a module identified by (@part, @inst, @clkctrl_offs)
 * makings its IO space inaccessible. Return 0 upon success, -EINVAL if
 * no per-SoC module_disable() function pointer has been registered.
 */
int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
{
	if (!cm_ll_data->module_disable) {
		WARN_ONCE(1, "cm: %s: no low-level function defined\n",
			  __func__);
		return -EINVAL;
	}

	cm_ll_data->module_disable(part, inst, clkctrl_offs);
	return 0;
}

/**
 * cm_register - register per-SoC low-level data with the CM
 * @cld: low-level per-SoC OMAP CM data & function pointers to register
 *
 * Register per-SoC low-level OMAP CM data and function pointers with
 * the OMAP CM common interface.  The caller must keep the data
 * pointed to by @cld valid until it calls cm_unregister() and
 * it returns successfully.  Returns 0 upon success, -EINVAL if @cld
 * is NULL, or -EEXIST if cm_register() has already been called
 * without an intervening cm_unregister().
 */
int cm_register(struct cm_ll_data *cld)
{
	if (!cld)
		return -EINVAL;

	if (cm_ll_data != &null_cm_ll_data)
		return -EEXIST;

	cm_ll_data = cld;

	return 0;
}

/**
 * cm_unregister - unregister per-SoC low-level data & function pointers
 * @cld: low-level per-SoC OMAP CM data & function pointers to unregister
 *
 * Unregister per-SoC low-level OMAP CM data and function pointers
 * that were previously registered with cm_register().  The
 * caller may not destroy any of the data pointed to by @cld until
 * this function returns successfully.  Returns 0 upon success, or
 * -EINVAL if @cld is NULL or if @cld does not match the struct
 * cm_ll_data * previously registered by cm_register().
 */
int cm_unregister(struct cm_ll_data *cld)
{
	if (!cld || cm_ll_data != cld)
		return -EINVAL;

	cm_ll_data = &null_cm_ll_data;

	return 0;
}

#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
	defined(CONFIG_SOC_DRA7XX)
static struct omap_prcm_init_data cm_data __initdata = {
	.index = TI_CLKM_CM,
	.init = omap4_cm_init,
};

static struct omap_prcm_init_data cm2_data __initdata = {
	.index = TI_CLKM_CM2,
	.init = omap4_cm_init,
};
#endif

#ifdef CONFIG_ARCH_OMAP2
static struct omap_prcm_init_data omap2_prcm_data __initdata = {
	.index = TI_CLKM_CM,
	.init = omap2xxx_cm_init,
	.flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
};
#endif

#ifdef CONFIG_ARCH_OMAP3
static struct omap_prcm_init_data omap3_cm_data __initdata = {
	.index = TI_CLKM_CM,
	.init = omap3xxx_cm_init,
	.flags = CM_SINGLE_INSTANCE,

	/*
	 * IVA2 offset is a negative value, must offset the cm_base address
	 * by this to get it to positive side on the iomap
	 */
	.offset = -OMAP3430_IVA2_MOD,
};
#endif

#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX)
static struct omap_prcm_init_data am3_prcm_data __initdata = {
	.index = TI_CLKM_CM,
	.flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
	.init = am33xx_cm_init,
};
#endif

#ifdef CONFIG_SOC_AM43XX
static struct omap_prcm_init_data am4_prcm_data __initdata = {
	.index = TI_CLKM_CM,
	.flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
	.init = omap4_cm_init,
};
#endif

static const struct of_device_id omap_cm_dt_match_table[] __initconst = {
#ifdef CONFIG_ARCH_OMAP2
	{ .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data },
#endif
#ifdef CONFIG_ARCH_OMAP3
	{ .compatible = "ti,omap3-cm", .data = &omap3_cm_data },
#endif
#ifdef CONFIG_ARCH_OMAP4
	{ .compatible = "ti,omap4-cm1", .data = &cm_data },
	{ .compatible = "ti,omap4-cm2", .data = &cm2_data },
#endif
#ifdef CONFIG_SOC_OMAP5
	{ .compatible = "ti,omap5-cm-core-aon", .data = &cm_data },
	{ .compatible = "ti,omap5-cm-core", .data = &cm2_data },
#endif
#ifdef CONFIG_SOC_DRA7XX
	{ .compatible = "ti,dra7-cm-core-aon", .data = &cm_data },
	{ .compatible = "ti,dra7-cm-core", .data = &cm2_data },
#endif
#ifdef CONFIG_SOC_AM33XX
	{ .compatible = "ti,am3-prcm", .data = &am3_prcm_data },
#endif
#ifdef CONFIG_SOC_AM43XX
	{ .compatible = "ti,am4-prcm", .data = &am4_prcm_data },
#endif
#ifdef CONFIG_SOC_TI81XX
	{ .compatible = "ti,dm814-prcm", .data = &am3_prcm_data },
	{ .compatible = "ti,dm816-prcm", .data = &am3_prcm_data },
#endif
	{ }
};

/**
 * omap2_cm_base_init - initialize iomappings for the CM drivers
 *
 * Detects and initializes the iomappings for the CM driver, based
 * on the DT data. Returns 0 in success, negative error value
 * otherwise.
 */
int __init omap2_cm_base_init(void)
{
	struct device_node *np;
	const struct of_device_id *match;
	struct omap_prcm_init_data *data;
	void __iomem *mem;

	for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
		data = (struct omap_prcm_init_data *)match->data;

		mem = of_iomap(np, 0);
		if (!mem)
			return -ENOMEM;

		if (data->index == TI_CLKM_CM)
			cm_base = mem + data->offset;

		if (data->index == TI_CLKM_CM2)
			cm2_base = mem + data->offset;

		data->mem = mem;

		data->np = np;

		if (data->init && (data->flags & CM_SINGLE_INSTANCE ||
				   (cm_base && cm2_base)))
			data->init(data);
	}

	return 0;
}

/**
 * omap_cm_init - low level init for the CM drivers
 *
 * Initializes the low level clock infrastructure for CM drivers.
 * Returns 0 in success, negative error value in failure.
 */
int __init omap_cm_init(void)
{
	struct device_node *np;
	const struct of_device_id *match;
	const struct omap_prcm_init_data *data;
	int ret;

	for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
		data = match->data;

		if (data->flags & CM_NO_CLOCKS)
			continue;

		ret = omap2_clk_provider_init(np, data->index, NULL, data->mem);
		if (ret)
			return ret;
	}

	return 0;
}
Commit	Line	Data
21325b25 PW	1	/*
	2	* OMAP2+ common Clock Management (CM) IP block functions
	3	*
	4	* Copyright (C) 2012 Texas Instruments, Inc.
d9a16f9a	5	* Paul Walmsley
21325b25 PW	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* XXX This code should eventually be moved to a CM driver.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/init.h>
cc4b1e24	16	#include <linux/errno.h>
4794208c	17	#include <linux/bug.h>
fe87414f TK	18	#include <linux/of.h>
fe87414f TK	19	#include <linux/of_address.h>
21325b25 PW	20
	21	#include "cm2xxx.h"
	22	#include "cm3xxx.h"
425dc8b2	23	#include "cm33xx.h"
21325b25	24	#include "cm44xx.h"
fe87414f	25	#include "clock.h"
21325b25 PW	26
	27	/*
	28	* cm_ll_data: function pointers to SoC-specific implementations of
	29	* common CM functions
	30	*/
	31	static struct cm_ll_data null_cm_ll_data;
	32	static struct cm_ll_data *cm_ll_data = &null_cm_ll_data;
	33
d9a16f9a PW	34	/* cm_base: base virtual address of the CM IP block */
	35	void __iomem *cm_base;
	36
	37	/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
	38	void __iomem *cm2_base;
	39
5970ca2d	40	#define CM_NO_CLOCKS 0x1
425dc8b2	41	#define CM_SINGLE_INSTANCE 0x2
5970ca2d	42
d9a16f9a PW	43	/**
	44	* omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
	45	* @cm: CM base virtual address
	46	* @cm2: CM2 base virtual address (if present on the booted SoC)
	47	*
	48	* XXX Will be replaced when the PRM/CM drivers are completed.
	49	*/
	50	void __init omap2_set_globals_cm(void __iomem cm, void __iomem cm2)
	51	{
	52	cm_base = cm;
	53	cm2_base = cm2;
	54	}
	55
c4ceedcb PW	56	/**
	57	* cm_split_idlest_reg - split CM_IDLEST reg addr into its components
	58	* @idlest_reg: CM_IDLEST* virtual address
	59	* @prcm_inst: pointer to an s16 to return the PRCM instance offset
	60	* @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
	61	*
	62	* Given an absolute CM_IDLEST register address @idlest_reg, passes
	63	* the PRCM instance offset and IDLEST register ID back to the caller
	64	* via the @prcm_inst and @idlest_reg_id. Returns -EINVAL upon error,
	65	* or 0 upon success. XXX This function is only needed until absolute
	66	* register addresses are removed from the OMAP struct clk records.
	67	*/
	68	int cm_split_idlest_reg(void __iomem idlest_reg, s16 prcm_inst,
	69	u8 *idlest_reg_id)
	70	{
	71	if (!cm_ll_data->split_idlest_reg) {
	72	WARN_ONCE(1, "cm: %s: no low-level function defined\n",
	73	__func__);
	74	return -EINVAL;
	75	}
	76
	77	return cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
	78	idlest_reg_id);
	79	}
	80
	81	/**
021b6ff0 TK	82	* omap_cm_wait_module_ready - wait for a module to leave idle or standby
021b6ff0 TK	83	* @part: PRCM partition
c4ceedcb	84	* @prcm_mod: PRCM module offset
021b6ff0	85	* @idlest_reg: CM_IDLESTx register
c4ceedcb PW	86	* @idlest_shift: shift of the bit in the CM_IDLEST* register to check
	87	*
	88	* Wait for the PRCM to indicate that the module identified by
	89	* (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
	90	* success, -EBUSY if the module doesn't enable in time, or -EINVAL if
	91	* no per-SoC wait_module_ready() function pointer has been registered
	92	* or if the idlest register is unknown on the SoC.
	93	*/
021b6ff0 TK	94	int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
021b6ff0 TK	95	u8 idlest_shift)
c4ceedcb PW	96	{
	97	if (!cm_ll_data->wait_module_ready) {
	98	WARN_ONCE(1, "cm: %s: no low-level function defined\n",
	99	__func__);
	100	return -EINVAL;
	101	}
	102
021b6ff0 TK	103	return cm_ll_data->wait_module_ready(part, prcm_mod, idlest_reg,
021b6ff0 TK	104	idlest_shift);
c4ceedcb PW	105	}
c4ceedcb PW	106
a8ae5afa TK	107	/**
	108	* omap_cm_wait_module_idle - wait for a module to enter idle or standby
	109	* @part: PRCM partition
	110	* @prcm_mod: PRCM module offset
	111	* @idlest_reg: CM_IDLESTx register
	112	* @idlest_shift: shift of the bit in the CM_IDLEST* register to check
	113	*
	114	* Wait for the PRCM to indicate that the module identified by
	115	* (@prcm_mod, @idlest_id, @idlest_shift) is no longer clocked. Return
	116	* 0 upon success, -EBUSY if the module doesn't enable in time, or
	117	* -EINVAL if no per-SoC wait_module_idle() function pointer has been
	118	* registered or if the idlest register is unknown on the SoC.
	119	*/
	120	int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,
	121	u8 idlest_shift)
	122	{
	123	if (!cm_ll_data->wait_module_idle) {
	124	WARN_ONCE(1, "cm: %s: no low-level function defined\n",
	125	__func__);
	126	return -EINVAL;
	127	}
	128
	129	return cm_ll_data->wait_module_idle(part, prcm_mod, idlest_reg,
	130	idlest_shift);
	131	}
	132
128603f0 TK	133	/**
	134	* omap_cm_module_enable - enable a module
	135	* @mode: target mode for the module
	136	* @part: PRCM partition
	137	* @inst: PRCM instance
	138	* @clkctrl_offs: CM_CLKCTRL register offset for the module
	139	*
	140	* Enables clocks for a module identified by (@part, @inst, @clkctrl_offs)
	141	* making its IO space accessible. Return 0 upon success, -EINVAL if no
	142	* per-SoC module_enable() function pointer has been registered.
	143	*/
	144	int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs)
	145	{
	146	if (!cm_ll_data->module_enable) {
	147	WARN_ONCE(1, "cm: %s: no low-level function defined\n",
	148	__func__);
	149	return -EINVAL;
	150	}
	151
	152	cm_ll_data->module_enable(mode, part, inst, clkctrl_offs);
	153	return 0;
	154	}
	155
	156	/**
	157	* omap_cm_module_disable - disable a module
	158	* @part: PRCM partition
	159	* @inst: PRCM instance
	160	* @clkctrl_offs: CM_CLKCTRL register offset for the module
	161	*
	162	* Disables clocks for a module identified by (@part, @inst, @clkctrl_offs)
	163	* makings its IO space inaccessible. Return 0 upon success, -EINVAL if
	164	* no per-SoC module_disable() function pointer has been registered.
	165	*/
	166	int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
	167	{
	168	if (!cm_ll_data->module_disable) {
	169	WARN_ONCE(1, "cm: %s: no low-level function defined\n",
	170	__func__);
	171	return -EINVAL;
	172	}
	173
	174	cm_ll_data->module_disable(part, inst, clkctrl_offs);
	175	return 0;
	176	}
	177
21325b25 PW	178	/**
	179	* cm_register - register per-SoC low-level data with the CM
	180	* @cld: low-level per-SoC OMAP CM data & function pointers to register
	181	*
	182	* Register per-SoC low-level OMAP CM data and function pointers with
	183	* the OMAP CM common interface. The caller must keep the data
	184	* pointed to by @cld valid until it calls cm_unregister() and
	185	* it returns successfully. Returns 0 upon success, -EINVAL if @cld
	186	* is NULL, or -EEXIST if cm_register() has already been called
	187	* without an intervening cm_unregister().
	188	*/
	189	int cm_register(struct cm_ll_data *cld)
	190	{
	191	if (!cld)
	192	return -EINVAL;
	193
	194	if (cm_ll_data != &null_cm_ll_data)
	195	return -EEXIST;
	196
	197	cm_ll_data = cld;
	198
	199	return 0;
	200	}
	201
	202	/**
	203	* cm_unregister - unregister per-SoC low-level data & function pointers
	204	* @cld: low-level per-SoC OMAP CM data & function pointers to unregister
	205	*
	206	* Unregister per-SoC low-level OMAP CM data and function pointers
	207	* that were previously registered with cm_register(). The
	208	* caller may not destroy any of the data pointed to by @cld until
	209	* this function returns successfully. Returns 0 upon success, or
	210	* -EINVAL if @cld is NULL or if @cld does not match the struct
	211	* cm_ll_data * previously registered by cm_register().
	212	*/
	213	int cm_unregister(struct cm_ll_data *cld)
	214	{
	215	if (!cld \|\| cm_ll_data != cld)
	216	return -EINVAL;
	217
	218	cm_ll_data = &null_cm_ll_data;
	219
	220	return 0;
	221	}
fe87414f	222
425dc8b2 TK	223	#if defined(CONFIG_ARCH_OMAP4) \|\| defined(CONFIG_SOC_OMAP5) \|\| \
	224	defined(CONFIG_SOC_DRA7XX)
	225	static struct omap_prcm_init_data cm_data __initdata = {
fe87414f	226	.index = TI_CLKM_CM,
425dc8b2	227	.init = omap4_cm_init,
fe87414f TK	228	};
fe87414f TK	229
425dc8b2	230	static struct omap_prcm_init_data cm2_data __initdata = {
fe87414f	231	.index = TI_CLKM_CM2,
425dc8b2	232	.init = omap4_cm_init,
fe87414f	233	};
425dc8b2	234	#endif
fe87414f	235
425dc8b2 TK	236	#ifdef CONFIG_ARCH_OMAP2
425dc8b2 TK	237	static struct omap_prcm_init_data omap2_prcm_data __initdata = {
5970ca2d	238	.index = TI_CLKM_CM,
425dc8b2 TK	239	.init = omap2xxx_cm_init,
425dc8b2 TK	240	.flags = CM_NO_CLOCKS \| CM_SINGLE_INSTANCE,
5970ca2d	241	};
425dc8b2	242	#endif
5970ca2d	243
425dc8b2 TK	244	#ifdef CONFIG_ARCH_OMAP3
425dc8b2 TK	245	static struct omap_prcm_init_data omap3_cm_data __initdata = {
5970ca2d	246	.index = TI_CLKM_CM,
425dc8b2 TK	247	.init = omap3xxx_cm_init,
425dc8b2 TK	248	.flags = CM_SINGLE_INSTANCE,
5970ca2d TK	249
	250	/*
	251	* IVA2 offset is a negative value, must offset the cm_base address
	252	* by this to get it to positive side on the iomap
	253	*/
	254	.offset = -OMAP3430_IVA2_MOD,
	255	};
425dc8b2	256	#endif
5970ca2d	257
425dc8b2 TK	258	#if defined(CONFIG_SOC_AM33XX) \|\| defined(CONFIG_SOC_TI81XX)
425dc8b2 TK	259	static struct omap_prcm_init_data am3_prcm_data __initdata = {
5970ca2d	260	.index = TI_CLKM_CM,
425dc8b2 TK	261	.flags = CM_NO_CLOCKS \| CM_SINGLE_INSTANCE,
425dc8b2 TK	262	.init = am33xx_cm_init,
5970ca2d	263	};
425dc8b2	264	#endif
5970ca2d	265
425dc8b2 TK	266	#ifdef CONFIG_SOC_AM43XX
425dc8b2 TK	267	static struct omap_prcm_init_data am4_prcm_data __initdata = {
5970ca2d	268	.index = TI_CLKM_CM,
425dc8b2 TK	269	.flags = CM_NO_CLOCKS \| CM_SINGLE_INSTANCE,
425dc8b2 TK	270	.init = omap4_cm_init,
5970ca2d	271	};
425dc8b2	272	#endif
5970ca2d	273
425dc8b2 TK	274	static const struct of_device_id omap_cm_dt_match_table[] __initconst = {
425dc8b2 TK	275	#ifdef CONFIG_ARCH_OMAP2
5970ca2d	276	{ .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data },
425dc8b2 TK	277	#endif
425dc8b2 TK	278	#ifdef CONFIG_ARCH_OMAP3
5970ca2d	279	{ .compatible = "ti,omap3-cm", .data = &omap3_cm_data },
425dc8b2 TK	280	#endif
425dc8b2 TK	281	#ifdef CONFIG_ARCH_OMAP4
fe87414f TK	282	{ .compatible = "ti,omap4-cm1", .data = &cm_data },
fe87414f TK	283	{ .compatible = "ti,omap4-cm2", .data = &cm2_data },
425dc8b2 TK	284	#endif
425dc8b2 TK	285	#ifdef CONFIG_SOC_OMAP5
fe87414f TK	286	{ .compatible = "ti,omap5-cm-core-aon", .data = &cm_data },
fe87414f TK	287	{ .compatible = "ti,omap5-cm-core", .data = &cm2_data },
425dc8b2 TK	288	#endif
425dc8b2 TK	289	#ifdef CONFIG_SOC_DRA7XX
fe87414f TK	290	{ .compatible = "ti,dra7-cm-core-aon", .data = &cm_data },
fe87414f TK	291	{ .compatible = "ti,dra7-cm-core", .data = &cm2_data },
425dc8b2 TK	292	#endif
425dc8b2 TK	293	#ifdef CONFIG_SOC_AM33XX
5970ca2d	294	{ .compatible = "ti,am3-prcm", .data = &am3_prcm_data },
425dc8b2 TK	295	#endif
425dc8b2 TK	296	#ifdef CONFIG_SOC_AM43XX
5970ca2d	297	{ .compatible = "ti,am4-prcm", .data = &am4_prcm_data },
425dc8b2 TK	298	#endif
	299	#ifdef CONFIG_SOC_TI81XX
	300	{ .compatible = "ti,dm814-prcm", .data = &am3_prcm_data },
	301	{ .compatible = "ti,dm816-prcm", .data = &am3_prcm_data },
	302	#endif
fe87414f TK	303	{ }
	304	};
	305
5970ca2d TK	306	/**
	307	* omap2_cm_base_init - initialize iomappings for the CM drivers
	308	*
	309	* Detects and initializes the iomappings for the CM driver, based
	310	* on the DT data. Returns 0 in success, negative error value
	311	* otherwise.
	312	*/
	313	int __init omap2_cm_base_init(void)
	314	{
	315	struct device_node *np;
	316	const struct of_device_id *match;
	317	struct omap_prcm_init_data *data;
	318	void __iomem *mem;
	319
	320	for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
	321	data = (struct omap_prcm_init_data *)match->data;
	322
	323	mem = of_iomap(np, 0);
	324	if (!mem)
	325	return -ENOMEM;
	326
	327	if (data->index == TI_CLKM_CM)
	328	cm_base = mem + data->offset;
	329
	330	if (data->index == TI_CLKM_CM2)
	331	cm2_base = mem + data->offset;
	332
	333	data->mem = mem;
425dc8b2 TK	334
	335	data->np = np;
	336
	337	if (data->init && (data->flags & CM_SINGLE_INSTANCE \|\|
	338	(cm_base && cm2_base)))
	339	data->init(data);
5970ca2d TK	340	}
	341
	342	return 0;
	343	}
	344
fe87414f TK	345	/**
	346	* omap_cm_init - low level init for the CM drivers
	347	*
	348	* Initializes the low level clock infrastructure for CM drivers.
	349	* Returns 0 in success, negative error value in failure.
	350	*/
	351	int __init omap_cm_init(void)
	352	{
	353	struct device_node *np;
fe87414f TK	354	const struct of_device_id *match;
	355	const struct omap_prcm_init_data *data;
	356	int ret;
	357
	358	for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
	359	data = match->data;
	360
5970ca2d TK	361	if (data->flags & CM_NO_CLOCKS)
5970ca2d TK	362	continue;
fe87414f	363
80cbb224	364	ret = omap2_clk_provider_init(np, data->index, NULL, data->mem);
fe87414f TK	365	if (ret)
	366	return ret;
	367	}
	368
	369	return 0;
	370	}