[deliverable/linux.git] / arch / arm / mach-omap2 / common.h

/*
 * Header for code common to all OMAP2+ machines.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * You should have received a copy of the  GNU General Public License along
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
#ifndef __ASSEMBLER__

#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/i2c/twl.h>
#include <linux/i2c-omap.h>
#include <linux/reboot.h>

#include <asm/proc-fns.h>

#include "i2c.h"
#include "serial.h"

#include "usb.h"

#define OMAP_INTC_START		NR_IRQS

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
int omap2_pm_init(void);
#else
static inline int omap2_pm_init(void)
{
	return 0;
}
#endif

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
int omap3_pm_init(void);
#else
static inline int omap3_pm_init(void)
{
	return 0;
}
#endif

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
int omap4_pm_init(void);
#else
static inline int omap4_pm_init(void)
{
	return 0;
}
#endif

#ifdef CONFIG_OMAP_MUX
int omap_mux_late_init(void);
#else
static inline int omap_mux_late_init(void)
{
	return 0;
}
#endif

extern void omap2_init_common_infrastructure(void);

extern void omap2_sync32k_timer_init(void);
extern void omap3_sync32k_timer_init(void);
extern void omap3_secure_sync32k_timer_init(void);
extern void omap3_gptimer_timer_init(void);
extern void omap4_local_timer_init(void);
extern void omap5_realtime_timer_init(void);

void omap2420_init_early(void);
void omap2430_init_early(void);
void omap3430_init_early(void);
void omap35xx_init_early(void);
void omap3630_init_early(void);
void omap3_init_early(void);	/* Do not use this one */
void am33xx_init_early(void);
void am35xx_init_early(void);
void ti81xx_init_early(void);
void am33xx_init_early(void);
void am43xx_init_early(void);
void omap4430_init_early(void);
void omap5_init_early(void);
void omap3_init_late(void);	/* Do not use this one */
void omap4430_init_late(void);
void omap2420_init_late(void);
void omap2430_init_late(void);
void omap3430_init_late(void);
void omap35xx_init_late(void);
void omap3630_init_late(void);
void am35xx_init_late(void);
void ti81xx_init_late(void);
int omap2_common_pm_late_init(void);
void dra7xx_init_early(void);

#ifdef CONFIG_SOC_BUS
void omap_soc_device_init(void);
#else
static inline void omap_soc_device_init(void)
{
}
#endif

#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
#else
static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
{
}
#endif

#ifdef CONFIG_SOC_AM33XX
void am33xx_restart(enum reboot_mode mode, const char *cmd);
#else
static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
{
}
#endif

#ifdef CONFIG_ARCH_OMAP3
void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
#else
static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
{
}
#endif

#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
void omap44xx_restart(enum reboot_mode mode, const char *cmd);
#else
static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
{
}
#endif

/* This gets called from mach-omap2/io.c, do not call this */
void __init omap2_set_globals_tap(u32 class, void __iomem *tap);

void __init omap242x_map_io(void);
void __init omap243x_map_io(void);
void __init omap3_map_io(void);
void __init am33xx_map_io(void);
void __init omap4_map_io(void);
void __init omap5_map_io(void);
void __init ti81xx_map_io(void);

/* omap_barriers_init() is OMAP4 only */
void omap_barriers_init(void);

/**
 * omap_test_timeout - busy-loop, testing a condition
 * @cond: condition to test until it evaluates to true
 * @timeout: maximum number of microseconds in the timeout
 * @index: loop index (integer)
 *
 * Loop waiting for @cond to become true or until at least @timeout
 * microseconds have passed.  To use, define some integer @index in the
 * calling code.  After running, if @index == @timeout, then the loop has
 * timed out.
 */
#define omap_test_timeout(cond, timeout, index)			\
({								\
	for (index = 0; index < timeout; index++) {		\
		if (cond)					\
			break;					\
		udelay(1);					\
	}							\
})

extern struct device *omap2_get_mpuss_device(void);
extern struct device *omap2_get_iva_device(void);
extern struct device *omap2_get_l3_device(void);
extern struct device *omap4_get_dsp_device(void);

void omap2_init_irq(void);
void omap3_init_irq(void);
void ti81xx_init_irq(void);
extern int omap_irq_pending(void);
void omap_intc_save_context(void);
void omap_intc_restore_context(void);
void omap3_intc_suspend(void);
void omap3_intc_prepare_idle(void);
void omap3_intc_resume_idle(void);
void omap2_intc_handle_irq(struct pt_regs *regs);
void omap3_intc_handle_irq(struct pt_regs *regs);
void omap_intc_of_init(void);
void omap_gic_of_init(void);

#ifdef CONFIG_CACHE_L2X0
extern void __iomem *omap4_get_l2cache_base(void);
#endif

struct device_node;
#ifdef CONFIG_OF
int __init intc_of_init(struct device_node *node,
			     struct device_node *parent);
#else
int __init intc_of_init(struct device_node *node,
			     struct device_node *parent)
{
	return 0;
}
#endif

#ifdef CONFIG_SMP
extern void __iomem *omap4_get_scu_base(void);
#else
static inline void __iomem *omap4_get_scu_base(void)
{
	return NULL;
}
#endif

extern void __init gic_init_irq(void);
extern void gic_dist_disable(void);
extern bool gic_dist_disabled(void);
extern void gic_timer_retrigger(void);
extern void omap_smc1(u32 fn, u32 arg);
extern void __iomem *omap4_get_sar_ram_base(void);
extern void omap_do_wfi(void);

#ifdef CONFIG_SMP
/* Needed for secondary core boot */
extern void omap4_secondary_startup(void);
extern void omap4460_secondary_startup(void);
extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
extern void omap_auxcoreboot_addr(u32 cpu_addr);
extern u32 omap_read_auxcoreboot0(void);

extern void omap4_cpu_die(unsigned int cpu);

extern struct smp_operations omap4_smp_ops;

extern void omap5_secondary_startup(void);
#endif

#if defined(CONFIG_SMP) && defined(CONFIG_PM)
extern int omap4_mpuss_init(void);
extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
extern int omap4_finish_suspend(unsigned long cpu_state);
extern void omap4_cpu_resume(void);
extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
#else
static inline int omap4_enter_lowpower(unsigned int cpu,
					unsigned int power_state)
{
	cpu_do_idle();
	return 0;
}

static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
{
	cpu_do_idle();
	return 0;
}

static inline int omap4_mpuss_init(void)
{
	return 0;
}

static inline int omap4_finish_suspend(unsigned long cpu_state)
{
	return 0;
}

static inline void omap4_cpu_resume(void)
{}

#endif

struct omap_sdrc_params;
extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
				      struct omap_sdrc_params *sdrc_cs1);
struct omap2_hsmmc_info;
extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
extern void omap_reserve(void);

struct omap_hwmod;
extern int omap_dss_reset(struct omap_hwmod *);

/* SoC specific clock initializer */
extern int (*omap_clk_init)(void);

#endif /* __ASSEMBLER__ */
#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
Commit	Line	Data
4e65331c TL	1	/*
	2	* Header for code common to all OMAP2+ machines.
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms of the GNU General Public License as published by the
	6	* Free Software Foundation; either version 2 of the License, or (at your
	7	* option) any later version.
	8	*
	9	* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
	10	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	11	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	12	* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
	13	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	14	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	15	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	16	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	17	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	18	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	19	*
	20	* You should have received a copy of the GNU General Public License along
	21	* with this program; if not, write to the Free Software Foundation, Inc.,
	22	* 675 Mass Ave, Cambridge, MA 02139, USA.
	23	*/
	24
	25	#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
	26	#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
b2b9762f	27	#ifndef __ASSEMBLER__
4e65331c	28
ec2c0825	29	#include <linux/irq.h>
4e65331c	30	#include <linux/delay.h>
3a8761c0	31	#include <linux/i2c.h>
1ee47b0a	32	#include <linux/i2c/twl.h>
3a8761c0	33	#include <linux/i2c-omap.h>
7b6d864b	34	#include <linux/reboot.h>
dbc04161	35
b2b9762f	36	#include <asm/proc-fns.h>
4e65331c	37
3a8761c0	38	#include "i2c.h"
3d82cbbb	39	#include "serial.h"
3a8761c0	40
54db6eee	41	#include "usb.h"
dbc04161	42
ec2c0825	43	#define OMAP_INTC_START NR_IRQS
7d7e1eba	44
bbd707ac SG	45	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
	46	int omap2_pm_init(void);
	47	#else
	48	static inline int omap2_pm_init(void)
	49	{
	50	return 0;
	51	}
	52	#endif
	53
	54	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
	55	int omap3_pm_init(void);
	56	#else
	57	static inline int omap3_pm_init(void)
	58	{
	59	return 0;
	60	}
	61	#endif
	62
	63	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
	64	int omap4_pm_init(void);
	65	#else
	66	static inline int omap4_pm_init(void)
	67	{
	68	return 0;
	69	}
	70	#endif
	71
	72	#ifdef CONFIG_OMAP_MUX
	73	int omap_mux_late_init(void);
	74	#else
	75	static inline int omap_mux_late_init(void)
	76	{
	77	return 0;
	78	}
	79	#endif
	80
4e65331c TL	81	extern void omap2_init_common_infrastructure(void);
4e65331c TL	82
6bb27d73 SW	83	extern void omap2_sync32k_timer_init(void);
	84	extern void omap3_sync32k_timer_init(void);
	85	extern void omap3_secure_sync32k_timer_init(void);
00ea4d56	86	extern void omap3_gptimer_timer_init(void);
6bb27d73 SW	87	extern void omap4_local_timer_init(void);
6bb27d73 SW	88	extern void omap5_realtime_timer_init(void);
4e65331c TL	89
	90	void omap2420_init_early(void);
	91	void omap2430_init_early(void);
	92	void omap3430_init_early(void);
	93	void omap35xx_init_early(void);
	94	void omap3630_init_early(void);
	95	void omap3_init_early(void); /* Do not use this one */
ce3fc89a	96	void am33xx_init_early(void);
4e65331c	97	void am35xx_init_early(void);
a920360f	98	void ti81xx_init_early(void);
08f30989	99	void am33xx_init_early(void);
c5107027	100	void am43xx_init_early(void);
4e65331c	101	void omap4430_init_early(void);
05e152c7	102	void omap5_init_early(void);
bbd707ac SG	103	void omap3_init_late(void); /* Do not use this one */
	104	void omap4430_init_late(void);
	105	void omap2420_init_late(void);
	106	void omap2430_init_late(void);
	107	void omap3430_init_late(void);
	108	void omap35xx_init_late(void);
	109	void omap3630_init_late(void);
	110	void am35xx_init_late(void);
	111	void ti81xx_init_late(void);
bbd707ac	112	int omap2_common_pm_late_init(void);
a3a9384a	113	void dra7xx_init_early(void);
4e65331c	114
6770b211 RB	115	#ifdef CONFIG_SOC_BUS
	116	void omap_soc_device_init(void);
	117	#else
	118	static inline void omap_soc_device_init(void)
	119	{
	120	}
	121	#endif
	122
2f334a38	123	#if defined(CONFIG_SOC_OMAP2420) \|\| defined(CONFIG_SOC_OMAP2430)
7b6d864b	124	void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
ecc46cfd	125	#else
7b6d864b	126	static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
2f334a38 PW	127	{
2f334a38 PW	128	}
ecc46cfd	129	#endif
2f334a38	130
14e067c1	131	#ifdef CONFIG_SOC_AM33XX
7b6d864b	132	void am33xx_restart(enum reboot_mode mode, const char *cmd);
14e067c1	133	#else
7b6d864b	134	static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
14e067c1 JSB	135	{
	136	}
	137	#endif
	138
2f334a38	139	#ifdef CONFIG_ARCH_OMAP3
7b6d864b	140	void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
2f334a38	141	#else
7b6d864b	142	static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
2f334a38 PW	143	{
	144	}
	145	#endif
	146
	147	#if defined(CONFIG_ARCH_OMAP4) \|\| defined(CONFIG_SOC_OMAP5)
7b6d864b	148	void omap44xx_restart(enum reboot_mode mode, const char *cmd);
2f334a38	149	#else
7b6d864b	150	static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
2f334a38 PW	151	{
	152	}
	153	#endif
	154
b6a4226c PW	155	/* This gets called from mach-omap2/io.c, do not call this */
	156	void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
	157
	158	void __init omap242x_map_io(void);
	159	void __init omap243x_map_io(void);
	160	void __init omap3_map_io(void);
	161	void __init am33xx_map_io(void);
	162	void __init omap4_map_io(void);
	163	void __init omap5_map_io(void);
	164	void __init ti81xx_map_io(void);
	165
	166	/* omap_barriers_init() is OMAP4 only */
2ec1fc4e	167	void omap_barriers_init(void);
4e65331c TL	168
	169	/**
	170	* omap_test_timeout - busy-loop, testing a condition
	171	* @cond: condition to test until it evaluates to true
	172	* @timeout: maximum number of microseconds in the timeout
	173	* @index: loop index (integer)
	174	*
	175	* Loop waiting for @cond to become true or until at least @timeout
	176	* microseconds have passed. To use, define some integer @index in the
	177	* calling code. After running, if @index == @timeout, then the loop has
	178	* timed out.
	179	*/
	180	#define omap_test_timeout(cond, timeout, index) \
	181	({ \
	182	for (index = 0; index < timeout; index++) { \
	183	if (cond) \
	184	break; \
	185	udelay(1); \
	186	} \
	187	})
	188
	189	extern struct device *omap2_get_mpuss_device(void);
	190	extern struct device *omap2_get_iva_device(void);
	191	extern struct device *omap2_get_l3_device(void);
	192	extern struct device *omap4_get_dsp_device(void);
	193
	194	void omap2_init_irq(void);
	195	void omap3_init_irq(void);
a920360f	196	void ti81xx_init_irq(void);
4e65331c TL	197	extern int omap_irq_pending(void);
	198	void omap_intc_save_context(void);
	199	void omap_intc_restore_context(void);
	200	void omap3_intc_suspend(void);
	201	void omap3_intc_prepare_idle(void);
	202	void omap3_intc_resume_idle(void);
f88f4dd8 SS	203	void omap2_intc_handle_irq(struct pt_regs *regs);
f88f4dd8 SS	204	void omap3_intc_handle_irq(struct pt_regs *regs);
c4082d49 S	205	void omap_intc_of_init(void);
c4082d49 S	206	void omap_gic_of_init(void);
4e65331c	207
4e65331c	208	#ifdef CONFIG_CACHE_L2X0
02afe8a7	209	extern void __iomem *omap4_get_l2cache_base(void);
4e65331c TL	210	#endif
4e65331c TL	211
52fa2120 BC	212	struct device_node;
52fa2120 BC	213	#ifdef CONFIG_OF
c4082d49	214	int __init intc_of_init(struct device_node *node,
52fa2120 BC	215	struct device_node *parent);
52fa2120 BC	216	#else
c4082d49	217	int __init intc_of_init(struct device_node *node,
52fa2120 BC	218	struct device_node *parent)
	219	{
	220	return 0;
	221	}
	222	#endif
	223
02afe8a7 SS	224	#ifdef CONFIG_SMP
	225	extern void __iomem *omap4_get_scu_base(void);
	226	#else
	227	static inline void __iomem *omap4_get_scu_base(void)
	228	{
	229	return NULL;
	230	}
4e65331c TL	231	#endif
4e65331c TL	232
4e65331c	233	extern void __init gic_init_irq(void);
ff999b8a	234	extern void gic_dist_disable(void);
cd8ce159 CC	235	extern bool gic_dist_disabled(void);
cd8ce159 CC	236	extern void gic_timer_retrigger(void);
4e65331c	237	extern void omap_smc1(u32 fn, u32 arg);
501f0c75	238	extern void __iomem *omap4_get_sar_ram_base(void);
b2b9762f	239	extern void omap_do_wfi(void);
4e65331c TL	240
	241	#ifdef CONFIG_SMP
	242	/* Needed for secondary core boot */
baf4b7d3 SS	243	extern void omap4_secondary_startup(void);
baf4b7d3 SS	244	extern void omap4460_secondary_startup(void);
4e65331c TL	245	extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
	246	extern void omap_auxcoreboot_addr(u32 cpu_addr);
	247	extern u32 omap_read_auxcoreboot0(void);
06915321 MZ	248
	249	extern void omap4_cpu_die(unsigned int cpu);
	250
	251	extern struct smp_operations omap4_smp_ops;
	252
283f708c	253	extern void omap5_secondary_startup(void);
4e65331c TL	254	#endif
4e65331c TL	255
b2b9762f SS	256	#if defined(CONFIG_SMP) && defined(CONFIG_PM)
	257	extern int omap4_mpuss_init(void);
	258	extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
	259	extern int omap4_finish_suspend(unsigned long cpu_state);
	260	extern void omap4_cpu_resume(void);
b5b4f288	261	extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
b2b9762f SS	262	#else
	263	static inline int omap4_enter_lowpower(unsigned int cpu,
	264	unsigned int power_state)
	265	{
	266	cpu_do_idle();
	267	return 0;
	268	}
	269
b5b4f288 SS	270	static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
	271	{
	272	cpu_do_idle();
	273	return 0;
	274	}
	275
b2b9762f SS	276	static inline int omap4_mpuss_init(void)
	277	{
	278	return 0;
	279	}
	280
	281	static inline int omap4_finish_suspend(unsigned long cpu_state)
	282	{
	283	return 0;
	284	}
	285
	286	static inline void omap4_cpu_resume(void)
	287	{}
3ba2a739	288
b2b9762f	289	#endif
258ee922 TL	290
	291	struct omap_sdrc_params;
	292	extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
	293	struct omap_sdrc_params *sdrc_cs1);
1ee47b0a B	294	struct omap2_hsmmc_info;
1ee47b0a B	295	extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
f583f0f2	296	extern void omap_reserve(void);
258ee922	297
5c2e8852 TL	298	struct omap_hwmod;
5c2e8852 TL	299	extern int omap_dss_reset(struct omap_hwmod *);
258ee922	300
ff931c82 RN	301	/* SoC specific clock initializer */
	302	extern int (*omap_clk_init)(void);
	303
b2b9762f	304	#endif /* __ASSEMBLER__ */
4e65331c	305	#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */