ARM: OMAP2+: Fix dm814 and dm816 for clocks and timer init
[deliverable/linux.git] / arch / arm / mach-omap2 / common.h
CommitLineData
4e65331c
TL
1/*
2 * Header for code common to all OMAP2+ machines.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
b2b9762f 27#ifndef __ASSEMBLER__
4e65331c 28
ec2c0825 29#include <linux/irq.h>
4e65331c 30#include <linux/delay.h>
3a8761c0 31#include <linux/i2c.h>
1ee47b0a 32#include <linux/i2c/twl.h>
3a8761c0 33#include <linux/i2c-omap.h>
7b6d864b 34#include <linux/reboot.h>
eaacabc0 35#include <linux/irqchip/irq-omap-intc.h>
dbc04161 36
b2b9762f 37#include <asm/proc-fns.h>
4e65331c 38
3a8761c0 39#include "i2c.h"
3d82cbbb 40#include "serial.h"
3a8761c0 41
54db6eee 42#include "usb.h"
dbc04161 43
ec2c0825 44#define OMAP_INTC_START NR_IRQS
7d7e1eba 45
bbd707ac
SG
46#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
47int omap2_pm_init(void);
48#else
49static inline int omap2_pm_init(void)
50{
51 return 0;
52}
53#endif
54
55#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
56int omap3_pm_init(void);
57#else
58static inline int omap3_pm_init(void)
59{
60 return 0;
61}
62#endif
63
6af16a1d 64#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
bbd707ac 65int omap4_pm_init(void);
de70af49 66int omap4_pm_init_early(void);
bbd707ac
SG
67#else
68static inline int omap4_pm_init(void)
69{
70 return 0;
71}
de70af49
NM
72
73static inline int omap4_pm_init_early(void)
74{
75 return 0;
76}
bbd707ac
SG
77#endif
78
79#ifdef CONFIG_OMAP_MUX
80int omap_mux_late_init(void);
81#else
82static inline int omap_mux_late_init(void)
83{
84 return 0;
85}
86#endif
87
4e65331c
TL
88extern void omap2_init_common_infrastructure(void);
89
6bb27d73
SW
90extern void omap2_sync32k_timer_init(void);
91extern void omap3_sync32k_timer_init(void);
92extern void omap3_secure_sync32k_timer_init(void);
00ea4d56 93extern void omap3_gptimer_timer_init(void);
6bb27d73 94extern void omap4_local_timer_init(void);
2ad501cc 95#ifdef CONFIG_CACHE_L2X0
b39b14e6 96int omap_l2_cache_init(void);
2ad501cc
AB
97#else
98static inline int omap_l2_cache_init(void)
99{
100 return 0;
101}
102#endif
6bb27d73 103extern void omap5_realtime_timer_init(void);
4e65331c
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104
105void omap2420_init_early(void);
106void omap2430_init_early(void);
107void omap3430_init_early(void);
108void omap35xx_init_early(void);
109void omap3630_init_early(void);
110void omap3_init_early(void); /* Do not use this one */
ce3fc89a 111void am33xx_init_early(void);
4e65331c 112void am35xx_init_early(void);
c27964b5
TL
113void ti814x_init_early(void);
114void ti816x_init_early(void);
08f30989 115void am33xx_init_early(void);
c5107027 116void am43xx_init_early(void);
765e7a06 117void am43xx_init_late(void);
4e65331c 118void omap4430_init_early(void);
05e152c7 119void omap5_init_early(void);
bbd707ac
SG
120void omap3_init_late(void); /* Do not use this one */
121void omap4430_init_late(void);
122void omap2420_init_late(void);
123void omap2430_init_late(void);
124void omap3430_init_late(void);
125void omap35xx_init_late(void);
126void omap3630_init_late(void);
127void am35xx_init_late(void);
128void ti81xx_init_late(void);
765e7a06
NM
129void am33xx_init_late(void);
130void omap5_init_late(void);
bbd707ac 131int omap2_common_pm_late_init(void);
a3a9384a 132void dra7xx_init_early(void);
765e7a06 133void dra7xx_init_late(void);
4e65331c 134
6770b211
RB
135#ifdef CONFIG_SOC_BUS
136void omap_soc_device_init(void);
137#else
138static inline void omap_soc_device_init(void)
139{
140}
141#endif
142
2f334a38 143#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
7b6d864b 144void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
ecc46cfd 145#else
7b6d864b 146static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
2f334a38
PW
147{
148}
ecc46cfd 149#endif
2f334a38 150
14e067c1 151#ifdef CONFIG_SOC_AM33XX
7b6d864b 152void am33xx_restart(enum reboot_mode mode, const char *cmd);
14e067c1 153#else
7b6d864b 154static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
14e067c1
JSB
155{
156}
157#endif
158
2f334a38 159#ifdef CONFIG_ARCH_OMAP3
7b6d864b 160void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
2f334a38 161#else
7b6d864b 162static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
2f334a38
PW
163{
164}
165#endif
166
7abb1a53
NM
167#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
168 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
7b6d864b 169void omap44xx_restart(enum reboot_mode mode, const char *cmd);
2f334a38 170#else
7b6d864b 171static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
2f334a38
PW
172{
173}
174#endif
175
b6a4226c
PW
176/* This gets called from mach-omap2/io.c, do not call this */
177void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
178
179void __init omap242x_map_io(void);
180void __init omap243x_map_io(void);
181void __init omap3_map_io(void);
182void __init am33xx_map_io(void);
183void __init omap4_map_io(void);
184void __init omap5_map_io(void);
185void __init ti81xx_map_io(void);
186
187/* omap_barriers_init() is OMAP4 only */
2ec1fc4e 188void omap_barriers_init(void);
4e65331c
TL
189
190/**
191 * omap_test_timeout - busy-loop, testing a condition
192 * @cond: condition to test until it evaluates to true
193 * @timeout: maximum number of microseconds in the timeout
194 * @index: loop index (integer)
195 *
196 * Loop waiting for @cond to become true or until at least @timeout
197 * microseconds have passed. To use, define some integer @index in the
198 * calling code. After running, if @index == @timeout, then the loop has
199 * timed out.
200 */
201#define omap_test_timeout(cond, timeout, index) \
202({ \
203 for (index = 0; index < timeout; index++) { \
204 if (cond) \
205 break; \
206 udelay(1); \
207 } \
208})
209
210extern struct device *omap2_get_mpuss_device(void);
211extern struct device *omap2_get_iva_device(void);
212extern struct device *omap2_get_l3_device(void);
213extern struct device *omap4_get_dsp_device(void);
214
c4082d49 215void omap_gic_of_init(void);
4e65331c 216
4e65331c 217#ifdef CONFIG_CACHE_L2X0
02afe8a7 218extern void __iomem *omap4_get_l2cache_base(void);
4e65331c
TL
219#endif
220
52fa2120 221struct device_node;
52fa2120 222
02afe8a7
SS
223#ifdef CONFIG_SMP
224extern void __iomem *omap4_get_scu_base(void);
225#else
226static inline void __iomem *omap4_get_scu_base(void)
227{
228 return NULL;
229}
4e65331c
TL
230#endif
231
ff999b8a 232extern void gic_dist_disable(void);
74ed7bdc 233extern void gic_dist_enable(void);
cd8ce159
CC
234extern bool gic_dist_disabled(void);
235extern void gic_timer_retrigger(void);
4e65331c 236extern void omap_smc1(u32 fn, u32 arg);
501f0c75 237extern void __iomem *omap4_get_sar_ram_base(void);
b2b9762f 238extern void omap_do_wfi(void);
4e65331c
TL
239
240#ifdef CONFIG_SMP
241/* Needed for secondary core boot */
baf4b7d3
SS
242extern void omap4_secondary_startup(void);
243extern void omap4460_secondary_startup(void);
4e65331c
TL
244extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
245extern void omap_auxcoreboot_addr(u32 cpu_addr);
246extern u32 omap_read_auxcoreboot0(void);
06915321
MZ
247
248extern void omap4_cpu_die(unsigned int cpu);
249
250extern struct smp_operations omap4_smp_ops;
251
283f708c 252extern void omap5_secondary_startup(void);
4e65331c
TL
253#endif
254
b2b9762f
SS
255#if defined(CONFIG_SMP) && defined(CONFIG_PM)
256extern int omap4_mpuss_init(void);
257extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
258extern int omap4_finish_suspend(unsigned long cpu_state);
259extern void omap4_cpu_resume(void);
b5b4f288 260extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
b2b9762f
SS
261#else
262static inline int omap4_enter_lowpower(unsigned int cpu,
263 unsigned int power_state)
264{
265 cpu_do_idle();
266 return 0;
267}
268
b5b4f288
SS
269static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
270{
271 cpu_do_idle();
272 return 0;
273}
274
b2b9762f
SS
275static inline int omap4_mpuss_init(void)
276{
277 return 0;
278}
279
280static inline int omap4_finish_suspend(unsigned long cpu_state)
281{
282 return 0;
283}
284
285static inline void omap4_cpu_resume(void)
286{}
3ba2a739 287
b2b9762f 288#endif
258ee922 289
31957609 290void pdata_quirks_init(const struct of_device_id *);
dad12d11 291void omap_auxdata_legacy_init(struct device *dev);
8651bd8c 292void omap_pcs_legacy_init(int irq, void (*rearm)(void));
6a08e1e6 293
258ee922
TL
294struct omap_sdrc_params;
295extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
296 struct omap_sdrc_params *sdrc_cs1);
1ee47b0a 297struct omap2_hsmmc_info;
f583f0f2 298extern void omap_reserve(void);
258ee922 299
5c2e8852
TL
300struct omap_hwmod;
301extern int omap_dss_reset(struct omap_hwmod *);
258ee922 302
ff931c82 303/* SoC specific clock initializer */
cfa9667d 304int omap_clk_init(void);
ff931c82 305
dcdf407b 306int __init omapdss_init_of(void);
6a0e6b38 307void __init omapdss_early_init_of(void);
dcdf407b 308
b2b9762f 309#endif /* __ASSEMBLER__ */
4e65331c 310#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
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