[deliverable/linux.git] / arch / arm / mach-omap2 / common.h

/*
 * Header for code common to all OMAP2+ machines.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * You should have received a copy of the  GNU General Public License along
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
#ifndef __ASSEMBLER__

#include <linux/delay.h>
#include <linux/i2c/twl.h>
#include <plat/common.h>
#include <asm/proc-fns.h>

#ifdef CONFIG_SOC_OMAP2420
extern void omap242x_map_common_io(void);
#else
static inline void omap242x_map_common_io(void)
{
}
#endif

#ifdef CONFIG_SOC_OMAP2430
extern void omap243x_map_common_io(void);
#else
static inline void omap243x_map_common_io(void)
{
}
#endif

#ifdef CONFIG_ARCH_OMAP3
extern void omap34xx_map_common_io(void);
#else
static inline void omap34xx_map_common_io(void)
{
}
#endif

#ifdef CONFIG_SOC_TI81XX
extern void omapti81xx_map_common_io(void);
#else
static inline void omapti81xx_map_common_io(void)
{
}
#endif

#ifdef CONFIG_SOC_AM33XX
extern void omapam33xx_map_common_io(void);
#else
static inline void omapam33xx_map_common_io(void)
{
}
#endif

#ifdef CONFIG_ARCH_OMAP4
extern void omap44xx_map_common_io(void);
#else
static inline void omap44xx_map_common_io(void)
{
}
#endif

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
int omap2_pm_init(void);
#else
static inline int omap2_pm_init(void)
{
	return 0;
}
#endif

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
int omap3_pm_init(void);
#else
static inline int omap3_pm_init(void)
{
	return 0;
}
#endif

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
int omap4_pm_init(void);
#else
static inline int omap4_pm_init(void)
{
	return 0;
}
#endif

#ifdef CONFIG_OMAP_MUX
int omap_mux_late_init(void);
#else
static inline int omap_mux_late_init(void)
{
	return 0;
}
#endif

#ifdef CONFIG_SOC_OMAP5
extern void omap5_map_common_io(void);
#else
static inline void omap5_map_common_io(void)
{
}
#endif

extern void omap2_init_common_infrastructure(void);

extern struct sys_timer omap2_timer;
extern struct sys_timer omap3_timer;
extern struct sys_timer omap3_secure_timer;
extern struct sys_timer omap3_am33xx_timer;
extern struct sys_timer omap4_timer;
extern struct sys_timer omap5_timer;

void omap2420_init_early(void);
void omap2430_init_early(void);
void omap3430_init_early(void);
void omap35xx_init_early(void);
void omap3630_init_early(void);
void omap3_init_early(void);	/* Do not use this one */
void am33xx_init_early(void);
void am35xx_init_early(void);
void ti81xx_init_early(void);
void am33xx_init_early(void);
void omap4430_init_early(void);
void omap5_init_early(void);
void omap3_init_late(void);	/* Do not use this one */
void omap4430_init_late(void);
void omap2420_init_late(void);
void omap2430_init_late(void);
void omap3430_init_late(void);
void omap35xx_init_late(void);
void omap3630_init_late(void);
void am35xx_init_late(void);
void ti81xx_init_late(void);
void omap4430_init_late(void);
int omap2_common_pm_late_init(void);
void omap_prcm_restart(char, const char *);

/*
 * IO bases for various OMAP processors
 * Except the tap base, rest all the io bases
 * listed are physical addresses.
 */
struct omap_globals {
	u32		class;		/* OMAP class to detect */
	void __iomem	*tap;		/* Control module ID code */
	void __iomem	*sdrc;           /* SDRAM Controller */
	void __iomem	*sms;            /* SDRAM Memory Scheduler */
	void __iomem	*ctrl;           /* System Control Module */
	void __iomem	*ctrl_pad;	/* PAD Control Module */
	void __iomem	*prm;            /* Power and Reset Management */
	void __iomem	*cm;             /* Clock Management */
	void __iomem	*cm2;
	void __iomem	*prcm_mpu;
};

void omap2_set_globals_242x(void);
void omap2_set_globals_243x(void);
void omap2_set_globals_3xxx(void);
void omap2_set_globals_443x(void);
void omap2_set_globals_5xxx(void);
void omap2_set_globals_ti81xx(void);
void omap2_set_globals_am33xx(void);

/* These get called from omap2_set_globals_xxxx(), do not call these */
void omap2_set_globals_tap(struct omap_globals *);
#if defined(CONFIG_SOC_HAS_OMAP2_SDRC)
void omap2_set_globals_sdrc(struct omap_globals *);
#else
static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
{ }
#endif
void omap2_set_globals_control(struct omap_globals *);
void omap2_set_globals_prcm(struct omap_globals *);

void omap242x_map_io(void);
void omap243x_map_io(void);
void omap3_map_io(void);
void am33xx_map_io(void);
void omap4_map_io(void);
void omap5_map_io(void);
void ti81xx_map_io(void);
void omap_barriers_init(void);

/**
 * omap_test_timeout - busy-loop, testing a condition
 * @cond: condition to test until it evaluates to true
 * @timeout: maximum number of microseconds in the timeout
 * @index: loop index (integer)
 *
 * Loop waiting for @cond to become true or until at least @timeout
 * microseconds have passed.  To use, define some integer @index in the
 * calling code.  After running, if @index == @timeout, then the loop has
 * timed out.
 */
#define omap_test_timeout(cond, timeout, index)			\
({								\
	for (index = 0; index < timeout; index++) {		\
		if (cond)					\
			break;					\
		udelay(1);					\
	}							\
})

extern struct device *omap2_get_mpuss_device(void);
extern struct device *omap2_get_iva_device(void);
extern struct device *omap2_get_l3_device(void);
extern struct device *omap4_get_dsp_device(void);

void omap2_init_irq(void);
void omap3_init_irq(void);
void ti81xx_init_irq(void);
extern int omap_irq_pending(void);
void omap_intc_save_context(void);
void omap_intc_restore_context(void);
void omap3_intc_suspend(void);
void omap3_intc_prepare_idle(void);
void omap3_intc_resume_idle(void);
void omap2_intc_handle_irq(struct pt_regs *regs);
void omap3_intc_handle_irq(struct pt_regs *regs);

#ifdef CONFIG_CACHE_L2X0
extern void __iomem *omap4_get_l2cache_base(void);
#endif

struct device_node;
#ifdef CONFIG_OF
int __init omap_intc_of_init(struct device_node *node,
			     struct device_node *parent);
#else
int __init omap_intc_of_init(struct device_node *node,
			     struct device_node *parent)
{
	return 0;
}
#endif

#ifdef CONFIG_SMP
extern void __iomem *omap4_get_scu_base(void);
#else
static inline void __iomem *omap4_get_scu_base(void)
{
	return NULL;
}
#endif

extern void __init gic_init_irq(void);
extern void omap_smc1(u32 fn, u32 arg);
extern void __iomem *omap4_get_sar_ram_base(void);
extern void omap_do_wfi(void);

#ifdef CONFIG_SMP
/* Needed for secondary core boot */
extern void omap_secondary_startup(void);
extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
extern void omap_auxcoreboot_addr(u32 cpu_addr);
extern u32 omap_read_auxcoreboot0(void);
extern void omap5_secondary_startup(void);
#endif

#if defined(CONFIG_SMP) && defined(CONFIG_PM)
extern int omap4_mpuss_init(void);
extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
extern int omap4_finish_suspend(unsigned long cpu_state);
extern void omap4_cpu_resume(void);
extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
extern u32 omap4_mpuss_read_prev_context_state(void);
#else
static inline int omap4_enter_lowpower(unsigned int cpu,
					unsigned int power_state)
{
	cpu_do_idle();
	return 0;
}

static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
{
	cpu_do_idle();
	return 0;
}

static inline int omap4_mpuss_init(void)
{
	return 0;
}

static inline int omap4_finish_suspend(unsigned long cpu_state)
{
	return 0;
}

static inline void omap4_cpu_resume(void)
{}

static inline u32 omap4_mpuss_read_prev_context_state(void)
{
	return 0;
}
#endif

struct omap_sdrc_params;
extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
				      struct omap_sdrc_params *sdrc_cs1);
struct omap2_hsmmc_info;
extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);

#endif /* __ASSEMBLER__ */
#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
Commit	Line	Data
4e65331c TL	1	/*
	2	* Header for code common to all OMAP2+ machines.
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms of the GNU General Public License as published by the
	6	* Free Software Foundation; either version 2 of the License, or (at your
	7	* option) any later version.
	8	*
	9	* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
	10	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	11	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	12	* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
	13	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	14	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	15	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	16	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	17	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	18	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	19	*
	20	* You should have received a copy of the GNU General Public License along
	21	* with this program; if not, write to the Free Software Foundation, Inc.,
	22	* 675 Mass Ave, Cambridge, MA 02139, USA.
	23	*/
	24
	25	#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
	26	#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
b2b9762f	27	#ifndef __ASSEMBLER__
4e65331c TL	28
4e65331c TL	29	#include <linux/delay.h>
1ee47b0a	30	#include <linux/i2c/twl.h>
4e65331c	31	#include <plat/common.h>
b2b9762f	32	#include <asm/proc-fns.h>
4e65331c TL	33
	34	#ifdef CONFIG_SOC_OMAP2420
	35	extern void omap242x_map_common_io(void);
	36	#else
	37	static inline void omap242x_map_common_io(void)
	38	{
	39	}
	40	#endif
	41
	42	#ifdef CONFIG_SOC_OMAP2430
	43	extern void omap243x_map_common_io(void);
	44	#else
	45	static inline void omap243x_map_common_io(void)
	46	{
	47	}
	48	#endif
	49
	50	#ifdef CONFIG_ARCH_OMAP3
	51	extern void omap34xx_map_common_io(void);
	52	#else
	53	static inline void omap34xx_map_common_io(void)
	54	{
	55	}
	56	#endif
	57
33959553	58	#ifdef CONFIG_SOC_TI81XX
a920360f	59	extern void omapti81xx_map_common_io(void);
4e65331c	60	#else
a920360f	61	static inline void omapti81xx_map_common_io(void)
4e65331c TL	62	{
	63	}
	64	#endif
	65
bb6abcf4	66	#ifdef CONFIG_SOC_AM33XX
1e6cb146 AM	67	extern void omapam33xx_map_common_io(void);
	68	#else
	69	static inline void omapam33xx_map_common_io(void)
	70	{
	71	}
	72	#endif
	73
4e65331c TL	74	#ifdef CONFIG_ARCH_OMAP4
	75	extern void omap44xx_map_common_io(void);
	76	#else
	77	static inline void omap44xx_map_common_io(void)
	78	{
	79	}
	80	#endif
	81
bbd707ac SG	82	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
	83	int omap2_pm_init(void);
	84	#else
	85	static inline int omap2_pm_init(void)
	86	{
	87	return 0;
	88	}
	89	#endif
	90
	91	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
	92	int omap3_pm_init(void);
	93	#else
	94	static inline int omap3_pm_init(void)
	95	{
	96	return 0;
	97	}
	98	#endif
	99
	100	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
	101	int omap4_pm_init(void);
	102	#else
	103	static inline int omap4_pm_init(void)
	104	{
	105	return 0;
	106	}
	107	#endif
	108
	109	#ifdef CONFIG_OMAP_MUX
	110	int omap_mux_late_init(void);
	111	#else
	112	static inline int omap_mux_late_init(void)
	113	{
	114	return 0;
	115	}
	116	#endif
	117
05e152c7 S	118	#ifdef CONFIG_SOC_OMAP5
	119	extern void omap5_map_common_io(void);
	120	#else
	121	static inline void omap5_map_common_io(void)
	122	{
	123	}
	124	#endif
	125
4e65331c TL	126	extern void omap2_init_common_infrastructure(void);
	127
	128	extern struct sys_timer omap2_timer;
	129	extern struct sys_timer omap3_timer;
	130	extern struct sys_timer omap3_secure_timer;
08f30989	131	extern struct sys_timer omap3_am33xx_timer;
4e65331c	132	extern struct sys_timer omap4_timer;
37b3280d	133	extern struct sys_timer omap5_timer;
4e65331c TL	134
	135	void omap2420_init_early(void);
	136	void omap2430_init_early(void);
	137	void omap3430_init_early(void);
	138	void omap35xx_init_early(void);
	139	void omap3630_init_early(void);
	140	void omap3_init_early(void); /* Do not use this one */
ce3fc89a	141	void am33xx_init_early(void);
4e65331c	142	void am35xx_init_early(void);
a920360f	143	void ti81xx_init_early(void);
08f30989	144	void am33xx_init_early(void);
4e65331c	145	void omap4430_init_early(void);
05e152c7	146	void omap5_init_early(void);
bbd707ac SG	147	void omap3_init_late(void); /* Do not use this one */
	148	void omap4430_init_late(void);
	149	void omap2420_init_late(void);
	150	void omap2430_init_late(void);
	151	void omap3430_init_late(void);
	152	void omap35xx_init_late(void);
	153	void omap3630_init_late(void);
	154	void am35xx_init_late(void);
	155	void ti81xx_init_late(void);
	156	void omap4430_init_late(void);
	157	int omap2_common_pm_late_init(void);
baa95883	158	void omap_prcm_restart(char, const char *);
4e65331c TL	159
	160	/*
	161	* IO bases for various OMAP processors
	162	* Except the tap base, rest all the io bases
	163	* listed are physical addresses.
	164	*/
	165	struct omap_globals {
	166	u32 class; /* OMAP class to detect */
	167	void __iomem tap; / Control module ID code */
	168	void __iomem sdrc; / SDRAM Controller */
	169	void __iomem sms; / SDRAM Memory Scheduler */
	170	void __iomem ctrl; / System Control Module */
	171	void __iomem ctrl_pad; / PAD Control Module */
	172	void __iomem prm; / Power and Reset Management */
	173	void __iomem cm; / Clock Management */
	174	void __iomem *cm2;
610eb8c2	175	void __iomem *prcm_mpu;
4e65331c TL	176	};
	177
	178	void omap2_set_globals_242x(void);
	179	void omap2_set_globals_243x(void);
	180	void omap2_set_globals_3xxx(void);
	181	void omap2_set_globals_443x(void);
05e152c7	182	void omap2_set_globals_5xxx(void);
a920360f	183	void omap2_set_globals_ti81xx(void);
1e6cb146	184	void omap2_set_globals_am33xx(void);
4e65331c TL	185
	186	/* These get called from omap2_set_globals_xxxx(), do not call these */
	187	void omap2_set_globals_tap(struct omap_globals *);
ecc46cfd	188	#if defined(CONFIG_SOC_HAS_OMAP2_SDRC)
4e65331c	189	void omap2_set_globals_sdrc(struct omap_globals *);
ecc46cfd VH	190	#else
	191	static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
	192	{ }
	193	#endif
4e65331c TL	194	void omap2_set_globals_control(struct omap_globals *);
	195	void omap2_set_globals_prcm(struct omap_globals *);
	196
	197	void omap242x_map_io(void);
	198	void omap243x_map_io(void);
	199	void omap3_map_io(void);
1e6cb146	200	void am33xx_map_io(void);
4e65331c	201	void omap4_map_io(void);
05e152c7	202	void omap5_map_io(void);
a920360f	203	void ti81xx_map_io(void);
2ec1fc4e	204	void omap_barriers_init(void);
4e65331c TL	205
	206	/**
	207	* omap_test_timeout - busy-loop, testing a condition
	208	* @cond: condition to test until it evaluates to true
	209	* @timeout: maximum number of microseconds in the timeout
	210	* @index: loop index (integer)
	211	*
	212	* Loop waiting for @cond to become true or until at least @timeout
	213	* microseconds have passed. To use, define some integer @index in the
	214	* calling code. After running, if @index == @timeout, then the loop has
	215	* timed out.
	216	*/
	217	#define omap_test_timeout(cond, timeout, index) \
	218	({ \
	219	for (index = 0; index < timeout; index++) { \
	220	if (cond) \
	221	break; \
	222	udelay(1); \
	223	} \
	224	})
	225
	226	extern struct device *omap2_get_mpuss_device(void);
	227	extern struct device *omap2_get_iva_device(void);
	228	extern struct device *omap2_get_l3_device(void);
	229	extern struct device *omap4_get_dsp_device(void);
	230
	231	void omap2_init_irq(void);
	232	void omap3_init_irq(void);
a920360f	233	void ti81xx_init_irq(void);
4e65331c TL	234	extern int omap_irq_pending(void);
	235	void omap_intc_save_context(void);
	236	void omap_intc_restore_context(void);
	237	void omap3_intc_suspend(void);
	238	void omap3_intc_prepare_idle(void);
	239	void omap3_intc_resume_idle(void);
f88f4dd8 SS	240	void omap2_intc_handle_irq(struct pt_regs *regs);
f88f4dd8 SS	241	void omap3_intc_handle_irq(struct pt_regs *regs);
4e65331c	242
4e65331c	243	#ifdef CONFIG_CACHE_L2X0
02afe8a7	244	extern void __iomem *omap4_get_l2cache_base(void);
4e65331c TL	245	#endif
4e65331c TL	246
52fa2120 BC	247	struct device_node;
	248	#ifdef CONFIG_OF
	249	int __init omap_intc_of_init(struct device_node *node,
	250	struct device_node *parent);
	251	#else
	252	int __init omap_intc_of_init(struct device_node *node,
	253	struct device_node *parent)
	254	{
	255	return 0;
	256	}
	257	#endif
	258
02afe8a7 SS	259	#ifdef CONFIG_SMP
	260	extern void __iomem *omap4_get_scu_base(void);
	261	#else
	262	static inline void __iomem *omap4_get_scu_base(void)
	263	{
	264	return NULL;
	265	}
4e65331c TL	266	#endif
4e65331c TL	267
4e65331c TL	268	extern void __init gic_init_irq(void);
4e65331c TL	269	extern void omap_smc1(u32 fn, u32 arg);
501f0c75	270	extern void __iomem *omap4_get_sar_ram_base(void);
b2b9762f	271	extern void omap_do_wfi(void);
4e65331c TL	272
	273	#ifdef CONFIG_SMP
	274	/* Needed for secondary core boot */
	275	extern void omap_secondary_startup(void);
	276	extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
	277	extern void omap_auxcoreboot_addr(u32 cpu_addr);
	278	extern u32 omap_read_auxcoreboot0(void);
283f708c	279	extern void omap5_secondary_startup(void);
4e65331c TL	280	#endif
4e65331c TL	281
b2b9762f SS	282	#if defined(CONFIG_SMP) && defined(CONFIG_PM)
	283	extern int omap4_mpuss_init(void);
	284	extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
	285	extern int omap4_finish_suspend(unsigned long cpu_state);
	286	extern void omap4_cpu_resume(void);
b5b4f288	287	extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
3ba2a739	288	extern u32 omap4_mpuss_read_prev_context_state(void);
b2b9762f SS	289	#else
	290	static inline int omap4_enter_lowpower(unsigned int cpu,
	291	unsigned int power_state)
	292	{
	293	cpu_do_idle();
	294	return 0;
	295	}
	296
b5b4f288 SS	297	static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
	298	{
	299	cpu_do_idle();
	300	return 0;
	301	}
	302
b2b9762f SS	303	static inline int omap4_mpuss_init(void)
	304	{
	305	return 0;
	306	}
	307
	308	static inline int omap4_finish_suspend(unsigned long cpu_state)
	309	{
	310	return 0;
	311	}
	312
	313	static inline void omap4_cpu_resume(void)
	314	{}
3ba2a739 SS	315
	316	static inline u32 omap4_mpuss_read_prev_context_state(void)
	317	{
	318	return 0;
	319	}
b2b9762f	320	#endif
258ee922 TL	321
	322	struct omap_sdrc_params;
	323	extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
	324	struct omap_sdrc_params *sdrc_cs1);
1ee47b0a B	325	struct omap2_hsmmc_info;
1ee47b0a B	326	extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
258ee922	327
b2b9762f	328	#endif /* __ASSEMBLER__ */
4e65331c	329	#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */