[deliverable/linux.git] / arch / arm / mach-omap2 / common.h

/*
 * Header for code common to all OMAP2+ machines.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * You should have received a copy of the  GNU General Public License along
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
#ifndef __ASSEMBLER__

#include <linux/delay.h>
#include <linux/i2c/twl.h>
#include <plat/common.h>
#include <asm/proc-fns.h>

#define OMAP_INTC_START		0

#ifdef CONFIG_SOC_OMAP2420
extern void omap242x_map_common_io(void);
#else
static inline void omap242x_map_common_io(void)
{
}
#endif

#ifdef CONFIG_SOC_OMAP2430
extern void omap243x_map_common_io(void);
#else
static inline void omap243x_map_common_io(void)
{
}
#endif

#ifdef CONFIG_ARCH_OMAP3
extern void omap34xx_map_common_io(void);
#else
static inline void omap34xx_map_common_io(void)
{
}
#endif

#ifdef CONFIG_SOC_TI81XX
extern void omapti81xx_map_common_io(void);
#else
static inline void omapti81xx_map_common_io(void)
{
}
#endif

#ifdef CONFIG_SOC_AM33XX
extern void omapam33xx_map_common_io(void);
#else
static inline void omapam33xx_map_common_io(void)
{
}
#endif

#ifdef CONFIG_ARCH_OMAP4
extern void omap44xx_map_common_io(void);
#else
static inline void omap44xx_map_common_io(void)
{
}
#endif

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
int omap2_pm_init(void);
#else
static inline int omap2_pm_init(void)
{
	return 0;
}
#endif

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
int omap3_pm_init(void);
#else
static inline int omap3_pm_init(void)
{
	return 0;
}
#endif

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
int omap4_pm_init(void);
#else
static inline int omap4_pm_init(void)
{
	return 0;
}
#endif

#ifdef CONFIG_OMAP_MUX
int omap_mux_late_init(void);
#else
static inline int omap_mux_late_init(void)
{
	return 0;
}
#endif

#ifdef CONFIG_SOC_OMAP5
extern void omap5_map_common_io(void);
#else
static inline void omap5_map_common_io(void)
{
}
#endif

extern void omap2_init_common_infrastructure(void);

extern struct sys_timer omap2_timer;
extern struct sys_timer omap3_timer;
extern struct sys_timer omap3_secure_timer;
extern struct sys_timer omap3_am33xx_timer;
extern struct sys_timer omap4_timer;
extern struct sys_timer omap5_timer;

void omap2420_init_early(void);
void omap2430_init_early(void);
void omap3430_init_early(void);
void omap35xx_init_early(void);
void omap3630_init_early(void);
void omap3_init_early(void);	/* Do not use this one */
void am33xx_init_early(void);
void am35xx_init_early(void);
void ti81xx_init_early(void);
void am33xx_init_early(void);
void omap4430_init_early(void);
void omap5_init_early(void);
void omap3_init_late(void);	/* Do not use this one */
void omap4430_init_late(void);
void omap2420_init_late(void);
void omap2430_init_late(void);
void omap3430_init_late(void);
void omap35xx_init_late(void);
void omap3630_init_late(void);
void am35xx_init_late(void);
void ti81xx_init_late(void);
void omap4430_init_late(void);
int omap2_common_pm_late_init(void);
void omap_prcm_restart(char, const char *);

/*
 * IO bases for various OMAP processors
 * Except the tap base, rest all the io bases
 * listed are physical addresses.
 */
struct omap_globals {
	u32		class;		/* OMAP class to detect */
	void __iomem	*tap;		/* Control module ID code */
	void __iomem	*sdrc;           /* SDRAM Controller */
	void __iomem	*sms;            /* SDRAM Memory Scheduler */
	void __iomem	*ctrl;           /* System Control Module */
	void __iomem	*ctrl_pad;	/* PAD Control Module */
	void __iomem	*prm;            /* Power and Reset Management */
	void __iomem	*cm;             /* Clock Management */
	void __iomem	*cm2;
	void __iomem	*prcm_mpu;
};

void omap2_set_globals_242x(void);
void omap2_set_globals_243x(void);
void omap2_set_globals_3xxx(void);
void omap2_set_globals_443x(void);
void omap2_set_globals_5xxx(void);
void omap2_set_globals_ti81xx(void);
void omap2_set_globals_am33xx(void);

/* These get called from omap2_set_globals_xxxx(), do not call these */
void omap2_set_globals_tap(struct omap_globals *);
#if defined(CONFIG_SOC_HAS_OMAP2_SDRC)
void omap2_set_globals_sdrc(struct omap_globals *);
#else
static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
{ }
#endif
void omap2_set_globals_control(struct omap_globals *);
void omap2_set_globals_prcm(struct omap_globals *);

void omap242x_map_io(void);
void omap243x_map_io(void);
void omap3_map_io(void);
void am33xx_map_io(void);
void omap4_map_io(void);
void omap5_map_io(void);
void ti81xx_map_io(void);
void omap_barriers_init(void);

/**
 * omap_test_timeout - busy-loop, testing a condition
 * @cond: condition to test until it evaluates to true
 * @timeout: maximum number of microseconds in the timeout
 * @index: loop index (integer)
 *
 * Loop waiting for @cond to become true or until at least @timeout
 * microseconds have passed.  To use, define some integer @index in the
 * calling code.  After running, if @index == @timeout, then the loop has
 * timed out.
 */
#define omap_test_timeout(cond, timeout, index)			\
({								\
	for (index = 0; index < timeout; index++) {		\
		if (cond)					\
			break;					\
		udelay(1);					\
	}							\
})

extern struct device *omap2_get_mpuss_device(void);
extern struct device *omap2_get_iva_device(void);
extern struct device *omap2_get_l3_device(void);
extern struct device *omap4_get_dsp_device(void);

void omap2_init_irq(void);
void omap3_init_irq(void);
void ti81xx_init_irq(void);
extern int omap_irq_pending(void);
void omap_intc_save_context(void);
void omap_intc_restore_context(void);
void omap3_intc_suspend(void);
void omap3_intc_prepare_idle(void);
void omap3_intc_resume_idle(void);
void omap2_intc_handle_irq(struct pt_regs *regs);
void omap3_intc_handle_irq(struct pt_regs *regs);
void omap_intc_of_init(void);
void omap_gic_of_init(void);

#ifdef CONFIG_CACHE_L2X0
extern void __iomem *omap4_get_l2cache_base(void);
#endif

struct device_node;
#ifdef CONFIG_OF
int __init intc_of_init(struct device_node *node,
			     struct device_node *parent);
#else
int __init intc_of_init(struct device_node *node,
			     struct device_node *parent)
{
	return 0;
}
#endif

#ifdef CONFIG_SMP
extern void __iomem *omap4_get_scu_base(void);
#else
static inline void __iomem *omap4_get_scu_base(void)
{
	return NULL;
}
#endif

extern void __init gic_init_irq(void);
extern void omap_smc1(u32 fn, u32 arg);
extern void __iomem *omap4_get_sar_ram_base(void);
extern void omap_do_wfi(void);

#ifdef CONFIG_SMP
/* Needed for secondary core boot */
extern void omap_secondary_startup(void);
extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
extern void omap_auxcoreboot_addr(u32 cpu_addr);
extern u32 omap_read_auxcoreboot0(void);
extern void omap5_secondary_startup(void);
#endif

#if defined(CONFIG_SMP) && defined(CONFIG_PM)
extern int omap4_mpuss_init(void);
extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
extern int omap4_finish_suspend(unsigned long cpu_state);
extern void omap4_cpu_resume(void);
extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
extern u32 omap4_mpuss_read_prev_context_state(void);
#else
static inline int omap4_enter_lowpower(unsigned int cpu,
					unsigned int power_state)
{
	cpu_do_idle();
	return 0;
}

static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
{
	cpu_do_idle();
	return 0;
}

static inline int omap4_mpuss_init(void)
{
	return 0;
}

static inline int omap4_finish_suspend(unsigned long cpu_state)
{
	return 0;
}

static inline void omap4_cpu_resume(void)
{}

static inline u32 omap4_mpuss_read_prev_context_state(void)
{
	return 0;
}
#endif

struct omap_sdrc_params;
extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
				      struct omap_sdrc_params *sdrc_cs1);
struct omap2_hsmmc_info;
extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);

#endif /* __ASSEMBLER__ */
#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
Commit	Line	Data
4e65331c TL	1	/*
	2	* Header for code common to all OMAP2+ machines.
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms of the GNU General Public License as published by the
	6	* Free Software Foundation; either version 2 of the License, or (at your
	7	* option) any later version.
	8	*
	9	* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
	10	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	11	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	12	* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
	13	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	14	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	15	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	16	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	17	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	18	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	19	*
	20	* You should have received a copy of the GNU General Public License along
	21	* with this program; if not, write to the Free Software Foundation, Inc.,
	22	* 675 Mass Ave, Cambridge, MA 02139, USA.
	23	*/
	24
	25	#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
	26	#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
b2b9762f	27	#ifndef __ASSEMBLER__
4e65331c TL	28
4e65331c TL	29	#include <linux/delay.h>
1ee47b0a	30	#include <linux/i2c/twl.h>
4e65331c	31	#include <plat/common.h>
b2b9762f	32	#include <asm/proc-fns.h>
4e65331c	33
7d7e1eba TL	34	#define OMAP_INTC_START 0
7d7e1eba TL	35
4e65331c TL	36	#ifdef CONFIG_SOC_OMAP2420
	37	extern void omap242x_map_common_io(void);
	38	#else
	39	static inline void omap242x_map_common_io(void)
	40	{
	41	}
	42	#endif
	43
	44	#ifdef CONFIG_SOC_OMAP2430
	45	extern void omap243x_map_common_io(void);
	46	#else
	47	static inline void omap243x_map_common_io(void)
	48	{
	49	}
	50	#endif
	51
	52	#ifdef CONFIG_ARCH_OMAP3
	53	extern void omap34xx_map_common_io(void);
	54	#else
	55	static inline void omap34xx_map_common_io(void)
	56	{
	57	}
	58	#endif
	59
33959553	60	#ifdef CONFIG_SOC_TI81XX
a920360f	61	extern void omapti81xx_map_common_io(void);
4e65331c	62	#else
a920360f	63	static inline void omapti81xx_map_common_io(void)
4e65331c TL	64	{
	65	}
	66	#endif
	67
bb6abcf4	68	#ifdef CONFIG_SOC_AM33XX
1e6cb146 AM	69	extern void omapam33xx_map_common_io(void);
	70	#else
	71	static inline void omapam33xx_map_common_io(void)
	72	{
	73	}
	74	#endif
	75
4e65331c TL	76	#ifdef CONFIG_ARCH_OMAP4
	77	extern void omap44xx_map_common_io(void);
	78	#else
	79	static inline void omap44xx_map_common_io(void)
	80	{
	81	}
	82	#endif
	83
bbd707ac SG	84	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
	85	int omap2_pm_init(void);
	86	#else
	87	static inline int omap2_pm_init(void)
	88	{
	89	return 0;
	90	}
	91	#endif
	92
	93	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
	94	int omap3_pm_init(void);
	95	#else
	96	static inline int omap3_pm_init(void)
	97	{
	98	return 0;
	99	}
	100	#endif
	101
	102	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
	103	int omap4_pm_init(void);
	104	#else
	105	static inline int omap4_pm_init(void)
	106	{
	107	return 0;
	108	}
	109	#endif
	110
	111	#ifdef CONFIG_OMAP_MUX
	112	int omap_mux_late_init(void);
	113	#else
	114	static inline int omap_mux_late_init(void)
	115	{
	116	return 0;
	117	}
	118	#endif
	119
05e152c7 S	120	#ifdef CONFIG_SOC_OMAP5
	121	extern void omap5_map_common_io(void);
	122	#else
	123	static inline void omap5_map_common_io(void)
	124	{
	125	}
	126	#endif
	127
4e65331c TL	128	extern void omap2_init_common_infrastructure(void);
	129
	130	extern struct sys_timer omap2_timer;
	131	extern struct sys_timer omap3_timer;
	132	extern struct sys_timer omap3_secure_timer;
08f30989	133	extern struct sys_timer omap3_am33xx_timer;
4e65331c	134	extern struct sys_timer omap4_timer;
37b3280d	135	extern struct sys_timer omap5_timer;
4e65331c TL	136
	137	void omap2420_init_early(void);
	138	void omap2430_init_early(void);
	139	void omap3430_init_early(void);
	140	void omap35xx_init_early(void);
	141	void omap3630_init_early(void);
	142	void omap3_init_early(void); /* Do not use this one */
ce3fc89a	143	void am33xx_init_early(void);
4e65331c	144	void am35xx_init_early(void);
a920360f	145	void ti81xx_init_early(void);
08f30989	146	void am33xx_init_early(void);
4e65331c	147	void omap4430_init_early(void);
05e152c7	148	void omap5_init_early(void);
bbd707ac SG	149	void omap3_init_late(void); /* Do not use this one */
	150	void omap4430_init_late(void);
	151	void omap2420_init_late(void);
	152	void omap2430_init_late(void);
	153	void omap3430_init_late(void);
	154	void omap35xx_init_late(void);
	155	void omap3630_init_late(void);
	156	void am35xx_init_late(void);
	157	void ti81xx_init_late(void);
	158	void omap4430_init_late(void);
	159	int omap2_common_pm_late_init(void);
baa95883	160	void omap_prcm_restart(char, const char *);
4e65331c TL	161
	162	/*
	163	* IO bases for various OMAP processors
	164	* Except the tap base, rest all the io bases
	165	* listed are physical addresses.
	166	*/
	167	struct omap_globals {
	168	u32 class; /* OMAP class to detect */
	169	void __iomem tap; / Control module ID code */
	170	void __iomem sdrc; / SDRAM Controller */
	171	void __iomem sms; / SDRAM Memory Scheduler */
	172	void __iomem ctrl; / System Control Module */
	173	void __iomem ctrl_pad; / PAD Control Module */
	174	void __iomem prm; / Power and Reset Management */
	175	void __iomem cm; / Clock Management */
	176	void __iomem *cm2;
610eb8c2	177	void __iomem *prcm_mpu;
4e65331c TL	178	};
	179
	180	void omap2_set_globals_242x(void);
	181	void omap2_set_globals_243x(void);
	182	void omap2_set_globals_3xxx(void);
	183	void omap2_set_globals_443x(void);
05e152c7	184	void omap2_set_globals_5xxx(void);
a920360f	185	void omap2_set_globals_ti81xx(void);
1e6cb146	186	void omap2_set_globals_am33xx(void);
4e65331c TL	187
	188	/* These get called from omap2_set_globals_xxxx(), do not call these */
	189	void omap2_set_globals_tap(struct omap_globals *);
ecc46cfd	190	#if defined(CONFIG_SOC_HAS_OMAP2_SDRC)
4e65331c	191	void omap2_set_globals_sdrc(struct omap_globals *);
ecc46cfd VH	192	#else
	193	static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
	194	{ }
	195	#endif
4e65331c TL	196	void omap2_set_globals_control(struct omap_globals *);
	197	void omap2_set_globals_prcm(struct omap_globals *);
	198
	199	void omap242x_map_io(void);
	200	void omap243x_map_io(void);
	201	void omap3_map_io(void);
1e6cb146	202	void am33xx_map_io(void);
4e65331c	203	void omap4_map_io(void);
05e152c7	204	void omap5_map_io(void);
a920360f	205	void ti81xx_map_io(void);
2ec1fc4e	206	void omap_barriers_init(void);
4e65331c TL	207
	208	/**
	209	* omap_test_timeout - busy-loop, testing a condition
	210	* @cond: condition to test until it evaluates to true
	211	* @timeout: maximum number of microseconds in the timeout
	212	* @index: loop index (integer)
	213	*
	214	* Loop waiting for @cond to become true or until at least @timeout
	215	* microseconds have passed. To use, define some integer @index in the
	216	* calling code. After running, if @index == @timeout, then the loop has
	217	* timed out.
	218	*/
	219	#define omap_test_timeout(cond, timeout, index) \
	220	({ \
	221	for (index = 0; index < timeout; index++) { \
	222	if (cond) \
	223	break; \
	224	udelay(1); \
	225	} \
	226	})
	227
	228	extern struct device *omap2_get_mpuss_device(void);
	229	extern struct device *omap2_get_iva_device(void);
	230	extern struct device *omap2_get_l3_device(void);
	231	extern struct device *omap4_get_dsp_device(void);
	232
	233	void omap2_init_irq(void);
	234	void omap3_init_irq(void);
a920360f	235	void ti81xx_init_irq(void);
4e65331c TL	236	extern int omap_irq_pending(void);
	237	void omap_intc_save_context(void);
	238	void omap_intc_restore_context(void);
	239	void omap3_intc_suspend(void);
	240	void omap3_intc_prepare_idle(void);
	241	void omap3_intc_resume_idle(void);
f88f4dd8 SS	242	void omap2_intc_handle_irq(struct pt_regs *regs);
f88f4dd8 SS	243	void omap3_intc_handle_irq(struct pt_regs *regs);
c4082d49 S	244	void omap_intc_of_init(void);
c4082d49 S	245	void omap_gic_of_init(void);
4e65331c	246
4e65331c	247	#ifdef CONFIG_CACHE_L2X0
02afe8a7	248	extern void __iomem *omap4_get_l2cache_base(void);
4e65331c TL	249	#endif
4e65331c TL	250
52fa2120 BC	251	struct device_node;
52fa2120 BC	252	#ifdef CONFIG_OF
c4082d49	253	int __init intc_of_init(struct device_node *node,
52fa2120 BC	254	struct device_node *parent);
52fa2120 BC	255	#else
c4082d49	256	int __init intc_of_init(struct device_node *node,
52fa2120 BC	257	struct device_node *parent)
	258	{
	259	return 0;
	260	}
	261	#endif
	262
02afe8a7 SS	263	#ifdef CONFIG_SMP
	264	extern void __iomem *omap4_get_scu_base(void);
	265	#else
	266	static inline void __iomem *omap4_get_scu_base(void)
	267	{
	268	return NULL;
	269	}
4e65331c TL	270	#endif
4e65331c TL	271
4e65331c TL	272	extern void __init gic_init_irq(void);
4e65331c TL	273	extern void omap_smc1(u32 fn, u32 arg);
501f0c75	274	extern void __iomem *omap4_get_sar_ram_base(void);
b2b9762f	275	extern void omap_do_wfi(void);
4e65331c TL	276
	277	#ifdef CONFIG_SMP
	278	/* Needed for secondary core boot */
	279	extern void omap_secondary_startup(void);
	280	extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
	281	extern void omap_auxcoreboot_addr(u32 cpu_addr);
	282	extern u32 omap_read_auxcoreboot0(void);
283f708c	283	extern void omap5_secondary_startup(void);
4e65331c TL	284	#endif
4e65331c TL	285
b2b9762f SS	286	#if defined(CONFIG_SMP) && defined(CONFIG_PM)
	287	extern int omap4_mpuss_init(void);
	288	extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
	289	extern int omap4_finish_suspend(unsigned long cpu_state);
	290	extern void omap4_cpu_resume(void);
b5b4f288	291	extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
3ba2a739	292	extern u32 omap4_mpuss_read_prev_context_state(void);
b2b9762f SS	293	#else
	294	static inline int omap4_enter_lowpower(unsigned int cpu,
	295	unsigned int power_state)
	296	{
	297	cpu_do_idle();
	298	return 0;
	299	}
	300
b5b4f288 SS	301	static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
	302	{
	303	cpu_do_idle();
	304	return 0;
	305	}
	306
b2b9762f SS	307	static inline int omap4_mpuss_init(void)
	308	{
	309	return 0;
	310	}
	311
	312	static inline int omap4_finish_suspend(unsigned long cpu_state)
	313	{
	314	return 0;
	315	}
	316
	317	static inline void omap4_cpu_resume(void)
	318	{}
3ba2a739 SS	319
	320	static inline u32 omap4_mpuss_read_prev_context_state(void)
	321	{
	322	return 0;
	323	}
b2b9762f	324	#endif
258ee922 TL	325
	326	struct omap_sdrc_params;
	327	extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
	328	struct omap_sdrc_params *sdrc_cs1);
1ee47b0a B	329	struct omap2_hsmmc_info;
1ee47b0a B	330	extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
258ee922	331
b2b9762f	332	#endif /* __ASSEMBLER__ */
4e65331c	333	#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */