[deliverable/linux.git] / arch / arm / mach-omap2 / common.h

/*
 * Header for code common to all OMAP2+ machines.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 *
 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 * You should have received a copy of the  GNU General Public License along
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
#ifndef __ASSEMBLER__

#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/i2c/twl.h>

#include <asm/proc-fns.h>

#include <plat/cpu.h>
#include <plat/serial.h>
#include <plat/common.h>

#define OMAP_INTC_START		NR_IRQS

#ifdef CONFIG_SOC_OMAP2420
extern void omap242x_map_common_io(void);
#else
static inline void omap242x_map_common_io(void)
{
}
#endif

#ifdef CONFIG_SOC_OMAP2430
extern void omap243x_map_common_io(void);
#else
static inline void omap243x_map_common_io(void)
{
}
#endif

#ifdef CONFIG_ARCH_OMAP3
extern void omap34xx_map_common_io(void);
#else
static inline void omap34xx_map_common_io(void)
{
}
#endif

#ifdef CONFIG_SOC_TI81XX
extern void omapti81xx_map_common_io(void);
#else
static inline void omapti81xx_map_common_io(void)
{
}
#endif

#ifdef CONFIG_SOC_AM33XX
extern void omapam33xx_map_common_io(void);
#else
static inline void omapam33xx_map_common_io(void)
{
}
#endif

#ifdef CONFIG_ARCH_OMAP4
extern void omap44xx_map_common_io(void);
#else
static inline void omap44xx_map_common_io(void)
{
}
#endif

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
int omap2_pm_init(void);
#else
static inline int omap2_pm_init(void)
{
	return 0;
}
#endif

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
int omap3_pm_init(void);
#else
static inline int omap3_pm_init(void)
{
	return 0;
}
#endif

#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
int omap4_pm_init(void);
#else
static inline int omap4_pm_init(void)
{
	return 0;
}
#endif

#ifdef CONFIG_OMAP_MUX
int omap_mux_late_init(void);
#else
static inline int omap_mux_late_init(void)
{
	return 0;
}
#endif

#ifdef CONFIG_SOC_OMAP5
extern void omap5_map_common_io(void);
#else
static inline void omap5_map_common_io(void)
{
}
#endif

extern void omap2_init_common_infrastructure(void);

extern struct sys_timer omap2_timer;
extern struct sys_timer omap3_timer;
extern struct sys_timer omap3_secure_timer;
extern struct sys_timer omap3_am33xx_timer;
extern struct sys_timer omap4_timer;
extern struct sys_timer omap5_timer;

void omap2420_init_early(void);
void omap2430_init_early(void);
void omap3430_init_early(void);
void omap35xx_init_early(void);
void omap3630_init_early(void);
void omap3_init_early(void);	/* Do not use this one */
void am33xx_init_early(void);
void am35xx_init_early(void);
void ti81xx_init_early(void);
void am33xx_init_early(void);
void omap4430_init_early(void);
void omap5_init_early(void);
void omap3_init_late(void);	/* Do not use this one */
void omap4430_init_late(void);
void omap2420_init_late(void);
void omap2430_init_late(void);
void omap3430_init_late(void);
void omap35xx_init_late(void);
void omap3630_init_late(void);
void am35xx_init_late(void);
void ti81xx_init_late(void);
void omap4430_init_late(void);
int omap2_common_pm_late_init(void);
void omap_prcm_restart(char, const char *);

/*
 * IO bases for various OMAP processors
 * Except the tap base, rest all the io bases
 * listed are physical addresses.
 */
struct omap_globals {
	u32		class;		/* OMAP class to detect */
	void __iomem	*tap;		/* Control module ID code */
	void __iomem	*sdrc;           /* SDRAM Controller */
	void __iomem	*sms;            /* SDRAM Memory Scheduler */
	void __iomem	*ctrl;           /* System Control Module */
	void __iomem	*ctrl_pad;	/* PAD Control Module */
	void __iomem	*prm;            /* Power and Reset Management */
	void __iomem	*cm;             /* Clock Management */
	void __iomem	*cm2;
	void __iomem	*prcm_mpu;
};

void omap2_set_globals_242x(void);
void omap2_set_globals_243x(void);
void omap2_set_globals_3xxx(void);
void omap2_set_globals_443x(void);
void omap2_set_globals_5xxx(void);
void omap2_set_globals_ti81xx(void);
void omap2_set_globals_am33xx(void);

/* These get called from omap2_set_globals_xxxx(), do not call these */
void omap2_set_globals_tap(struct omap_globals *);
#if defined(CONFIG_SOC_HAS_OMAP2_SDRC)
void omap2_set_globals_sdrc(struct omap_globals *);
#else
static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
{ }
#endif
void omap2_set_globals_control(struct omap_globals *);
void omap2_set_globals_prcm(struct omap_globals *);

void omap242x_map_io(void);
void omap243x_map_io(void);
void omap3_map_io(void);
void am33xx_map_io(void);
void omap4_map_io(void);
void omap5_map_io(void);
void ti81xx_map_io(void);
void omap_barriers_init(void);

/**
 * omap_test_timeout - busy-loop, testing a condition
 * @cond: condition to test until it evaluates to true
 * @timeout: maximum number of microseconds in the timeout
 * @index: loop index (integer)
 *
 * Loop waiting for @cond to become true or until at least @timeout
 * microseconds have passed.  To use, define some integer @index in the
 * calling code.  After running, if @index == @timeout, then the loop has
 * timed out.
 */
#define omap_test_timeout(cond, timeout, index)			\
({								\
	for (index = 0; index < timeout; index++) {		\
		if (cond)					\
			break;					\
		udelay(1);					\
	}							\
})

extern struct device *omap2_get_mpuss_device(void);
extern struct device *omap2_get_iva_device(void);
extern struct device *omap2_get_l3_device(void);
extern struct device *omap4_get_dsp_device(void);

void omap2_init_irq(void);
void omap3_init_irq(void);
void ti81xx_init_irq(void);
extern int omap_irq_pending(void);
void omap_intc_save_context(void);
void omap_intc_restore_context(void);
void omap3_intc_suspend(void);
void omap3_intc_prepare_idle(void);
void omap3_intc_resume_idle(void);
void omap2_intc_handle_irq(struct pt_regs *regs);
void omap3_intc_handle_irq(struct pt_regs *regs);
void omap_intc_of_init(void);
void omap_gic_of_init(void);

#ifdef CONFIG_CACHE_L2X0
extern void __iomem *omap4_get_l2cache_base(void);
#endif

struct device_node;
#ifdef CONFIG_OF
int __init intc_of_init(struct device_node *node,
			     struct device_node *parent);
#else
int __init intc_of_init(struct device_node *node,
			     struct device_node *parent)
{
	return 0;
}
#endif

#ifdef CONFIG_SMP
extern void __iomem *omap4_get_scu_base(void);
#else
static inline void __iomem *omap4_get_scu_base(void)
{
	return NULL;
}
#endif

extern void __init gic_init_irq(void);
extern void omap_smc1(u32 fn, u32 arg);
extern void __iomem *omap4_get_sar_ram_base(void);
extern void omap_do_wfi(void);

#ifdef CONFIG_SMP
/* Needed for secondary core boot */
extern void omap_secondary_startup(void);
extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
extern void omap_auxcoreboot_addr(u32 cpu_addr);
extern u32 omap_read_auxcoreboot0(void);

extern void omap4_cpu_die(unsigned int cpu);

extern struct smp_operations omap4_smp_ops;

extern void omap5_secondary_startup(void);
#endif

#if defined(CONFIG_SMP) && defined(CONFIG_PM)
extern int omap4_mpuss_init(void);
extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
extern int omap4_finish_suspend(unsigned long cpu_state);
extern void omap4_cpu_resume(void);
extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
extern u32 omap4_mpuss_read_prev_context_state(void);
#else
static inline int omap4_enter_lowpower(unsigned int cpu,
					unsigned int power_state)
{
	cpu_do_idle();
	return 0;
}

static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
{
	cpu_do_idle();
	return 0;
}

static inline int omap4_mpuss_init(void)
{
	return 0;
}

static inline int omap4_finish_suspend(unsigned long cpu_state)
{
	return 0;
}

static inline void omap4_cpu_resume(void)
{}

static inline u32 omap4_mpuss_read_prev_context_state(void)
{
	return 0;
}
#endif

struct omap_sdrc_params;
extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
				      struct omap_sdrc_params *sdrc_cs1);
struct omap2_hsmmc_info;
extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);

#endif /* __ASSEMBLER__ */
#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
Commit	Line	Data
4e65331c TL	1	/*
	2	* Header for code common to all OMAP2+ machines.
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms of the GNU General Public License as published by the
	6	* Free Software Foundation; either version 2 of the License, or (at your
	7	* option) any later version.
	8	*
	9	* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
	10	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	11	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	12	* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
	13	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	14	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	15	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	16	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	17	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	18	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	19	*
	20	* You should have received a copy of the GNU General Public License along
	21	* with this program; if not, write to the Free Software Foundation, Inc.,
	22	* 675 Mass Ave, Cambridge, MA 02139, USA.
	23	*/
	24
	25	#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
	26	#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
b2b9762f	27	#ifndef __ASSEMBLER__
4e65331c	28
ec2c0825	29	#include <linux/irq.h>
4e65331c	30	#include <linux/delay.h>
1ee47b0a	31	#include <linux/i2c/twl.h>
dbc04161	32
b2b9762f	33	#include <asm/proc-fns.h>
4e65331c	34
dbc04161 TL	35	#include <plat/cpu.h>
	36	#include <plat/serial.h>
	37	#include <plat/common.h>
	38
ec2c0825	39	#define OMAP_INTC_START NR_IRQS
7d7e1eba	40
4e65331c TL	41	#ifdef CONFIG_SOC_OMAP2420
	42	extern void omap242x_map_common_io(void);
	43	#else
	44	static inline void omap242x_map_common_io(void)
	45	{
	46	}
	47	#endif
	48
	49	#ifdef CONFIG_SOC_OMAP2430
	50	extern void omap243x_map_common_io(void);
	51	#else
	52	static inline void omap243x_map_common_io(void)
	53	{
	54	}
	55	#endif
	56
	57	#ifdef CONFIG_ARCH_OMAP3
	58	extern void omap34xx_map_common_io(void);
	59	#else
	60	static inline void omap34xx_map_common_io(void)
	61	{
	62	}
	63	#endif
	64
33959553	65	#ifdef CONFIG_SOC_TI81XX
a920360f	66	extern void omapti81xx_map_common_io(void);
4e65331c	67	#else
a920360f	68	static inline void omapti81xx_map_common_io(void)
4e65331c TL	69	{
	70	}
	71	#endif
	72
bb6abcf4	73	#ifdef CONFIG_SOC_AM33XX
1e6cb146 AM	74	extern void omapam33xx_map_common_io(void);
	75	#else
	76	static inline void omapam33xx_map_common_io(void)
	77	{
	78	}
	79	#endif
	80
4e65331c TL	81	#ifdef CONFIG_ARCH_OMAP4
	82	extern void omap44xx_map_common_io(void);
	83	#else
	84	static inline void omap44xx_map_common_io(void)
	85	{
	86	}
	87	#endif
	88
bbd707ac SG	89	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
	90	int omap2_pm_init(void);
	91	#else
	92	static inline int omap2_pm_init(void)
	93	{
	94	return 0;
	95	}
	96	#endif
	97
	98	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
	99	int omap3_pm_init(void);
	100	#else
	101	static inline int omap3_pm_init(void)
	102	{
	103	return 0;
	104	}
	105	#endif
	106
	107	#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
	108	int omap4_pm_init(void);
	109	#else
	110	static inline int omap4_pm_init(void)
	111	{
	112	return 0;
	113	}
	114	#endif
	115
	116	#ifdef CONFIG_OMAP_MUX
	117	int omap_mux_late_init(void);
	118	#else
	119	static inline int omap_mux_late_init(void)
	120	{
	121	return 0;
	122	}
	123	#endif
	124
05e152c7 S	125	#ifdef CONFIG_SOC_OMAP5
	126	extern void omap5_map_common_io(void);
	127	#else
	128	static inline void omap5_map_common_io(void)
	129	{
	130	}
	131	#endif
	132
4e65331c TL	133	extern void omap2_init_common_infrastructure(void);
	134
	135	extern struct sys_timer omap2_timer;
	136	extern struct sys_timer omap3_timer;
	137	extern struct sys_timer omap3_secure_timer;
08f30989	138	extern struct sys_timer omap3_am33xx_timer;
4e65331c	139	extern struct sys_timer omap4_timer;
37b3280d	140	extern struct sys_timer omap5_timer;
4e65331c TL	141
	142	void omap2420_init_early(void);
	143	void omap2430_init_early(void);
	144	void omap3430_init_early(void);
	145	void omap35xx_init_early(void);
	146	void omap3630_init_early(void);
	147	void omap3_init_early(void); /* Do not use this one */
ce3fc89a	148	void am33xx_init_early(void);
4e65331c	149	void am35xx_init_early(void);
a920360f	150	void ti81xx_init_early(void);
08f30989	151	void am33xx_init_early(void);
4e65331c	152	void omap4430_init_early(void);
05e152c7	153	void omap5_init_early(void);
bbd707ac SG	154	void omap3_init_late(void); /* Do not use this one */
	155	void omap4430_init_late(void);
	156	void omap2420_init_late(void);
	157	void omap2430_init_late(void);
	158	void omap3430_init_late(void);
	159	void omap35xx_init_late(void);
	160	void omap3630_init_late(void);
	161	void am35xx_init_late(void);
	162	void ti81xx_init_late(void);
	163	void omap4430_init_late(void);
	164	int omap2_common_pm_late_init(void);
baa95883	165	void omap_prcm_restart(char, const char *);
4e65331c TL	166
	167	/*
	168	* IO bases for various OMAP processors
	169	* Except the tap base, rest all the io bases
	170	* listed are physical addresses.
	171	*/
	172	struct omap_globals {
	173	u32 class; /* OMAP class to detect */
	174	void __iomem tap; / Control module ID code */
	175	void __iomem sdrc; / SDRAM Controller */
	176	void __iomem sms; / SDRAM Memory Scheduler */
	177	void __iomem ctrl; / System Control Module */
	178	void __iomem ctrl_pad; / PAD Control Module */
	179	void __iomem prm; / Power and Reset Management */
	180	void __iomem cm; / Clock Management */
	181	void __iomem *cm2;
610eb8c2	182	void __iomem *prcm_mpu;
4e65331c TL	183	};
	184
	185	void omap2_set_globals_242x(void);
	186	void omap2_set_globals_243x(void);
	187	void omap2_set_globals_3xxx(void);
	188	void omap2_set_globals_443x(void);
05e152c7	189	void omap2_set_globals_5xxx(void);
a920360f	190	void omap2_set_globals_ti81xx(void);
1e6cb146	191	void omap2_set_globals_am33xx(void);
4e65331c TL	192
	193	/* These get called from omap2_set_globals_xxxx(), do not call these */
	194	void omap2_set_globals_tap(struct omap_globals *);
ecc46cfd	195	#if defined(CONFIG_SOC_HAS_OMAP2_SDRC)
4e65331c	196	void omap2_set_globals_sdrc(struct omap_globals *);
ecc46cfd VH	197	#else
	198	static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
	199	{ }
	200	#endif
4e65331c TL	201	void omap2_set_globals_control(struct omap_globals *);
	202	void omap2_set_globals_prcm(struct omap_globals *);
	203
	204	void omap242x_map_io(void);
	205	void omap243x_map_io(void);
	206	void omap3_map_io(void);
1e6cb146	207	void am33xx_map_io(void);
4e65331c	208	void omap4_map_io(void);
05e152c7	209	void omap5_map_io(void);
a920360f	210	void ti81xx_map_io(void);
2ec1fc4e	211	void omap_barriers_init(void);
4e65331c TL	212
	213	/**
	214	* omap_test_timeout - busy-loop, testing a condition
	215	* @cond: condition to test until it evaluates to true
	216	* @timeout: maximum number of microseconds in the timeout
	217	* @index: loop index (integer)
	218	*
	219	* Loop waiting for @cond to become true or until at least @timeout
	220	* microseconds have passed. To use, define some integer @index in the
	221	* calling code. After running, if @index == @timeout, then the loop has
	222	* timed out.
	223	*/
	224	#define omap_test_timeout(cond, timeout, index) \
	225	({ \
	226	for (index = 0; index < timeout; index++) { \
	227	if (cond) \
	228	break; \
	229	udelay(1); \
	230	} \
	231	})
	232
	233	extern struct device *omap2_get_mpuss_device(void);
	234	extern struct device *omap2_get_iva_device(void);
	235	extern struct device *omap2_get_l3_device(void);
	236	extern struct device *omap4_get_dsp_device(void);
	237
	238	void omap2_init_irq(void);
	239	void omap3_init_irq(void);
a920360f	240	void ti81xx_init_irq(void);
4e65331c TL	241	extern int omap_irq_pending(void);
	242	void omap_intc_save_context(void);
	243	void omap_intc_restore_context(void);
	244	void omap3_intc_suspend(void);
	245	void omap3_intc_prepare_idle(void);
	246	void omap3_intc_resume_idle(void);
f88f4dd8 SS	247	void omap2_intc_handle_irq(struct pt_regs *regs);
f88f4dd8 SS	248	void omap3_intc_handle_irq(struct pt_regs *regs);
c4082d49 S	249	void omap_intc_of_init(void);
c4082d49 S	250	void omap_gic_of_init(void);
4e65331c	251
4e65331c	252	#ifdef CONFIG_CACHE_L2X0
02afe8a7	253	extern void __iomem *omap4_get_l2cache_base(void);
4e65331c TL	254	#endif
4e65331c TL	255
52fa2120 BC	256	struct device_node;
52fa2120 BC	257	#ifdef CONFIG_OF
c4082d49	258	int __init intc_of_init(struct device_node *node,
52fa2120 BC	259	struct device_node *parent);
52fa2120 BC	260	#else
c4082d49	261	int __init intc_of_init(struct device_node *node,
52fa2120 BC	262	struct device_node *parent)
	263	{
	264	return 0;
	265	}
	266	#endif
	267
02afe8a7 SS	268	#ifdef CONFIG_SMP
	269	extern void __iomem *omap4_get_scu_base(void);
	270	#else
	271	static inline void __iomem *omap4_get_scu_base(void)
	272	{
	273	return NULL;
	274	}
4e65331c TL	275	#endif
4e65331c TL	276
4e65331c TL	277	extern void __init gic_init_irq(void);
4e65331c TL	278	extern void omap_smc1(u32 fn, u32 arg);
501f0c75	279	extern void __iomem *omap4_get_sar_ram_base(void);
b2b9762f	280	extern void omap_do_wfi(void);
4e65331c TL	281
	282	#ifdef CONFIG_SMP
	283	/* Needed for secondary core boot */
	284	extern void omap_secondary_startup(void);
	285	extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
	286	extern void omap_auxcoreboot_addr(u32 cpu_addr);
	287	extern u32 omap_read_auxcoreboot0(void);
06915321 MZ	288
	289	extern void omap4_cpu_die(unsigned int cpu);
	290
	291	extern struct smp_operations omap4_smp_ops;
	292
283f708c	293	extern void omap5_secondary_startup(void);
4e65331c TL	294	#endif
4e65331c TL	295
b2b9762f SS	296	#if defined(CONFIG_SMP) && defined(CONFIG_PM)
	297	extern int omap4_mpuss_init(void);
	298	extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
	299	extern int omap4_finish_suspend(unsigned long cpu_state);
	300	extern void omap4_cpu_resume(void);
b5b4f288	301	extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
3ba2a739	302	extern u32 omap4_mpuss_read_prev_context_state(void);
b2b9762f SS	303	#else
	304	static inline int omap4_enter_lowpower(unsigned int cpu,
	305	unsigned int power_state)
	306	{
	307	cpu_do_idle();
	308	return 0;
	309	}
	310
b5b4f288 SS	311	static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
	312	{
	313	cpu_do_idle();
	314	return 0;
	315	}
	316
b2b9762f SS	317	static inline int omap4_mpuss_init(void)
	318	{
	319	return 0;
	320	}
	321
	322	static inline int omap4_finish_suspend(unsigned long cpu_state)
	323	{
	324	return 0;
	325	}
	326
	327	static inline void omap4_cpu_resume(void)
	328	{}
3ba2a739 SS	329
	330	static inline u32 omap4_mpuss_read_prev_context_state(void)
	331	{
	332	return 0;
	333	}
b2b9762f	334	#endif
258ee922 TL	335
	336	struct omap_sdrc_params;
	337	extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
	338	struct omap_sdrc_params *sdrc_cs1);
1ee47b0a B	339	struct omap2_hsmmc_info;
1ee47b0a B	340	extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
258ee922	341
b2b9762f	342	#endif /* __ASSEMBLER__ */
4e65331c	343	#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */