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4e65331c TL |
1 | /* |
2 | * Header for code common to all OMAP2+ machines. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License as published by the | |
6 | * Free Software Foundation; either version 2 of the License, or (at your | |
7 | * option) any later version. | |
8 | * | |
9 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
10 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
11 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | |
12 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
13 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
14 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | |
15 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | |
16 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
17 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
18 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License along | |
21 | * with this program; if not, write to the Free Software Foundation, Inc., | |
22 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
25 | #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H | |
26 | #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H | |
b2b9762f | 27 | #ifndef __ASSEMBLER__ |
4e65331c | 28 | |
ec2c0825 | 29 | #include <linux/irq.h> |
4e65331c | 30 | #include <linux/delay.h> |
1ee47b0a | 31 | #include <linux/i2c/twl.h> |
4e65331c | 32 | #include <plat/common.h> |
b2b9762f | 33 | #include <asm/proc-fns.h> |
4e65331c | 34 | |
ec2c0825 | 35 | #define OMAP_INTC_START NR_IRQS |
7d7e1eba | 36 | |
4e65331c TL |
37 | #ifdef CONFIG_SOC_OMAP2420 |
38 | extern void omap242x_map_common_io(void); | |
39 | #else | |
40 | static inline void omap242x_map_common_io(void) | |
41 | { | |
42 | } | |
43 | #endif | |
44 | ||
45 | #ifdef CONFIG_SOC_OMAP2430 | |
46 | extern void omap243x_map_common_io(void); | |
47 | #else | |
48 | static inline void omap243x_map_common_io(void) | |
49 | { | |
50 | } | |
51 | #endif | |
52 | ||
53 | #ifdef CONFIG_ARCH_OMAP3 | |
54 | extern void omap34xx_map_common_io(void); | |
55 | #else | |
56 | static inline void omap34xx_map_common_io(void) | |
57 | { | |
58 | } | |
59 | #endif | |
60 | ||
33959553 | 61 | #ifdef CONFIG_SOC_TI81XX |
a920360f | 62 | extern void omapti81xx_map_common_io(void); |
4e65331c | 63 | #else |
a920360f | 64 | static inline void omapti81xx_map_common_io(void) |
4e65331c TL |
65 | { |
66 | } | |
67 | #endif | |
68 | ||
bb6abcf4 | 69 | #ifdef CONFIG_SOC_AM33XX |
1e6cb146 AM |
70 | extern void omapam33xx_map_common_io(void); |
71 | #else | |
72 | static inline void omapam33xx_map_common_io(void) | |
73 | { | |
74 | } | |
75 | #endif | |
76 | ||
4e65331c TL |
77 | #ifdef CONFIG_ARCH_OMAP4 |
78 | extern void omap44xx_map_common_io(void); | |
79 | #else | |
80 | static inline void omap44xx_map_common_io(void) | |
81 | { | |
82 | } | |
83 | #endif | |
84 | ||
bbd707ac SG |
85 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) |
86 | int omap2_pm_init(void); | |
87 | #else | |
88 | static inline int omap2_pm_init(void) | |
89 | { | |
90 | return 0; | |
91 | } | |
92 | #endif | |
93 | ||
94 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) | |
95 | int omap3_pm_init(void); | |
96 | #else | |
97 | static inline int omap3_pm_init(void) | |
98 | { | |
99 | return 0; | |
100 | } | |
101 | #endif | |
102 | ||
103 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4) | |
104 | int omap4_pm_init(void); | |
105 | #else | |
106 | static inline int omap4_pm_init(void) | |
107 | { | |
108 | return 0; | |
109 | } | |
110 | #endif | |
111 | ||
112 | #ifdef CONFIG_OMAP_MUX | |
113 | int omap_mux_late_init(void); | |
114 | #else | |
115 | static inline int omap_mux_late_init(void) | |
116 | { | |
117 | return 0; | |
118 | } | |
119 | #endif | |
120 | ||
05e152c7 S |
121 | #ifdef CONFIG_SOC_OMAP5 |
122 | extern void omap5_map_common_io(void); | |
123 | #else | |
124 | static inline void omap5_map_common_io(void) | |
125 | { | |
126 | } | |
127 | #endif | |
128 | ||
4e65331c TL |
129 | extern void omap2_init_common_infrastructure(void); |
130 | ||
131 | extern struct sys_timer omap2_timer; | |
132 | extern struct sys_timer omap3_timer; | |
133 | extern struct sys_timer omap3_secure_timer; | |
08f30989 | 134 | extern struct sys_timer omap3_am33xx_timer; |
4e65331c | 135 | extern struct sys_timer omap4_timer; |
37b3280d | 136 | extern struct sys_timer omap5_timer; |
4e65331c TL |
137 | |
138 | void omap2420_init_early(void); | |
139 | void omap2430_init_early(void); | |
140 | void omap3430_init_early(void); | |
141 | void omap35xx_init_early(void); | |
142 | void omap3630_init_early(void); | |
143 | void omap3_init_early(void); /* Do not use this one */ | |
ce3fc89a | 144 | void am33xx_init_early(void); |
4e65331c | 145 | void am35xx_init_early(void); |
a920360f | 146 | void ti81xx_init_early(void); |
08f30989 | 147 | void am33xx_init_early(void); |
4e65331c | 148 | void omap4430_init_early(void); |
05e152c7 | 149 | void omap5_init_early(void); |
bbd707ac SG |
150 | void omap3_init_late(void); /* Do not use this one */ |
151 | void omap4430_init_late(void); | |
152 | void omap2420_init_late(void); | |
153 | void omap2430_init_late(void); | |
154 | void omap3430_init_late(void); | |
155 | void omap35xx_init_late(void); | |
156 | void omap3630_init_late(void); | |
157 | void am35xx_init_late(void); | |
158 | void ti81xx_init_late(void); | |
159 | void omap4430_init_late(void); | |
160 | int omap2_common_pm_late_init(void); | |
baa95883 | 161 | void omap_prcm_restart(char, const char *); |
4e65331c TL |
162 | |
163 | /* | |
164 | * IO bases for various OMAP processors | |
165 | * Except the tap base, rest all the io bases | |
166 | * listed are physical addresses. | |
167 | */ | |
168 | struct omap_globals { | |
169 | u32 class; /* OMAP class to detect */ | |
170 | void __iomem *tap; /* Control module ID code */ | |
171 | void __iomem *sdrc; /* SDRAM Controller */ | |
172 | void __iomem *sms; /* SDRAM Memory Scheduler */ | |
173 | void __iomem *ctrl; /* System Control Module */ | |
174 | void __iomem *ctrl_pad; /* PAD Control Module */ | |
175 | void __iomem *prm; /* Power and Reset Management */ | |
176 | void __iomem *cm; /* Clock Management */ | |
177 | void __iomem *cm2; | |
610eb8c2 | 178 | void __iomem *prcm_mpu; |
4e65331c TL |
179 | }; |
180 | ||
181 | void omap2_set_globals_242x(void); | |
182 | void omap2_set_globals_243x(void); | |
183 | void omap2_set_globals_3xxx(void); | |
184 | void omap2_set_globals_443x(void); | |
05e152c7 | 185 | void omap2_set_globals_5xxx(void); |
a920360f | 186 | void omap2_set_globals_ti81xx(void); |
1e6cb146 | 187 | void omap2_set_globals_am33xx(void); |
4e65331c TL |
188 | |
189 | /* These get called from omap2_set_globals_xxxx(), do not call these */ | |
190 | void omap2_set_globals_tap(struct omap_globals *); | |
ecc46cfd | 191 | #if defined(CONFIG_SOC_HAS_OMAP2_SDRC) |
4e65331c | 192 | void omap2_set_globals_sdrc(struct omap_globals *); |
ecc46cfd VH |
193 | #else |
194 | static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals) | |
195 | { } | |
196 | #endif | |
4e65331c TL |
197 | void omap2_set_globals_control(struct omap_globals *); |
198 | void omap2_set_globals_prcm(struct omap_globals *); | |
199 | ||
200 | void omap242x_map_io(void); | |
201 | void omap243x_map_io(void); | |
202 | void omap3_map_io(void); | |
1e6cb146 | 203 | void am33xx_map_io(void); |
4e65331c | 204 | void omap4_map_io(void); |
05e152c7 | 205 | void omap5_map_io(void); |
a920360f | 206 | void ti81xx_map_io(void); |
2ec1fc4e | 207 | void omap_barriers_init(void); |
4e65331c TL |
208 | |
209 | /** | |
210 | * omap_test_timeout - busy-loop, testing a condition | |
211 | * @cond: condition to test until it evaluates to true | |
212 | * @timeout: maximum number of microseconds in the timeout | |
213 | * @index: loop index (integer) | |
214 | * | |
215 | * Loop waiting for @cond to become true or until at least @timeout | |
216 | * microseconds have passed. To use, define some integer @index in the | |
217 | * calling code. After running, if @index == @timeout, then the loop has | |
218 | * timed out. | |
219 | */ | |
220 | #define omap_test_timeout(cond, timeout, index) \ | |
221 | ({ \ | |
222 | for (index = 0; index < timeout; index++) { \ | |
223 | if (cond) \ | |
224 | break; \ | |
225 | udelay(1); \ | |
226 | } \ | |
227 | }) | |
228 | ||
229 | extern struct device *omap2_get_mpuss_device(void); | |
230 | extern struct device *omap2_get_iva_device(void); | |
231 | extern struct device *omap2_get_l3_device(void); | |
232 | extern struct device *omap4_get_dsp_device(void); | |
233 | ||
234 | void omap2_init_irq(void); | |
235 | void omap3_init_irq(void); | |
a920360f | 236 | void ti81xx_init_irq(void); |
4e65331c TL |
237 | extern int omap_irq_pending(void); |
238 | void omap_intc_save_context(void); | |
239 | void omap_intc_restore_context(void); | |
240 | void omap3_intc_suspend(void); | |
241 | void omap3_intc_prepare_idle(void); | |
242 | void omap3_intc_resume_idle(void); | |
f88f4dd8 SS |
243 | void omap2_intc_handle_irq(struct pt_regs *regs); |
244 | void omap3_intc_handle_irq(struct pt_regs *regs); | |
c4082d49 S |
245 | void omap_intc_of_init(void); |
246 | void omap_gic_of_init(void); | |
4e65331c | 247 | |
4e65331c | 248 | #ifdef CONFIG_CACHE_L2X0 |
02afe8a7 | 249 | extern void __iomem *omap4_get_l2cache_base(void); |
4e65331c TL |
250 | #endif |
251 | ||
52fa2120 BC |
252 | struct device_node; |
253 | #ifdef CONFIG_OF | |
c4082d49 | 254 | int __init intc_of_init(struct device_node *node, |
52fa2120 BC |
255 | struct device_node *parent); |
256 | #else | |
c4082d49 | 257 | int __init intc_of_init(struct device_node *node, |
52fa2120 BC |
258 | struct device_node *parent) |
259 | { | |
260 | return 0; | |
261 | } | |
262 | #endif | |
263 | ||
02afe8a7 SS |
264 | #ifdef CONFIG_SMP |
265 | extern void __iomem *omap4_get_scu_base(void); | |
266 | #else | |
267 | static inline void __iomem *omap4_get_scu_base(void) | |
268 | { | |
269 | return NULL; | |
270 | } | |
4e65331c TL |
271 | #endif |
272 | ||
4e65331c TL |
273 | extern void __init gic_init_irq(void); |
274 | extern void omap_smc1(u32 fn, u32 arg); | |
501f0c75 | 275 | extern void __iomem *omap4_get_sar_ram_base(void); |
b2b9762f | 276 | extern void omap_do_wfi(void); |
4e65331c TL |
277 | |
278 | #ifdef CONFIG_SMP | |
279 | /* Needed for secondary core boot */ | |
280 | extern void omap_secondary_startup(void); | |
281 | extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); | |
282 | extern void omap_auxcoreboot_addr(u32 cpu_addr); | |
283 | extern u32 omap_read_auxcoreboot0(void); | |
283f708c | 284 | extern void omap5_secondary_startup(void); |
4e65331c TL |
285 | #endif |
286 | ||
b2b9762f SS |
287 | #if defined(CONFIG_SMP) && defined(CONFIG_PM) |
288 | extern int omap4_mpuss_init(void); | |
289 | extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); | |
290 | extern int omap4_finish_suspend(unsigned long cpu_state); | |
291 | extern void omap4_cpu_resume(void); | |
b5b4f288 | 292 | extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); |
3ba2a739 | 293 | extern u32 omap4_mpuss_read_prev_context_state(void); |
b2b9762f SS |
294 | #else |
295 | static inline int omap4_enter_lowpower(unsigned int cpu, | |
296 | unsigned int power_state) | |
297 | { | |
298 | cpu_do_idle(); | |
299 | return 0; | |
300 | } | |
301 | ||
b5b4f288 SS |
302 | static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) |
303 | { | |
304 | cpu_do_idle(); | |
305 | return 0; | |
306 | } | |
307 | ||
b2b9762f SS |
308 | static inline int omap4_mpuss_init(void) |
309 | { | |
310 | return 0; | |
311 | } | |
312 | ||
313 | static inline int omap4_finish_suspend(unsigned long cpu_state) | |
314 | { | |
315 | return 0; | |
316 | } | |
317 | ||
318 | static inline void omap4_cpu_resume(void) | |
319 | {} | |
3ba2a739 SS |
320 | |
321 | static inline u32 omap4_mpuss_read_prev_context_state(void) | |
322 | { | |
323 | return 0; | |
324 | } | |
b2b9762f | 325 | #endif |
258ee922 TL |
326 | |
327 | struct omap_sdrc_params; | |
328 | extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, | |
329 | struct omap_sdrc_params *sdrc_cs1); | |
1ee47b0a B |
330 | struct omap2_hsmmc_info; |
331 | extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers); | |
258ee922 | 332 | |
b2b9762f | 333 | #endif /* __ASSEMBLER__ */ |
4e65331c | 334 | #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ |