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ARM: OMAP2+: am33xx: Add low level debugging support
[deliverable/linux.git] / arch / arm / mach-omap2 / common.h
CommitLineData
4e65331c
TL		 1/*
2 * Header for code common to all OMAP2+ machines.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
b2b9762f 27#ifndef __ASSEMBLER__
4e65331c
TL		 28
29#include <linux/delay.h>
1ee47b0a 30#include <linux/i2c/twl.h>
4e65331c 31#include <plat/common.h>
b2b9762f 32#include <asm/proc-fns.h>
4e65331c
TL		 33
34#ifdef CONFIG_SOC_OMAP2420
35extern void omap242x_map_common_io(void);
36#else
37static inline void omap242x_map_common_io(void)
38{
39}
40#endif
41
42#ifdef CONFIG_SOC_OMAP2430
43extern void omap243x_map_common_io(void);
44#else
45static inline void omap243x_map_common_io(void)
46{
47}
48#endif
49
50#ifdef CONFIG_ARCH_OMAP3
51extern void omap34xx_map_common_io(void);
52#else
53static inline void omap34xx_map_common_io(void)
54{
55}
56#endif
57
33959553 58#ifdef CONFIG_SOC_TI81XX
a920360f 59extern void omapti81xx_map_common_io(void);
4e65331c 60#else
a920360f 61static inline void omapti81xx_map_common_io(void)
4e65331c
TL		 62{
63}
64#endif
65
bb6abcf4 66#ifdef CONFIG_SOC_AM33XX
1e6cb146
AM		 67extern void omapam33xx_map_common_io(void);
68#else
69static inline void omapam33xx_map_common_io(void)
70{
71}
72#endif
73
4e65331c
TL		 74#ifdef CONFIG_ARCH_OMAP4
75extern void omap44xx_map_common_io(void);
76#else
77static inline void omap44xx_map_common_io(void)
78{
79}
80#endif
81
bbd707ac
SG		 82#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
83int omap2_pm_init(void);
84#else
85static inline int omap2_pm_init(void)
86{
87 return 0;
88}
89#endif
90
91#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
92int omap3_pm_init(void);
93#else
94static inline int omap3_pm_init(void)
95{
96 return 0;
97}
98#endif
99
100#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
101int omap4_pm_init(void);
102#else
103static inline int omap4_pm_init(void)
104{
105 return 0;
106}
107#endif
108
109#ifdef CONFIG_OMAP_MUX
110int omap_mux_late_init(void);
111#else
112static inline int omap_mux_late_init(void)
113{
114 return 0;
115}
116#endif
117
4e65331c
TL		 118extern void omap2_init_common_infrastructure(void);
119
120extern struct sys_timer omap2_timer;
121extern struct sys_timer omap3_timer;
122extern struct sys_timer omap3_secure_timer;
123extern struct sys_timer omap4_timer;
124
125void omap2420_init_early(void);
126void omap2430_init_early(void);
127void omap3430_init_early(void);
128void omap35xx_init_early(void);
129void omap3630_init_early(void);
130void omap3_init_early(void); /* Do not use this one */
131void am35xx_init_early(void);
a920360f 132void ti81xx_init_early(void);
4e65331c 133void omap4430_init_early(void);
bbd707ac
SG		 134void omap3_init_late(void); /* Do not use this one */
135void omap4430_init_late(void);
136void omap2420_init_late(void);
137void omap2430_init_late(void);
138void omap3430_init_late(void);
139void omap35xx_init_late(void);
140void omap3630_init_late(void);
141void am35xx_init_late(void);
142void ti81xx_init_late(void);
143void omap4430_init_late(void);
144int omap2_common_pm_late_init(void);
baa95883 145void omap_prcm_restart(char, const char *);
4e65331c
TL		 146
147/*
148 * IO bases for various OMAP processors
149 * Except the tap base, rest all the io bases
150 * listed are physical addresses.
151 */
152struct omap_globals {
153 u32 class; /* OMAP class to detect */
154 void __iomem *tap; /* Control module ID code */
155 void __iomem *sdrc; /* SDRAM Controller */
156 void __iomem *sms; /* SDRAM Memory Scheduler */
157 void __iomem *ctrl; /* System Control Module */
158 void __iomem *ctrl_pad; /* PAD Control Module */
159 void __iomem *prm; /* Power and Reset Management */
160 void __iomem *cm; /* Clock Management */
161 void __iomem *cm2;
610eb8c2 162 void __iomem *prcm_mpu;
4e65331c
TL		 163};
164
165void omap2_set_globals_242x(void);
166void omap2_set_globals_243x(void);
167void omap2_set_globals_3xxx(void);
168void omap2_set_globals_443x(void);
a920360f 169void omap2_set_globals_ti81xx(void);
1e6cb146 170void omap2_set_globals_am33xx(void);
4e65331c
TL		 171
172/* These get called from omap2_set_globals_xxxx(), do not call these */
173void omap2_set_globals_tap(struct omap_globals *);
174void omap2_set_globals_sdrc(struct omap_globals *);
175void omap2_set_globals_control(struct omap_globals *);
176void omap2_set_globals_prcm(struct omap_globals *);
177
178void omap242x_map_io(void);
179void omap243x_map_io(void);
180void omap3_map_io(void);
1e6cb146 181void am33xx_map_io(void);
4e65331c 182void omap4_map_io(void);
a920360f 183void ti81xx_map_io(void);
2ec1fc4e 184void omap_barriers_init(void);
4e65331c
TL		 185
186/**
187 * omap_test_timeout - busy-loop, testing a condition
188 * @cond: condition to test until it evaluates to true
189 * @timeout: maximum number of microseconds in the timeout
190 * @index: loop index (integer)
191 *
192 * Loop waiting for @cond to become true or until at least @timeout
193 * microseconds have passed. To use, define some integer @index in the
194 * calling code. After running, if @index == @timeout, then the loop has
195 * timed out.
196 */
197#define omap_test_timeout(cond, timeout, index) \
198({ \
199 for (index = 0; index < timeout; index++) { \
200 if (cond) \
201 break; \
202 udelay(1); \
203 } \
204})
205
206extern struct device *omap2_get_mpuss_device(void);
207extern struct device *omap2_get_iva_device(void);
208extern struct device *omap2_get_l3_device(void);
209extern struct device *omap4_get_dsp_device(void);
210
211void omap2_init_irq(void);
212void omap3_init_irq(void);
a920360f 213void ti81xx_init_irq(void);
4e65331c
TL		 214extern int omap_irq_pending(void);
215void omap_intc_save_context(void);
216void omap_intc_restore_context(void);
217void omap3_intc_suspend(void);
218void omap3_intc_prepare_idle(void);
219void omap3_intc_resume_idle(void);
f88f4dd8
SS		 220void omap2_intc_handle_irq(struct pt_regs *regs);
221void omap3_intc_handle_irq(struct pt_regs *regs);
4e65331c 222
4e65331c 223#ifdef CONFIG_CACHE_L2X0
02afe8a7 224extern void __iomem *omap4_get_l2cache_base(void);
4e65331c
TL		 225#endif
226
52fa2120
BC		 227struct device_node;
228#ifdef CONFIG_OF
229int __init omap_intc_of_init(struct device_node *node,
230 struct device_node *parent);
231#else
232int __init omap_intc_of_init(struct device_node *node,
233 struct device_node *parent)
234{
235 return 0;
236}
237#endif
238
02afe8a7
SS		 239#ifdef CONFIG_SMP
240extern void __iomem *omap4_get_scu_base(void);
241#else
242static inline void __iomem *omap4_get_scu_base(void)
243{
244 return NULL;
245}
4e65331c
TL		 246#endif
247
4e65331c
TL		 248extern void __init gic_init_irq(void);
249extern void omap_smc1(u32 fn, u32 arg);
501f0c75 250extern void __iomem *omap4_get_sar_ram_base(void);
b2b9762f 251extern void omap_do_wfi(void);
4e65331c
TL		 252
253#ifdef CONFIG_SMP
254/* Needed for secondary core boot */
255extern void omap_secondary_startup(void);
256extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
257extern void omap_auxcoreboot_addr(u32 cpu_addr);
258extern u32 omap_read_auxcoreboot0(void);
259#endif
260
b2b9762f
SS		 261#if defined(CONFIG_SMP) && defined(CONFIG_PM)
262extern int omap4_mpuss_init(void);
263extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
264extern int omap4_finish_suspend(unsigned long cpu_state);
265extern void omap4_cpu_resume(void);
b5b4f288 266extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
3ba2a739 267extern u32 omap4_mpuss_read_prev_context_state(void);
b2b9762f
SS		 268#else
269static inline int omap4_enter_lowpower(unsigned int cpu,
270 unsigned int power_state)
271{
272 cpu_do_idle();
273 return 0;
274}
275
b5b4f288
SS		 276static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
277{
278 cpu_do_idle();
279 return 0;
280}
281
b2b9762f
SS		 282static inline int omap4_mpuss_init(void)
283{
284 return 0;
285}
286
287static inline int omap4_finish_suspend(unsigned long cpu_state)
288{
289 return 0;
290}
291
292static inline void omap4_cpu_resume(void)
293{}
3ba2a739
SS		 294
295static inline u32 omap4_mpuss_read_prev_context_state(void)
296{
297 return 0;
298}
b2b9762f 299#endif
258ee922
TL		 300
301struct omap_sdrc_params;
302extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
303 struct omap_sdrc_params *sdrc_cs1);
1ee47b0a
B		 304struct omap2_hsmmc_info;
305extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
258ee922 306
b2b9762f 307#endif /* __ASSEMBLER__ */
4e65331c 308#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
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