Commit | Line | Data |
---|---|---|
1dbae815 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap2/devices.c | |
3 | * | |
4 | * OMAP2 platform device setup/initialization | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
2f8163ba | 11 | #include <linux/gpio.h> |
1dbae815 TL |
12 | #include <linux/kernel.h> |
13 | #include <linux/init.h> | |
14 | #include <linux/platform_device.h> | |
fced80c7 | 15 | #include <linux/io.h> |
917fa280 | 16 | #include <linux/clk.h> |
f2ce6231 | 17 | #include <linux/err.h> |
1a5d8190 | 18 | #include <linux/slab.h> |
ad8dfac6 | 19 | #include <linux/of.h> |
1dbae815 | 20 | |
a09e64fb | 21 | #include <mach/hardware.h> |
88341334 | 22 | #include <mach/irqs.h> |
1dbae815 TL |
23 | #include <asm/mach-types.h> |
24 | #include <asm/mach/map.h> | |
88341334 | 25 | #include <asm/pmu.h> |
1dbae815 | 26 | |
ce491cf8 TL |
27 | #include <plat/tc.h> |
28 | #include <plat/board.h> | |
a09f73fa | 29 | #include <plat/mcbsp.h> |
ce491cf8 | 30 | #include <plat/mmc.h> |
ee5500c4 | 31 | #include <plat/dma.h> |
f2ce6231 VC |
32 | #include <plat/omap_hwmod.h> |
33 | #include <plat/omap_device.h> | |
59556765 | 34 | #include <plat/omap4-keypad.h> |
1dbae815 | 35 | |
4896e394 | 36 | #include "mux.h" |
4814ced5 | 37 | #include "control.h" |
a11f6706 | 38 | #include "devices.h" |
4896e394 | 39 | |
0abcf618 | 40 | #define L3_MODULES_MAX_LEN 12 |
a4dc616a | 41 | #define L3_MODULES 3 |
0abcf618 | 42 | |
43 | static int __init omap3_l3_init(void) | |
44 | { | |
45 | int l; | |
46 | struct omap_hwmod *oh; | |
3528c58e | 47 | struct platform_device *pdev; |
0abcf618 | 48 | char oh_name[L3_MODULES_MAX_LEN]; |
49 | ||
50 | /* | |
51 | * To avoid code running on other OMAPs in | |
52 | * multi-omap builds | |
53 | */ | |
54 | if (!(cpu_is_omap34xx())) | |
55 | return -ENODEV; | |
56 | ||
57 | l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main"); | |
58 | ||
59 | oh = omap_hwmod_lookup(oh_name); | |
60 | ||
61 | if (!oh) | |
62 | pr_err("could not look up %s\n", oh_name); | |
63 | ||
3528c58e | 64 | pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0, |
0abcf618 | 65 | NULL, 0, 0); |
66 | ||
3528c58e | 67 | WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name); |
0abcf618 | 68 | |
3528c58e | 69 | return IS_ERR(pdev) ? PTR_ERR(pdev) : 0; |
0abcf618 | 70 | } |
71 | postcore_initcall(omap3_l3_init); | |
72 | ||
a4dc616a | 73 | static int __init omap4_l3_init(void) |
74 | { | |
75 | int l, i; | |
76 | struct omap_hwmod *oh[3]; | |
3528c58e | 77 | struct platform_device *pdev; |
a4dc616a | 78 | char oh_name[L3_MODULES_MAX_LEN]; |
79 | ||
ad8dfac6 BC |
80 | /* If dtb is there, the devices will be created dynamically */ |
81 | if (of_have_populated_dt()) | |
82 | return -ENODEV; | |
83 | ||
a4dc616a | 84 | /* |
85 | * To avoid code running on other OMAPs in | |
86 | * multi-omap builds | |
87 | */ | |
88 | if (!(cpu_is_omap44xx())) | |
89 | return -ENODEV; | |
90 | ||
91 | for (i = 0; i < L3_MODULES; i++) { | |
92 | l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1); | |
93 | ||
94 | oh[i] = omap_hwmod_lookup(oh_name); | |
95 | if (!(oh[i])) | |
96 | pr_err("could not look up %s\n", oh_name); | |
97 | } | |
98 | ||
3528c58e | 99 | pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL, |
a4dc616a | 100 | 0, NULL, 0, 0); |
101 | ||
3528c58e | 102 | WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name); |
a4dc616a | 103 | |
3528c58e | 104 | return IS_ERR(pdev) ? PTR_ERR(pdev) : 0; |
a4dc616a | 105 | } |
106 | postcore_initcall(omap4_l3_init); | |
107 | ||
828c707e | 108 | #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) |
c40fae95 | 109 | |
cfe2cde6 | 110 | static struct resource omap2cam_resources[] = { |
c40fae95 | 111 | { |
828c707e TL |
112 | .start = OMAP24XX_CAMERA_BASE, |
113 | .end = OMAP24XX_CAMERA_BASE + 0xfff, | |
114 | .flags = IORESOURCE_MEM, | |
115 | }, | |
116 | { | |
117 | .start = INT_24XX_CAM_IRQ, | |
118 | .flags = IORESOURCE_IRQ, | |
119 | } | |
120 | }; | |
121 | ||
cfe2cde6 | 122 | static struct platform_device omap2cam_device = { |
828c707e TL |
123 | .name = "omap24xxcam", |
124 | .id = -1, | |
cfe2cde6 SA |
125 | .num_resources = ARRAY_SIZE(omap2cam_resources), |
126 | .resource = omap2cam_resources, | |
828c707e | 127 | }; |
a11f6706 | 128 | #endif |
828c707e TL |
129 | |
130 | static struct resource omap3isp_resources[] = { | |
131 | { | |
132 | .start = OMAP3430_ISP_BASE, | |
133 | .end = OMAP3430_ISP_END, | |
134 | .flags = IORESOURCE_MEM, | |
135 | }, | |
828c707e TL |
136 | { |
137 | .start = OMAP3430_ISP_CCP2_BASE, | |
138 | .end = OMAP3430_ISP_CCP2_END, | |
139 | .flags = IORESOURCE_MEM, | |
140 | }, | |
141 | { | |
142 | .start = OMAP3430_ISP_CCDC_BASE, | |
143 | .end = OMAP3430_ISP_CCDC_END, | |
144 | .flags = IORESOURCE_MEM, | |
145 | }, | |
146 | { | |
147 | .start = OMAP3430_ISP_HIST_BASE, | |
148 | .end = OMAP3430_ISP_HIST_END, | |
149 | .flags = IORESOURCE_MEM, | |
150 | }, | |
151 | { | |
152 | .start = OMAP3430_ISP_H3A_BASE, | |
153 | .end = OMAP3430_ISP_H3A_END, | |
154 | .flags = IORESOURCE_MEM, | |
155 | }, | |
156 | { | |
157 | .start = OMAP3430_ISP_PREV_BASE, | |
158 | .end = OMAP3430_ISP_PREV_END, | |
159 | .flags = IORESOURCE_MEM, | |
160 | }, | |
161 | { | |
162 | .start = OMAP3430_ISP_RESZ_BASE, | |
163 | .end = OMAP3430_ISP_RESZ_END, | |
164 | .flags = IORESOURCE_MEM, | |
165 | }, | |
166 | { | |
167 | .start = OMAP3430_ISP_SBL_BASE, | |
168 | .end = OMAP3430_ISP_SBL_END, | |
169 | .flags = IORESOURCE_MEM, | |
170 | }, | |
171 | { | |
6817a69a TT |
172 | .start = OMAP3430_ISP_CSI2A_REGS1_BASE, |
173 | .end = OMAP3430_ISP_CSI2A_REGS1_END, | |
828c707e TL |
174 | .flags = IORESOURCE_MEM, |
175 | }, | |
176 | { | |
6817a69a TT |
177 | .start = OMAP3430_ISP_CSIPHY2_BASE, |
178 | .end = OMAP3430_ISP_CSIPHY2_END, | |
179 | .flags = IORESOURCE_MEM, | |
180 | }, | |
181 | { | |
182 | .start = OMAP3630_ISP_CSI2A_REGS2_BASE, | |
183 | .end = OMAP3630_ISP_CSI2A_REGS2_END, | |
828c707e TL |
184 | .flags = IORESOURCE_MEM, |
185 | }, | |
186 | { | |
6817a69a TT |
187 | .start = OMAP3630_ISP_CSI2C_REGS1_BASE, |
188 | .end = OMAP3630_ISP_CSI2C_REGS1_END, | |
189 | .flags = IORESOURCE_MEM, | |
190 | }, | |
191 | { | |
192 | .start = OMAP3630_ISP_CSIPHY1_BASE, | |
193 | .end = OMAP3630_ISP_CSIPHY1_END, | |
194 | .flags = IORESOURCE_MEM, | |
195 | }, | |
196 | { | |
197 | .start = OMAP3630_ISP_CSI2C_REGS2_BASE, | |
198 | .end = OMAP3630_ISP_CSI2C_REGS2_END, | |
828c707e TL |
199 | .flags = IORESOURCE_MEM, |
200 | }, | |
201 | { | |
202 | .start = INT_34XX_CAM_IRQ, | |
203 | .flags = IORESOURCE_IRQ, | |
204 | } | |
205 | }; | |
206 | ||
207 | static struct platform_device omap3isp_device = { | |
208 | .name = "omap3isp", | |
209 | .id = -1, | |
210 | .num_resources = ARRAY_SIZE(omap3isp_resources), | |
211 | .resource = omap3isp_resources, | |
212 | }; | |
213 | ||
a11f6706 | 214 | int omap3_init_camera(struct isp_platform_data *pdata) |
828c707e | 215 | { |
a11f6706 LP |
216 | omap3isp_device.dev.platform_data = pdata; |
217 | return platform_device_register(&omap3isp_device); | |
828c707e | 218 | } |
828c707e | 219 | |
828c707e TL |
220 | static inline void omap_init_camera(void) |
221 | { | |
cfe2cde6 SA |
222 | #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) |
223 | if (cpu_is_omap24xx()) | |
224 | platform_device_register(&omap2cam_device); | |
828c707e | 225 | #endif |
cfe2cde6 | 226 | } |
828c707e | 227 | |
59556765 | 228 | int __init omap4_keyboard_init(struct omap4_keypad_platform_data |
f67df6c6 | 229 | *sdp4430_keypad_data, struct omap_board_data *bdata) |
59556765 | 230 | { |
3528c58e | 231 | struct platform_device *pdev; |
59556765 SR |
232 | struct omap_hwmod *oh; |
233 | struct omap4_keypad_platform_data *keypad_data; | |
234 | unsigned int id = -1; | |
235 | char *oh_name = "kbd"; | |
236 | char *name = "omap4-keypad"; | |
237 | ||
238 | oh = omap_hwmod_lookup(oh_name); | |
239 | if (!oh) { | |
240 | pr_err("Could not look up %s\n", oh_name); | |
241 | return -ENODEV; | |
242 | } | |
243 | ||
244 | keypad_data = sdp4430_keypad_data; | |
245 | ||
3528c58e | 246 | pdev = omap_device_build(name, id, oh, keypad_data, |
f718e2c0 | 247 | sizeof(struct omap4_keypad_platform_data), NULL, 0, 0); |
59556765 | 248 | |
3528c58e | 249 | if (IS_ERR(pdev)) { |
25985edc | 250 | WARN(1, "Can't build omap_device for %s:%s.\n", |
59556765 | 251 | name, oh->name); |
3528c58e | 252 | return PTR_ERR(pdev); |
59556765 | 253 | } |
f67df6c6 | 254 | oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); |
59556765 SR |
255 | |
256 | return 0; | |
257 | } | |
258 | ||
6c20a683 | 259 | #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) |
c40fae95 TL |
260 | static inline void omap_init_mbox(void) |
261 | { | |
69dbf857 | 262 | struct omap_hwmod *oh; |
3528c58e | 263 | struct platform_device *pdev; |
69dbf857 FC |
264 | |
265 | oh = omap_hwmod_lookup("mailbox"); | |
266 | if (!oh) { | |
267 | pr_err("%s: unable to find hwmod\n", __func__); | |
6c20a683 HD |
268 | return; |
269 | } | |
69dbf857 | 270 | |
f718e2c0 | 271 | pdev = omap_device_build("omap-mailbox", -1, oh, NULL, 0, NULL, 0, 0); |
3528c58e KH |
272 | WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n", |
273 | __func__, PTR_ERR(pdev)); | |
c40fae95 TL |
274 | } |
275 | #else | |
276 | static inline void omap_init_mbox(void) { } | |
6c20a683 | 277 | #endif /* CONFIG_OMAP_MBOX_FWK */ |
c40fae95 | 278 | |
9b6553cd | 279 | static inline void omap_init_sti(void) {} |
9b6553cd | 280 | |
f0fba2ad LG |
281 | #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) |
282 | ||
283 | static struct platform_device omap_pcm = { | |
284 | .name = "omap-pcm-audio", | |
285 | .id = -1, | |
286 | }; | |
287 | ||
288 | /* | |
289 | * OMAP2420 has 2 McBSP ports | |
290 | * OMAP2430 has 5 McBSP ports | |
291 | * OMAP3 has 5 McBSP ports | |
292 | * OMAP4 has 4 McBSP ports | |
293 | */ | |
294 | OMAP_MCBSP_PLATFORM_DEVICE(1); | |
295 | OMAP_MCBSP_PLATFORM_DEVICE(2); | |
296 | OMAP_MCBSP_PLATFORM_DEVICE(3); | |
297 | OMAP_MCBSP_PLATFORM_DEVICE(4); | |
298 | OMAP_MCBSP_PLATFORM_DEVICE(5); | |
299 | ||
300 | static void omap_init_audio(void) | |
301 | { | |
302 | platform_device_register(&omap_mcbsp1); | |
303 | platform_device_register(&omap_mcbsp2); | |
304 | if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) { | |
305 | platform_device_register(&omap_mcbsp3); | |
306 | platform_device_register(&omap_mcbsp4); | |
307 | } | |
308 | if (cpu_is_omap243x() || cpu_is_omap34xx()) | |
309 | platform_device_register(&omap_mcbsp5); | |
310 | ||
311 | platform_device_register(&omap_pcm); | |
312 | } | |
313 | ||
314 | #else | |
315 | static inline void omap_init_audio(void) {} | |
316 | #endif | |
317 | ||
d231f5cb PU |
318 | #if defined(CONFIG_SND_OMAP_SOC_MCPDM) || \ |
319 | defined(CONFIG_SND_OMAP_SOC_MCPDM_MODULE) | |
320 | ||
d231f5cb PU |
321 | static void omap_init_mcpdm(void) |
322 | { | |
323 | struct omap_hwmod *oh; | |
927dbbb2 | 324 | struct platform_device *pdev; |
d231f5cb PU |
325 | |
326 | oh = omap_hwmod_lookup("mcpdm"); | |
327 | if (!oh) { | |
328 | printk(KERN_ERR "Could not look up mcpdm hw_mod\n"); | |
329 | return; | |
330 | } | |
331 | ||
927dbbb2 PU |
332 | pdev = omap_device_build("omap-mcpdm", -1, oh, NULL, 0, NULL, 0, 0); |
333 | WARN(IS_ERR(pdev), "Can't build omap_device for omap-mcpdm.\n"); | |
d231f5cb PU |
334 | } |
335 | #else | |
336 | static inline void omap_init_mcpdm(void) {} | |
337 | #endif | |
338 | ||
646e3ed1 | 339 | #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) |
ed7eb9d9 | 340 | |
ce491cf8 | 341 | #include <plat/mcspi.h> |
ed7eb9d9 | 342 | |
1a5d8190 | 343 | static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) |
af41a12f | 344 | { |
3528c58e | 345 | struct platform_device *pdev; |
1a5d8190 C |
346 | char *name = "omap2_mcspi"; |
347 | struct omap2_mcspi_platform_config *pdata; | |
348 | static int spi_num; | |
349 | struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr; | |
350 | ||
351 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); | |
352 | if (!pdata) { | |
353 | pr_err("Memory allocation for McSPI device failed\n"); | |
354 | return -ENOMEM; | |
355 | } | |
af41a12f | 356 | |
1a5d8190 C |
357 | pdata->num_cs = mcspi_attrib->num_chipselect; |
358 | switch (oh->class->rev) { | |
359 | case OMAP2_MCSPI_REV: | |
360 | case OMAP3_MCSPI_REV: | |
361 | pdata->regs_offset = 0; | |
362 | break; | |
363 | case OMAP4_MCSPI_REV: | |
364 | pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET; | |
365 | break; | |
366 | default: | |
367 | pr_err("Invalid McSPI Revision value\n"); | |
368 | return -EINVAL; | |
369 | } | |
af41a12f | 370 | |
1a5d8190 | 371 | spi_num++; |
3528c58e | 372 | pdev = omap_device_build(name, spi_num, oh, pdata, |
f718e2c0 | 373 | sizeof(*pdata), NULL, 0, 0); |
3528c58e | 374 | WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n", |
1a5d8190 C |
375 | name, oh->name); |
376 | kfree(pdata); | |
377 | return 0; | |
af41a12f | 378 | } |
af41a12f TL |
379 | |
380 | static void omap_init_mcspi(void) | |
381 | { | |
1a5d8190 | 382 | omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL); |
ed7eb9d9 JY |
383 | } |
384 | ||
385 | #else | |
386 | static inline void omap_init_mcspi(void) {} | |
387 | #endif | |
388 | ||
88341334 WD |
389 | static struct resource omap2_pmu_resource = { |
390 | .start = 3, | |
391 | .end = 3, | |
392 | .flags = IORESOURCE_IRQ, | |
393 | }; | |
394 | ||
395 | static struct resource omap3_pmu_resource = { | |
396 | .start = INT_34XX_BENCH_MPU_EMUL, | |
397 | .end = INT_34XX_BENCH_MPU_EMUL, | |
398 | .flags = IORESOURCE_IRQ, | |
399 | }; | |
400 | ||
401 | static struct platform_device omap_pmu_device = { | |
402 | .name = "arm-pmu", | |
403 | .id = ARM_PMU_DEVICE_CPU, | |
404 | .num_resources = 1, | |
405 | }; | |
406 | ||
407 | static void omap_init_pmu(void) | |
408 | { | |
409 | if (cpu_is_omap24xx()) | |
410 | omap_pmu_device.resource = &omap2_pmu_resource; | |
411 | else if (cpu_is_omap34xx()) | |
412 | omap_pmu_device.resource = &omap3_pmu_resource; | |
413 | else | |
414 | return; | |
415 | ||
416 | platform_device_register(&omap_pmu_device); | |
417 | } | |
418 | ||
419 | ||
ee5500c4 DK |
420 | #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE) |
421 | ||
edc774ed | 422 | #ifdef CONFIG_ARCH_OMAP2 |
ee5500c4 | 423 | static struct resource omap2_sham_resources[] = { |
646e3ed1 TL |
424 | { |
425 | .start = OMAP24XX_SEC_SHA1MD5_BASE, | |
426 | .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64, | |
427 | .flags = IORESOURCE_MEM, | |
428 | }, | |
429 | { | |
430 | .start = INT_24XX_SHA1MD5, | |
431 | .flags = IORESOURCE_IRQ, | |
432 | } | |
433 | }; | |
ee5500c4 DK |
434 | static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources); |
435 | #else | |
436 | #define omap2_sham_resources NULL | |
437 | #define omap2_sham_resources_sz 0 | |
438 | #endif | |
646e3ed1 | 439 | |
edc774ed | 440 | #ifdef CONFIG_ARCH_OMAP3 |
ee5500c4 DK |
441 | static struct resource omap3_sham_resources[] = { |
442 | { | |
443 | .start = OMAP34XX_SEC_SHA1MD5_BASE, | |
444 | .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64, | |
445 | .flags = IORESOURCE_MEM, | |
446 | }, | |
447 | { | |
448 | .start = INT_34XX_SHA1MD52_IRQ, | |
449 | .flags = IORESOURCE_IRQ, | |
450 | }, | |
451 | { | |
452 | .start = OMAP34XX_DMA_SHA1MD5_RX, | |
453 | .flags = IORESOURCE_DMA, | |
454 | } | |
455 | }; | |
456 | static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources); | |
457 | #else | |
458 | #define omap3_sham_resources NULL | |
459 | #define omap3_sham_resources_sz 0 | |
460 | #endif | |
461 | ||
462 | static struct platform_device sham_device = { | |
463 | .name = "omap-sham", | |
646e3ed1 | 464 | .id = -1, |
646e3ed1 TL |
465 | }; |
466 | ||
ee5500c4 | 467 | static void omap_init_sham(void) |
646e3ed1 | 468 | { |
ee5500c4 DK |
469 | if (cpu_is_omap24xx()) { |
470 | sham_device.resource = omap2_sham_resources; | |
471 | sham_device.num_resources = omap2_sham_resources_sz; | |
472 | } else if (cpu_is_omap34xx()) { | |
473 | sham_device.resource = omap3_sham_resources; | |
474 | sham_device.num_resources = omap3_sham_resources_sz; | |
475 | } else { | |
476 | pr_err("%s: platform not supported\n", __func__); | |
477 | return; | |
478 | } | |
479 | platform_device_register(&sham_device); | |
646e3ed1 TL |
480 | } |
481 | #else | |
ee5500c4 | 482 | static inline void omap_init_sham(void) { } |
646e3ed1 TL |
483 | #endif |
484 | ||
b744c679 DK |
485 | #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE) |
486 | ||
82a0c149 | 487 | #ifdef CONFIG_ARCH_OMAP2 |
b744c679 DK |
488 | static struct resource omap2_aes_resources[] = { |
489 | { | |
490 | .start = OMAP24XX_SEC_AES_BASE, | |
491 | .end = OMAP24XX_SEC_AES_BASE + 0x4C, | |
492 | .flags = IORESOURCE_MEM, | |
493 | }, | |
494 | { | |
495 | .start = OMAP24XX_DMA_AES_TX, | |
496 | .flags = IORESOURCE_DMA, | |
497 | }, | |
498 | { | |
499 | .start = OMAP24XX_DMA_AES_RX, | |
500 | .flags = IORESOURCE_DMA, | |
501 | } | |
502 | }; | |
503 | static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources); | |
504 | #else | |
505 | #define omap2_aes_resources NULL | |
506 | #define omap2_aes_resources_sz 0 | |
507 | #endif | |
508 | ||
82a0c149 | 509 | #ifdef CONFIG_ARCH_OMAP3 |
b744c679 DK |
510 | static struct resource omap3_aes_resources[] = { |
511 | { | |
512 | .start = OMAP34XX_SEC_AES_BASE, | |
513 | .end = OMAP34XX_SEC_AES_BASE + 0x4C, | |
514 | .flags = IORESOURCE_MEM, | |
515 | }, | |
516 | { | |
517 | .start = OMAP34XX_DMA_AES2_TX, | |
518 | .flags = IORESOURCE_DMA, | |
519 | }, | |
520 | { | |
521 | .start = OMAP34XX_DMA_AES2_RX, | |
522 | .flags = IORESOURCE_DMA, | |
523 | } | |
524 | }; | |
525 | static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources); | |
526 | #else | |
527 | #define omap3_aes_resources NULL | |
528 | #define omap3_aes_resources_sz 0 | |
529 | #endif | |
530 | ||
531 | static struct platform_device aes_device = { | |
532 | .name = "omap-aes", | |
533 | .id = -1, | |
534 | }; | |
535 | ||
536 | static void omap_init_aes(void) | |
537 | { | |
538 | if (cpu_is_omap24xx()) { | |
539 | aes_device.resource = omap2_aes_resources; | |
540 | aes_device.num_resources = omap2_aes_resources_sz; | |
541 | } else if (cpu_is_omap34xx()) { | |
542 | aes_device.resource = omap3_aes_resources; | |
543 | aes_device.num_resources = omap3_aes_resources_sz; | |
544 | } else { | |
545 | pr_err("%s: platform not supported\n", __func__); | |
546 | return; | |
547 | } | |
548 | platform_device_register(&aes_device); | |
549 | } | |
550 | ||
551 | #else | |
552 | static inline void omap_init_aes(void) { } | |
553 | #endif | |
554 | ||
d8874665 TL |
555 | /*-------------------------------------------------------------------------*/ |
556 | ||
e08016d0 | 557 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) |
917fa280 | 558 | |
e08016d0 AG |
559 | static inline void omap242x_mmc_mux(struct omap_mmc_platform_data |
560 | *mmc_controller) | |
d8874665 | 561 | { |
ed8303fc | 562 | if ((mmc_controller->slots[0].switch_pin > 0) && \ |
563 | (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES)) | |
564 | omap_mux_init_gpio(mmc_controller->slots[0].switch_pin, | |
565 | OMAP_PIN_INPUT_PULLUP); | |
566 | if ((mmc_controller->slots[0].gpio_wp > 0) && \ | |
567 | (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES)) | |
568 | omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp, | |
569 | OMAP_PIN_INPUT_PULLUP); | |
570 | ||
e08016d0 AG |
571 | omap_mux_init_signal("sdmmc_cmd", 0); |
572 | omap_mux_init_signal("sdmmc_clki", 0); | |
573 | omap_mux_init_signal("sdmmc_clko", 0); | |
574 | omap_mux_init_signal("sdmmc_dat0", 0); | |
575 | omap_mux_init_signal("sdmmc_dat_dir0", 0); | |
576 | omap_mux_init_signal("sdmmc_cmd_dir", 0); | |
577 | if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) { | |
578 | omap_mux_init_signal("sdmmc_dat1", 0); | |
579 | omap_mux_init_signal("sdmmc_dat2", 0); | |
580 | omap_mux_init_signal("sdmmc_dat3", 0); | |
581 | omap_mux_init_signal("sdmmc_dat_dir1", 0); | |
582 | omap_mux_init_signal("sdmmc_dat_dir2", 0); | |
583 | omap_mux_init_signal("sdmmc_dat_dir3", 0); | |
d8874665 | 584 | } |
57b9daa0 | 585 | |
e08016d0 AG |
586 | /* |
587 | * Use internal loop-back in MMC/SDIO Module Input Clock | |
588 | * selection | |
589 | */ | |
590 | if (mmc_controller->slots[0].internal_clock) { | |
591 | u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | |
592 | v |= (1 << 24); | |
593 | omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); | |
57b9daa0 | 594 | } |
d8874665 TL |
595 | } |
596 | ||
e08016d0 | 597 | void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data) |
d8874665 | 598 | { |
e08016d0 | 599 | char *name = "mmci-omap"; |
d8874665 | 600 | |
e08016d0 AG |
601 | if (!mmc_data[0]) { |
602 | pr_err("%s fails: Incomplete platform data\n", __func__); | |
603 | return; | |
604 | } | |
d8874665 | 605 | |
e08016d0 AG |
606 | omap242x_mmc_mux(mmc_data[0]); |
607 | omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE, | |
608 | INT_24XX_MMC_IRQ, mmc_data[0]); | |
d8874665 TL |
609 | } |
610 | ||
611 | #endif | |
612 | ||
613 | /*-------------------------------------------------------------------------*/ | |
614 | ||
646e3ed1 | 615 | #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE) |
59b479e0 | 616 | #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430) |
646e3ed1 TL |
617 | #define OMAP_HDQ_BASE 0x480B2000 |
618 | #endif | |
619 | static struct resource omap_hdq_resources[] = { | |
620 | { | |
621 | .start = OMAP_HDQ_BASE, | |
622 | .end = OMAP_HDQ_BASE + 0x1C, | |
623 | .flags = IORESOURCE_MEM, | |
624 | }, | |
625 | { | |
626 | .start = INT_24XX_HDQ_IRQ, | |
627 | .flags = IORESOURCE_IRQ, | |
628 | }, | |
629 | }; | |
630 | static struct platform_device omap_hdq_dev = { | |
631 | .name = "omap_hdq", | |
632 | .id = 0, | |
633 | .dev = { | |
634 | .platform_data = NULL, | |
635 | }, | |
636 | .num_resources = ARRAY_SIZE(omap_hdq_resources), | |
637 | .resource = omap_hdq_resources, | |
638 | }; | |
639 | static inline void omap_hdq_init(void) | |
640 | { | |
641 | (void) platform_device_register(&omap_hdq_dev); | |
642 | } | |
643 | #else | |
644 | static inline void omap_hdq_init(void) {} | |
645 | #endif | |
646 | ||
b227358d VH |
647 | /*---------------------------------------------------------------------------*/ |
648 | ||
649 | #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \ | |
650 | defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE) | |
651 | #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) | |
652 | static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = { | |
653 | }; | |
654 | #else | |
655 | static struct resource omap_vout_resource[2] = { | |
656 | }; | |
657 | #endif | |
658 | ||
659 | static struct platform_device omap_vout_device = { | |
660 | .name = "omap_vout", | |
661 | .num_resources = ARRAY_SIZE(omap_vout_resource), | |
662 | .resource = &omap_vout_resource[0], | |
663 | .id = -1, | |
664 | }; | |
665 | static void omap_init_vout(void) | |
666 | { | |
667 | if (platform_device_register(&omap_vout_device) < 0) | |
668 | printk(KERN_ERR "Unable to register OMAP-VOUT device\n"); | |
669 | } | |
670 | #else | |
671 | static inline void omap_init_vout(void) {} | |
672 | #endif | |
673 | ||
1dbae815 TL |
674 | /*-------------------------------------------------------------------------*/ |
675 | ||
676 | static int __init omap2_init_devices(void) | |
677 | { | |
81fbc5ef PW |
678 | /* |
679 | * please keep these calls, and their implementations above, | |
1dbae815 TL |
680 | * in alphabetical order so they're easier to sort through. |
681 | */ | |
f0fba2ad | 682 | omap_init_audio(); |
d231f5cb | 683 | omap_init_mcpdm(); |
828c707e | 684 | omap_init_camera(); |
c40fae95 | 685 | omap_init_mbox(); |
ed7eb9d9 | 686 | omap_init_mcspi(); |
88341334 | 687 | omap_init_pmu(); |
646e3ed1 | 688 | omap_hdq_init(); |
9b6553cd | 689 | omap_init_sti(); |
ee5500c4 | 690 | omap_init_sham(); |
b744c679 | 691 | omap_init_aes(); |
b227358d | 692 | omap_init_vout(); |
1dbae815 TL |
693 | |
694 | return 0; | |
695 | } | |
696 | arch_initcall(omap2_init_devices); | |
f2ce6231 VC |
697 | |
698 | #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) | |
f2ce6231 VC |
699 | static int __init omap_init_wdt(void) |
700 | { | |
701 | int id = -1; | |
3528c58e | 702 | struct platform_device *pdev; |
f2ce6231 VC |
703 | struct omap_hwmod *oh; |
704 | char *oh_name = "wd_timer2"; | |
705 | char *dev_name = "omap_wdt"; | |
706 | ||
707 | if (!cpu_class_is_omap2()) | |
708 | return 0; | |
709 | ||
710 | oh = omap_hwmod_lookup(oh_name); | |
711 | if (!oh) { | |
712 | pr_err("Could not look up wd_timer%d hwmod\n", id); | |
713 | return -EINVAL; | |
714 | } | |
715 | ||
f718e2c0 | 716 | pdev = omap_device_build(dev_name, id, oh, NULL, 0, NULL, 0, 0); |
3528c58e | 717 | WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n", |
f2ce6231 VC |
718 | dev_name, oh->name); |
719 | return 0; | |
720 | } | |
721 | subsys_initcall(omap_init_wdt); | |
722 | #endif |