Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
[deliverable/linux.git] / arch / arm / mach-omap2 / devices.c
CommitLineData
1dbae815
TL
1/*
2 * linux/arch/arm/mach-omap2/devices.c
3 *
4 * OMAP2 platform device setup/initialization
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
2f8163ba 11#include <linux/gpio.h>
1dbae815
TL
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/platform_device.h>
fced80c7 15#include <linux/io.h>
917fa280 16#include <linux/clk.h>
f2ce6231 17#include <linux/err.h>
1a5d8190 18#include <linux/slab.h>
ad8dfac6 19#include <linux/of.h>
484202f4 20#include <linux/pinctrl/machine.h>
b8a7cf8e 21#include <linux/platform_data/mailbox-omap.h>
1dbae815 22
1dbae815
TL
23#include <asm/mach-types.h>
24#include <asm/mach/map.h>
25
45c3eb7d 26#include <linux/omap-dma.h>
2a296c8f 27
ee0839c2 28#include "iomap.h"
2a296c8f 29#include "omap_hwmod.h"
25c7d49e 30#include "omap_device.h"
1dbae815 31
7d7e1eba
TL
32#include "soc.h"
33#include "common.h"
4896e394 34#include "mux.h"
4814ced5 35#include "control.h"
a11f6706 36#include "devices.h"
576e5bda 37#include "display.h"
4896e394 38
0abcf618 39#define L3_MODULES_MAX_LEN 12
a4dc616a 40#define L3_MODULES 3
0abcf618 41
42static int __init omap3_l3_init(void)
43{
0abcf618 44 struct omap_hwmod *oh;
3528c58e 45 struct platform_device *pdev;
0abcf618 46 char oh_name[L3_MODULES_MAX_LEN];
47
48 /*
49 * To avoid code running on other OMAPs in
50 * multi-omap builds
51 */
52 if (!(cpu_is_omap34xx()))
53 return -ENODEV;
54
eeb3711b 55 snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
0abcf618 56
57 oh = omap_hwmod_lookup(oh_name);
58
59 if (!oh)
60 pr_err("could not look up %s\n", oh_name);
61
c1d1cd59 62 pdev = omap_device_build("omap_l3_smx", 0, oh, NULL, 0);
0abcf618 63
3528c58e 64 WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
0abcf618 65
1261674a 66 return PTR_RET(pdev);
0abcf618 67}
b76c8b19 68omap_postcore_initcall(omap3_l3_init);
0abcf618 69
a4dc616a 70static int __init omap4_l3_init(void)
71{
eeb3711b 72 int i;
a4dc616a 73 struct omap_hwmod *oh[3];
3528c58e 74 struct platform_device *pdev;
a4dc616a 75 char oh_name[L3_MODULES_MAX_LEN];
76
ad8dfac6
BC
77 /* If dtb is there, the devices will be created dynamically */
78 if (of_have_populated_dt())
79 return -ENODEV;
80
a4dc616a 81 /*
82 * To avoid code running on other OMAPs in
83 * multi-omap builds
84 */
e17933c2 85 if (!cpu_is_omap44xx() && !soc_is_omap54xx())
a4dc616a 86 return -ENODEV;
87
88 for (i = 0; i < L3_MODULES; i++) {
eeb3711b 89 snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
a4dc616a 90
91 oh[i] = omap_hwmod_lookup(oh_name);
92 if (!(oh[i]))
93 pr_err("could not look up %s\n", oh_name);
94 }
95
c1d1cd59 96 pdev = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL, 0);
a4dc616a 97
3528c58e 98 WARN(IS_ERR(pdev), "could not build omap_device for %s\n", oh_name);
a4dc616a 99
1261674a 100 return PTR_RET(pdev);
a4dc616a 101}
b76c8b19 102omap_postcore_initcall(omap4_l3_init);
a4dc616a 103
828c707e 104#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
c40fae95 105
cfe2cde6 106static struct resource omap2cam_resources[] = {
c40fae95 107 {
828c707e
TL
108 .start = OMAP24XX_CAMERA_BASE,
109 .end = OMAP24XX_CAMERA_BASE + 0xfff,
110 .flags = IORESOURCE_MEM,
111 },
112 {
7d7e1eba 113 .start = 24 + OMAP_INTC_START,
828c707e
TL
114 .flags = IORESOURCE_IRQ,
115 }
116};
117
cfe2cde6 118static struct platform_device omap2cam_device = {
828c707e
TL
119 .name = "omap24xxcam",
120 .id = -1,
cfe2cde6
SA
121 .num_resources = ARRAY_SIZE(omap2cam_resources),
122 .resource = omap2cam_resources,
828c707e 123};
a11f6706 124#endif
828c707e 125
1a51a0ce
OBC
126#if defined(CONFIG_IOMMU_API)
127
2ab7c848 128#include <linux/platform_data/iommu-omap.h>
1a51a0ce 129
828c707e
TL
130static struct resource omap3isp_resources[] = {
131 {
132 .start = OMAP3430_ISP_BASE,
133 .end = OMAP3430_ISP_END,
134 .flags = IORESOURCE_MEM,
135 },
828c707e
TL
136 {
137 .start = OMAP3430_ISP_CCP2_BASE,
138 .end = OMAP3430_ISP_CCP2_END,
139 .flags = IORESOURCE_MEM,
140 },
141 {
142 .start = OMAP3430_ISP_CCDC_BASE,
143 .end = OMAP3430_ISP_CCDC_END,
144 .flags = IORESOURCE_MEM,
145 },
146 {
147 .start = OMAP3430_ISP_HIST_BASE,
148 .end = OMAP3430_ISP_HIST_END,
149 .flags = IORESOURCE_MEM,
150 },
151 {
152 .start = OMAP3430_ISP_H3A_BASE,
153 .end = OMAP3430_ISP_H3A_END,
154 .flags = IORESOURCE_MEM,
155 },
156 {
157 .start = OMAP3430_ISP_PREV_BASE,
158 .end = OMAP3430_ISP_PREV_END,
159 .flags = IORESOURCE_MEM,
160 },
161 {
162 .start = OMAP3430_ISP_RESZ_BASE,
163 .end = OMAP3430_ISP_RESZ_END,
164 .flags = IORESOURCE_MEM,
165 },
166 {
167 .start = OMAP3430_ISP_SBL_BASE,
168 .end = OMAP3430_ISP_SBL_END,
169 .flags = IORESOURCE_MEM,
170 },
171 {
6817a69a
TT
172 .start = OMAP3430_ISP_CSI2A_REGS1_BASE,
173 .end = OMAP3430_ISP_CSI2A_REGS1_END,
828c707e
TL
174 .flags = IORESOURCE_MEM,
175 },
176 {
6817a69a
TT
177 .start = OMAP3430_ISP_CSIPHY2_BASE,
178 .end = OMAP3430_ISP_CSIPHY2_END,
179 .flags = IORESOURCE_MEM,
180 },
181 {
182 .start = OMAP3630_ISP_CSI2A_REGS2_BASE,
183 .end = OMAP3630_ISP_CSI2A_REGS2_END,
828c707e
TL
184 .flags = IORESOURCE_MEM,
185 },
186 {
6817a69a
TT
187 .start = OMAP3630_ISP_CSI2C_REGS1_BASE,
188 .end = OMAP3630_ISP_CSI2C_REGS1_END,
189 .flags = IORESOURCE_MEM,
190 },
191 {
192 .start = OMAP3630_ISP_CSIPHY1_BASE,
193 .end = OMAP3630_ISP_CSIPHY1_END,
194 .flags = IORESOURCE_MEM,
195 },
196 {
197 .start = OMAP3630_ISP_CSI2C_REGS2_BASE,
198 .end = OMAP3630_ISP_CSI2C_REGS2_END,
828c707e
TL
199 .flags = IORESOURCE_MEM,
200 },
c19d19eb
SA
201 {
202 .start = OMAP343X_CTRL_BASE + OMAP343X_CONTROL_CSIRXFE,
203 .end = OMAP343X_CTRL_BASE + OMAP343X_CONTROL_CSIRXFE + 3,
204 .flags = IORESOURCE_MEM,
205 },
206 {
207 .start = OMAP343X_CTRL_BASE + OMAP3630_CONTROL_CAMERA_PHY_CTRL,
208 .end = OMAP343X_CTRL_BASE + OMAP3630_CONTROL_CAMERA_PHY_CTRL + 3,
209 .flags = IORESOURCE_MEM,
210 },
828c707e 211 {
7d7e1eba 212 .start = 24 + OMAP_INTC_START,
828c707e
TL
213 .flags = IORESOURCE_IRQ,
214 }
215};
216
217static struct platform_device omap3isp_device = {
218 .name = "omap3isp",
219 .id = -1,
220 .num_resources = ARRAY_SIZE(omap3isp_resources),
221 .resource = omap3isp_resources,
222};
223
c8eaab3b 224static struct omap_iommu_arch_data omap3_isp_iommu = {
72b15b6a 225 .name = "mmu_isp",
c8eaab3b
OBC
226};
227
a11f6706 228int omap3_init_camera(struct isp_platform_data *pdata)
828c707e 229{
0ac4f03f
SA
230 if (of_have_populated_dt())
231 omap3_isp_iommu.name = "480bd400.mmu";
232
a11f6706 233 omap3isp_device.dev.platform_data = pdata;
c8eaab3b
OBC
234 omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu;
235
a11f6706 236 return platform_device_register(&omap3isp_device);
828c707e 237}
828c707e 238
1a51a0ce
OBC
239#else /* !CONFIG_IOMMU_API */
240
241int omap3_init_camera(struct isp_platform_data *pdata)
242{
243 return 0;
244}
245
246#endif
247
828c707e
TL
248static inline void omap_init_camera(void)
249{
cfe2cde6
SA
250#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
251 if (cpu_is_omap24xx())
252 platform_device_register(&omap2cam_device);
828c707e 253#endif
cfe2cde6 254}
828c707e 255
c869c75c 256#if defined(CONFIG_OMAP2PLUS_MBOX) || defined(CONFIG_OMAP2PLUS_MBOX_MODULE)
9cf793f9 257static inline void __init omap_init_mbox(void)
c40fae95 258{
69dbf857 259 struct omap_hwmod *oh;
3528c58e 260 struct platform_device *pdev;
b8a7cf8e 261 struct omap_mbox_pdata *pdata;
69dbf857
FC
262
263 oh = omap_hwmod_lookup("mailbox");
264 if (!oh) {
265 pr_err("%s: unable to find hwmod\n", __func__);
6c20a683
HD
266 return;
267 }
b8a7cf8e
SA
268 if (!oh->dev_attr) {
269 pr_err("%s: hwmod doesn't have valid attrs\n", __func__);
270 return;
271 }
69dbf857 272
b8a7cf8e
SA
273 pdata = (struct omap_mbox_pdata *)oh->dev_attr;
274 pdev = omap_device_build("omap-mailbox", -1, oh, pdata, sizeof(*pdata));
3528c58e
KH
275 WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
276 __func__, PTR_ERR(pdev));
c40fae95
TL
277}
278#else
279static inline void omap_init_mbox(void) { }
c869c75c 280#endif /* CONFIG_OMAP2PLUS_MBOX */
c40fae95 281
9b6553cd 282static inline void omap_init_sti(void) {}
9b6553cd 283
f0fba2ad
LG
284#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
285
286static struct platform_device omap_pcm = {
287 .name = "omap-pcm-audio",
288 .id = -1,
289};
290
f0fba2ad
LG
291static void omap_init_audio(void)
292{
f0fba2ad
LG
293 platform_device_register(&omap_pcm);
294}
295
296#else
297static inline void omap_init_audio(void) {}
298#endif
299
646e3ed1 300#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
ed7eb9d9 301
2203747c 302#include <linux/platform_data/spi-omap2-mcspi.h>
ed7eb9d9 303
9cf793f9 304static int __init omap_mcspi_init(struct omap_hwmod *oh, void *unused)
af41a12f 305{
3528c58e 306 struct platform_device *pdev;
1a5d8190
C
307 char *name = "omap2_mcspi";
308 struct omap2_mcspi_platform_config *pdata;
309 static int spi_num;
310 struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
311
312 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
313 if (!pdata) {
314 pr_err("Memory allocation for McSPI device failed\n");
315 return -ENOMEM;
316 }
af41a12f 317
1a5d8190
C
318 pdata->num_cs = mcspi_attrib->num_chipselect;
319 switch (oh->class->rev) {
320 case OMAP2_MCSPI_REV:
321 case OMAP3_MCSPI_REV:
322 pdata->regs_offset = 0;
323 break;
324 case OMAP4_MCSPI_REV:
325 pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
326 break;
327 default:
328 pr_err("Invalid McSPI Revision value\n");
e0feca89 329 kfree(pdata);
1a5d8190
C
330 return -EINVAL;
331 }
af41a12f 332
1a5d8190 333 spi_num++;
c1d1cd59 334 pdev = omap_device_build(name, spi_num, oh, pdata, sizeof(*pdata));
3528c58e 335 WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s\n",
1a5d8190
C
336 name, oh->name);
337 kfree(pdata);
338 return 0;
af41a12f 339}
af41a12f
TL
340
341static void omap_init_mcspi(void)
342{
1a5d8190 343 omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
ed7eb9d9
JY
344}
345
346#else
347static inline void omap_init_mcspi(void) {}
348#endif
349
4848d460
PW
350/**
351 * omap_init_rng - bind the RNG hwmod to the RNG omap_device
352 *
353 * Bind the RNG hwmod to the RNG omap_device. No return value.
354 */
355static void omap_init_rng(void)
356{
357 struct omap_hwmod *oh;
358 struct platform_device *pdev;
359
360 oh = omap_hwmod_lookup("rng");
361 if (!oh)
362 return;
363
c1d1cd59 364 pdev = omap_device_build("omap_rng", -1, oh, NULL, 0);
4848d460
PW
365 WARN(IS_ERR(pdev), "Can't build omap_device for omap_rng\n");
366}
88341334 367
26f88e6e 368static void __init omap_init_sham(void)
646e3ed1 369{
8c7bb573
MG
370 struct omap_hwmod *oh;
371 struct platform_device *pdev;
372
373 oh = omap_hwmod_lookup("sham");
374 if (!oh)
375 return;
376
377 pdev = omap_device_build("omap-sham", -1, oh, NULL, 0);
378 WARN(IS_ERR(pdev), "Can't build omap_device for omap-sham\n");
646e3ed1 379}
646e3ed1 380
14ae5564 381static void __init omap_init_aes(void)
b744c679 382{
77e2fd84
MG
383 struct omap_hwmod *oh;
384 struct platform_device *pdev;
385
386 oh = omap_hwmod_lookup("aes");
387 if (!oh)
388 return;
389
390 pdev = omap_device_build("omap-aes", -1, oh, NULL, 0);
391 WARN(IS_ERR(pdev), "Can't build omap_device for omap-aes\n");
b744c679
DK
392}
393
d8874665
TL
394/*-------------------------------------------------------------------------*/
395
b227358d
VH
396#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
397 defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
398#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
399static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
400};
401#else
402static struct resource omap_vout_resource[2] = {
403};
404#endif
405
406static struct platform_device omap_vout_device = {
407 .name = "omap_vout",
408 .num_resources = ARRAY_SIZE(omap_vout_resource),
409 .resource = &omap_vout_resource[0],
410 .id = -1,
411};
576e5bda
AT
412
413int __init omap_init_vout(void)
b227358d 414{
576e5bda 415 return platform_device_register(&omap_vout_device);
b227358d
VH
416}
417#else
576e5bda 418int __init omap_init_vout(void) { return 0; }
b227358d
VH
419#endif
420
1dbae815
TL
421/*-------------------------------------------------------------------------*/
422
423static int __init omap2_init_devices(void)
424{
484202f4
MP
425 /* Enable dummy states for those platforms without pinctrl support */
426 if (!of_have_populated_dt())
427 pinctrl_provide_dummies();
428
81fbc5ef
PW
429 /*
430 * please keep these calls, and their implementations above,
1dbae815
TL
431 * in alphabetical order so they're easier to sort through.
432 */
f0fba2ad 433 omap_init_audio();
828c707e 434 omap_init_camera();
c40fae95 435 omap_init_mbox();
efcf1e50 436 /* If dtb is there, the devices will be created dynamically */
259bd6ce 437 if (!of_have_populated_dt()) {
efcf1e50 438 omap_init_mcspi();
114d7a8b 439 omap_init_sham();
53335acc 440 omap_init_aes();
674ee08f 441 omap_init_rng();
259bd6ce 442 }
9b6553cd 443 omap_init_sti();
1dbae815
TL
444
445 return 0;
446}
b76c8b19 447omap_arch_initcall(omap2_init_devices);
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