[deliverable/linux.git] / arch / arm / mach-omap2 / devices.c

/*
 * linux/arch/arm/mach-omap2/devices.c
 *
 * OMAP2 platform device setup/initialization
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/slab.h>

#include <mach/hardware.h>
#include <mach/irqs.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/pmu.h>

#include <plat/tc.h>
#include <plat/board.h>
#include <plat/mcbsp.h>
#include <mach/gpio.h>
#include <plat/mmc.h>
#include <plat/dma.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
#include <plat/omap4-keypad.h>

#include "mux.h"
#include "control.h"
#include "devices.h"

#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3

static int __init omap3_l3_init(void)
{
	int l;
	struct omap_hwmod *oh;
	struct omap_device *od;
	char oh_name[L3_MODULES_MAX_LEN];

	/*
	 * To avoid code running on other OMAPs in
	 * multi-omap builds
	 */
	if (!(cpu_is_omap34xx()))
		return -ENODEV;

	l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");

	oh = omap_hwmod_lookup(oh_name);

	if (!oh)
		pr_err("could not look up %s\n", oh_name);

	od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
							   NULL, 0, 0);

	WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);

	return IS_ERR(od) ? PTR_ERR(od) : 0;
}
postcore_initcall(omap3_l3_init);

static int __init omap4_l3_init(void)
{
	int l, i;
	struct omap_hwmod *oh[3];
	struct omap_device *od;
	char oh_name[L3_MODULES_MAX_LEN];

	/*
	 * To avoid code running on other OMAPs in
	 * multi-omap builds
	 */
	if (!(cpu_is_omap44xx()))
		return -ENODEV;

	for (i = 0; i < L3_MODULES; i++) {
		l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);

		oh[i] = omap_hwmod_lookup(oh_name);
		if (!(oh[i]))
			pr_err("could not look up %s\n", oh_name);
	}

	od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
						     0, NULL, 0, 0);

	WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);

	return IS_ERR(od) ? PTR_ERR(od) : 0;
}
postcore_initcall(omap4_l3_init);

#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)

static struct resource omap2cam_resources[] = {
	{
		.start		= OMAP24XX_CAMERA_BASE,
		.end		= OMAP24XX_CAMERA_BASE + 0xfff,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= INT_24XX_CAM_IRQ,
		.flags		= IORESOURCE_IRQ,
	}
};

static struct platform_device omap2cam_device = {
	.name		= "omap24xxcam",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(omap2cam_resources),
	.resource	= omap2cam_resources,
};
#endif

static struct resource omap3isp_resources[] = {
	{
		.start		= OMAP3430_ISP_BASE,
		.end		= OMAP3430_ISP_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3430_ISP_CCP2_BASE,
		.end		= OMAP3430_ISP_CCP2_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3430_ISP_CCDC_BASE,
		.end		= OMAP3430_ISP_CCDC_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3430_ISP_HIST_BASE,
		.end		= OMAP3430_ISP_HIST_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3430_ISP_H3A_BASE,
		.end		= OMAP3430_ISP_H3A_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3430_ISP_PREV_BASE,
		.end		= OMAP3430_ISP_PREV_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3430_ISP_RESZ_BASE,
		.end		= OMAP3430_ISP_RESZ_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3430_ISP_SBL_BASE,
		.end		= OMAP3430_ISP_SBL_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3430_ISP_CSI2A_REGS1_BASE,
		.end		= OMAP3430_ISP_CSI2A_REGS1_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3430_ISP_CSIPHY2_BASE,
		.end		= OMAP3430_ISP_CSIPHY2_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3630_ISP_CSI2A_REGS2_BASE,
		.end		= OMAP3630_ISP_CSI2A_REGS2_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3630_ISP_CSI2C_REGS1_BASE,
		.end		= OMAP3630_ISP_CSI2C_REGS1_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3630_ISP_CSIPHY1_BASE,
		.end		= OMAP3630_ISP_CSIPHY1_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= OMAP3630_ISP_CSI2C_REGS2_BASE,
		.end		= OMAP3630_ISP_CSI2C_REGS2_END,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= INT_34XX_CAM_IRQ,
		.flags		= IORESOURCE_IRQ,
	}
};

static struct platform_device omap3isp_device = {
	.name		= "omap3isp",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(omap3isp_resources),
	.resource	= omap3isp_resources,
};

int omap3_init_camera(struct isp_platform_data *pdata)
{
	omap3isp_device.dev.platform_data = pdata;
	return platform_device_register(&omap3isp_device);
}

static inline void omap_init_camera(void)
{
#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
	if (cpu_is_omap24xx())
		platform_device_register(&omap2cam_device);
#endif
}

struct omap_device_pm_latency omap_keyboard_latency[] = {
	{
		.deactivate_func = omap_device_idle_hwmods,
		.activate_func   = omap_device_enable_hwmods,
		.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
	},
};

int __init omap4_keyboard_init(struct omap4_keypad_platform_data
			*sdp4430_keypad_data, struct omap_board_data *bdata)
{
	struct omap_device *od;
	struct omap_hwmod *oh;
	struct omap4_keypad_platform_data *keypad_data;
	unsigned int id = -1;
	char *oh_name = "kbd";
	char *name = "omap4-keypad";

	oh = omap_hwmod_lookup(oh_name);
	if (!oh) {
		pr_err("Could not look up %s\n", oh_name);
		return -ENODEV;
	}

	keypad_data = sdp4430_keypad_data;

	od = omap_device_build(name, id, oh, keypad_data,
			sizeof(struct omap4_keypad_platform_data),
			omap_keyboard_latency,
			ARRAY_SIZE(omap_keyboard_latency), 0);

	if (IS_ERR(od)) {
		WARN(1, "Can't build omap_device for %s:%s.\n",
						name, oh->name);
		return PTR_ERR(od);
	}
	oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);

	return 0;
}

#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
static struct omap_device_pm_latency mbox_latencies[] = {
	[0] = {
		.activate_func = omap_device_enable_hwmods,
		.deactivate_func = omap_device_idle_hwmods,
		.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
	},
};

static inline void omap_init_mbox(void)
{
	struct omap_hwmod *oh;
	struct omap_device *od;

	oh = omap_hwmod_lookup("mailbox");
	if (!oh) {
		pr_err("%s: unable to find hwmod\n", __func__);
		return;
	}

	od = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
				mbox_latencies, ARRAY_SIZE(mbox_latencies), 0);
	WARN(IS_ERR(od), "%s: could not build device, err %ld\n",
						__func__, PTR_ERR(od));
}
#else
static inline void omap_init_mbox(void) { }
#endif /* CONFIG_OMAP_MBOX_FWK */

static inline void omap_init_sti(void) {}

#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)

static struct platform_device omap_pcm = {
	.name	= "omap-pcm-audio",
	.id	= -1,
};

/*
 * OMAP2420 has 2 McBSP ports
 * OMAP2430 has 5 McBSP ports
 * OMAP3 has 5 McBSP ports
 * OMAP4 has 4 McBSP ports
 */
OMAP_MCBSP_PLATFORM_DEVICE(1);
OMAP_MCBSP_PLATFORM_DEVICE(2);
OMAP_MCBSP_PLATFORM_DEVICE(3);
OMAP_MCBSP_PLATFORM_DEVICE(4);
OMAP_MCBSP_PLATFORM_DEVICE(5);

static void omap_init_audio(void)
{
	platform_device_register(&omap_mcbsp1);
	platform_device_register(&omap_mcbsp2);
	if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
		platform_device_register(&omap_mcbsp3);
		platform_device_register(&omap_mcbsp4);
	}
	if (cpu_is_omap243x() || cpu_is_omap34xx())
		platform_device_register(&omap_mcbsp5);

	platform_device_register(&omap_pcm);
}

#else
static inline void omap_init_audio(void) {}
#endif

#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)

#include <plat/mcspi.h>

struct omap_device_pm_latency omap_mcspi_latency[] = {
	[0] = {
		.deactivate_func = omap_device_idle_hwmods,
		.activate_func   = omap_device_enable_hwmods,
		.flags		 = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
	},
};

static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
{
	struct omap_device *od;
	char *name = "omap2_mcspi";
	struct omap2_mcspi_platform_config *pdata;
	static int spi_num;
	struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;

	pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
	if (!pdata) {
		pr_err("Memory allocation for McSPI device failed\n");
		return -ENOMEM;
	}

	pdata->num_cs = mcspi_attrib->num_chipselect;
	switch (oh->class->rev) {
	case OMAP2_MCSPI_REV:
	case OMAP3_MCSPI_REV:
			pdata->regs_offset = 0;
			break;
	case OMAP4_MCSPI_REV:
			pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
			break;
	default:
			pr_err("Invalid McSPI Revision value\n");
			return -EINVAL;
	}

	spi_num++;
	od = omap_device_build(name, spi_num, oh, pdata,
				sizeof(*pdata),	omap_mcspi_latency,
				ARRAY_SIZE(omap_mcspi_latency), 0);
	WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n",
				name, oh->name);
	kfree(pdata);
	return 0;
}

static void omap_init_mcspi(void)
{
	omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
}

#else
static inline void omap_init_mcspi(void) {}
#endif

static struct resource omap2_pmu_resource = {
	.start	= 3,
	.end	= 3,
	.flags	= IORESOURCE_IRQ,
};

static struct resource omap3_pmu_resource = {
	.start	= INT_34XX_BENCH_MPU_EMUL,
	.end	= INT_34XX_BENCH_MPU_EMUL,
	.flags	= IORESOURCE_IRQ,
};

static struct platform_device omap_pmu_device = {
	.name		= "arm-pmu",
	.id		= ARM_PMU_DEVICE_CPU,
	.num_resources	= 1,
};

static void omap_init_pmu(void)
{
	if (cpu_is_omap24xx())
		omap_pmu_device.resource = &omap2_pmu_resource;
	else if (cpu_is_omap34xx())
		omap_pmu_device.resource = &omap3_pmu_resource;
	else
		return;

	platform_device_register(&omap_pmu_device);
}


#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)

#ifdef CONFIG_ARCH_OMAP2
static struct resource omap2_sham_resources[] = {
	{
		.start	= OMAP24XX_SEC_SHA1MD5_BASE,
		.end	= OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= INT_24XX_SHA1MD5,
		.flags	= IORESOURCE_IRQ,
	}
};
static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
#else
#define omap2_sham_resources		NULL
#define omap2_sham_resources_sz		0
#endif

#ifdef CONFIG_ARCH_OMAP3
static struct resource omap3_sham_resources[] = {
	{
		.start	= OMAP34XX_SEC_SHA1MD5_BASE,
		.end	= OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= INT_34XX_SHA1MD52_IRQ,
		.flags	= IORESOURCE_IRQ,
	},
	{
		.start	= OMAP34XX_DMA_SHA1MD5_RX,
		.flags	= IORESOURCE_DMA,
	}
};
static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
#else
#define omap3_sham_resources		NULL
#define omap3_sham_resources_sz		0
#endif

static struct platform_device sham_device = {
	.name		= "omap-sham",
	.id		= -1,
};

static void omap_init_sham(void)
{
	if (cpu_is_omap24xx()) {
		sham_device.resource = omap2_sham_resources;
		sham_device.num_resources = omap2_sham_resources_sz;
	} else if (cpu_is_omap34xx()) {
		sham_device.resource = omap3_sham_resources;
		sham_device.num_resources = omap3_sham_resources_sz;
	} else {
		pr_err("%s: platform not supported\n", __func__);
		return;
	}
	platform_device_register(&sham_device);
}
#else
static inline void omap_init_sham(void) { }
#endif

#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)

#ifdef CONFIG_ARCH_OMAP2
static struct resource omap2_aes_resources[] = {
	{
		.start	= OMAP24XX_SEC_AES_BASE,
		.end	= OMAP24XX_SEC_AES_BASE + 0x4C,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= OMAP24XX_DMA_AES_TX,
		.flags	= IORESOURCE_DMA,
	},
	{
		.start	= OMAP24XX_DMA_AES_RX,
		.flags	= IORESOURCE_DMA,
	}
};
static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
#else
#define omap2_aes_resources		NULL
#define omap2_aes_resources_sz		0
#endif

#ifdef CONFIG_ARCH_OMAP3
static struct resource omap3_aes_resources[] = {
	{
		.start	= OMAP34XX_SEC_AES_BASE,
		.end	= OMAP34XX_SEC_AES_BASE + 0x4C,
		.flags	= IORESOURCE_MEM,
	},
	{
		.start	= OMAP34XX_DMA_AES2_TX,
		.flags	= IORESOURCE_DMA,
	},
	{
		.start	= OMAP34XX_DMA_AES2_RX,
		.flags	= IORESOURCE_DMA,
	}
};
static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
#else
#define omap3_aes_resources		NULL
#define omap3_aes_resources_sz		0
#endif

static struct platform_device aes_device = {
	.name		= "omap-aes",
	.id		= -1,
};

static void omap_init_aes(void)
{
	if (cpu_is_omap24xx()) {
		aes_device.resource = omap2_aes_resources;
		aes_device.num_resources = omap2_aes_resources_sz;
	} else if (cpu_is_omap34xx()) {
		aes_device.resource = omap3_aes_resources;
		aes_device.num_resources = omap3_aes_resources_sz;
	} else {
		pr_err("%s: platform not supported\n", __func__);
		return;
	}
	platform_device_register(&aes_device);
}

#else
static inline void omap_init_aes(void) { }
#endif

/*-------------------------------------------------------------------------*/

#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)

static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
							*mmc_controller)
{
	if ((mmc_controller->slots[0].switch_pin > 0) && \
		(mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
		omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
					OMAP_PIN_INPUT_PULLUP);
	if ((mmc_controller->slots[0].gpio_wp > 0) && \
		(mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
		omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
					OMAP_PIN_INPUT_PULLUP);

	omap_mux_init_signal("sdmmc_cmd", 0);
	omap_mux_init_signal("sdmmc_clki", 0);
	omap_mux_init_signal("sdmmc_clko", 0);
	omap_mux_init_signal("sdmmc_dat0", 0);
	omap_mux_init_signal("sdmmc_dat_dir0", 0);
	omap_mux_init_signal("sdmmc_cmd_dir", 0);
	if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
		omap_mux_init_signal("sdmmc_dat1", 0);
		omap_mux_init_signal("sdmmc_dat2", 0);
		omap_mux_init_signal("sdmmc_dat3", 0);
		omap_mux_init_signal("sdmmc_dat_dir1", 0);
		omap_mux_init_signal("sdmmc_dat_dir2", 0);
		omap_mux_init_signal("sdmmc_dat_dir3", 0);
	}

	/*
	 * Use internal loop-back in MMC/SDIO Module Input Clock
	 * selection
	 */
	if (mmc_controller->slots[0].internal_clock) {
		u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
		v |= (1 << 24);
		omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
	}
}

void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
{
	char *name = "mmci-omap";

	if (!mmc_data[0]) {
		pr_err("%s fails: Incomplete platform data\n", __func__);
		return;
	}

	omap242x_mmc_mux(mmc_data[0]);
	omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
					INT_24XX_MMC_IRQ, mmc_data[0]);
}

#endif

/*-------------------------------------------------------------------------*/

#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
#define OMAP_HDQ_BASE	0x480B2000
#endif
static struct resource omap_hdq_resources[] = {
	{
		.start		= OMAP_HDQ_BASE,
		.end		= OMAP_HDQ_BASE + 0x1C,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= INT_24XX_HDQ_IRQ,
		.flags		= IORESOURCE_IRQ,
	},
};
static struct platform_device omap_hdq_dev = {
	.name = "omap_hdq",
	.id = 0,
	.dev = {
		.platform_data = NULL,
	},
	.num_resources	= ARRAY_SIZE(omap_hdq_resources),
	.resource	= omap_hdq_resources,
};
static inline void omap_hdq_init(void)
{
	(void) platform_device_register(&omap_hdq_dev);
}
#else
static inline void omap_hdq_init(void) {}
#endif

/*---------------------------------------------------------------------------*/

#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
	defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
};
#else
static struct resource omap_vout_resource[2] = {
};
#endif

static struct platform_device omap_vout_device = {
	.name		= "omap_vout",
	.num_resources	= ARRAY_SIZE(omap_vout_resource),
	.resource 	= &omap_vout_resource[0],
	.id		= -1,
};
static void omap_init_vout(void)
{
	if (platform_device_register(&omap_vout_device) < 0)
		printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
}
#else
static inline void omap_init_vout(void) {}
#endif

/*-------------------------------------------------------------------------*/

static int __init omap2_init_devices(void)
{
	/*
	 * please keep these calls, and their implementations above,
	 * in alphabetical order so they're easier to sort through.
	 */
	omap_init_audio();
	omap_init_camera();
	omap_init_mbox();
	omap_init_mcspi();
	omap_init_pmu();
	omap_hdq_init();
	omap_init_sti();
	omap_init_sham();
	omap_init_aes();
	omap_init_vout();

	return 0;
}
arch_initcall(omap2_init_devices);

#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
static struct omap_device_pm_latency omap_wdt_latency[] = {
	[0] = {
		.deactivate_func = omap_device_idle_hwmods,
		.activate_func   = omap_device_enable_hwmods,
		.flags		 = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
	},
};

static int __init omap_init_wdt(void)
{
	int id = -1;
	struct omap_device *od;
	struct omap_hwmod *oh;
	char *oh_name = "wd_timer2";
	char *dev_name = "omap_wdt";

	if (!cpu_class_is_omap2())
		return 0;

	oh = omap_hwmod_lookup(oh_name);
	if (!oh) {
		pr_err("Could not look up wd_timer%d hwmod\n", id);
		return -EINVAL;
	}

	od = omap_device_build(dev_name, id, oh, NULL, 0,
				omap_wdt_latency,
				ARRAY_SIZE(omap_wdt_latency), 0);
	WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n",
				dev_name, oh->name);
	return 0;
}
subsys_initcall(omap_init_wdt);
#endif
Commit	Line	Data
1dbae815 TL	1	/*
	2	* linux/arch/arm/mach-omap2/devices.c
	3	*
	4	* OMAP2 platform device setup/initialization
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
1dbae815 TL	12	#include <linux/kernel.h>
	13	#include <linux/init.h>
	14	#include <linux/platform_device.h>
fced80c7	15	#include <linux/io.h>
917fa280	16	#include <linux/clk.h>
f2ce6231	17	#include <linux/err.h>
1a5d8190	18	#include <linux/slab.h>
1dbae815	19
a09e64fb	20	#include <mach/hardware.h>
88341334	21	#include <mach/irqs.h>
1dbae815 TL	22	#include <asm/mach-types.h>
1dbae815 TL	23	#include <asm/mach/map.h>
88341334	24	#include <asm/pmu.h>
1dbae815	25
ce491cf8 TL	26	#include <plat/tc.h>
ce491cf8 TL	27	#include <plat/board.h>
a09f73fa	28	#include <plat/mcbsp.h>
a09e64fb	29	#include <mach/gpio.h>
ce491cf8	30	#include <plat/mmc.h>
ee5500c4	31	#include <plat/dma.h>
f2ce6231 VC	32	#include <plat/omap_hwmod.h>
f2ce6231 VC	33	#include <plat/omap_device.h>
59556765	34	#include <plat/omap4-keypad.h>
1dbae815	35
4896e394	36	#include "mux.h"
4814ced5	37	#include "control.h"
a11f6706	38	#include "devices.h"
4896e394	39
0abcf618	40	#define L3_MODULES_MAX_LEN 12
a4dc616a	41	#define L3_MODULES 3
0abcf618	42
	43	static int __init omap3_l3_init(void)
	44	{
	45	int l;
	46	struct omap_hwmod *oh;
	47	struct omap_device *od;
	48	char oh_name[L3_MODULES_MAX_LEN];
	49
	50	/*
	51	* To avoid code running on other OMAPs in
	52	* multi-omap builds
	53	*/
	54	if (!(cpu_is_omap34xx()))
	55	return -ENODEV;
	56
	57	l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
	58
	59	oh = omap_hwmod_lookup(oh_name);
	60
	61	if (!oh)
	62	pr_err("could not look up %s\n", oh_name);
	63
	64	od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
	65	NULL, 0, 0);
	66
	67	WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
	68
36133869	69	return IS_ERR(od) ? PTR_ERR(od) : 0;
0abcf618	70	}
	71	postcore_initcall(omap3_l3_init);
	72
a4dc616a	73	static int __init omap4_l3_init(void)
	74	{
	75	int l, i;
	76	struct omap_hwmod *oh[3];
	77	struct omap_device *od;
	78	char oh_name[L3_MODULES_MAX_LEN];
	79
	80	/*
	81	* To avoid code running on other OMAPs in
	82	* multi-omap builds
	83	*/
	84	if (!(cpu_is_omap44xx()))
	85	return -ENODEV;
	86
	87	for (i = 0; i < L3_MODULES; i++) {
	88	l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
	89
	90	oh[i] = omap_hwmod_lookup(oh_name);
	91	if (!(oh[i]))
	92	pr_err("could not look up %s\n", oh_name);
	93	}
	94
	95	od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
	96	0, NULL, 0, 0);
	97
	98	WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
	99
1499f2db	100	return IS_ERR(od) ? PTR_ERR(od) : 0;
a4dc616a	101	}
	102	postcore_initcall(omap4_l3_init);
	103
828c707e	104	#if defined(CONFIG_VIDEO_OMAP2) \|\| defined(CONFIG_VIDEO_OMAP2_MODULE)
c40fae95	105
cfe2cde6	106	static struct resource omap2cam_resources[] = {
c40fae95	107	{
828c707e TL	108	.start = OMAP24XX_CAMERA_BASE,
	109	.end = OMAP24XX_CAMERA_BASE + 0xfff,
	110	.flags = IORESOURCE_MEM,
	111	},
	112	{
	113	.start = INT_24XX_CAM_IRQ,
	114	.flags = IORESOURCE_IRQ,
	115	}
	116	};
	117
cfe2cde6	118	static struct platform_device omap2cam_device = {
828c707e TL	119	.name = "omap24xxcam",
828c707e TL	120	.id = -1,
cfe2cde6 SA	121	.num_resources = ARRAY_SIZE(omap2cam_resources),
cfe2cde6 SA	122	.resource = omap2cam_resources,
828c707e	123	};
a11f6706	124	#endif
828c707e TL	125
	126	static struct resource omap3isp_resources[] = {
	127	{
	128	.start = OMAP3430_ISP_BASE,
	129	.end = OMAP3430_ISP_END,
	130	.flags = IORESOURCE_MEM,
	131	},
828c707e TL	132	{
	133	.start = OMAP3430_ISP_CCP2_BASE,
	134	.end = OMAP3430_ISP_CCP2_END,
	135	.flags = IORESOURCE_MEM,
	136	},
	137	{
	138	.start = OMAP3430_ISP_CCDC_BASE,
	139	.end = OMAP3430_ISP_CCDC_END,
	140	.flags = IORESOURCE_MEM,
	141	},
	142	{
	143	.start = OMAP3430_ISP_HIST_BASE,
	144	.end = OMAP3430_ISP_HIST_END,
	145	.flags = IORESOURCE_MEM,
	146	},
	147	{
	148	.start = OMAP3430_ISP_H3A_BASE,
	149	.end = OMAP3430_ISP_H3A_END,
	150	.flags = IORESOURCE_MEM,
	151	},
	152	{
	153	.start = OMAP3430_ISP_PREV_BASE,
	154	.end = OMAP3430_ISP_PREV_END,
	155	.flags = IORESOURCE_MEM,
	156	},
	157	{
	158	.start = OMAP3430_ISP_RESZ_BASE,
	159	.end = OMAP3430_ISP_RESZ_END,
	160	.flags = IORESOURCE_MEM,
	161	},
	162	{
	163	.start = OMAP3430_ISP_SBL_BASE,
	164	.end = OMAP3430_ISP_SBL_END,
	165	.flags = IORESOURCE_MEM,
	166	},
	167	{
6817a69a TT	168	.start = OMAP3430_ISP_CSI2A_REGS1_BASE,
6817a69a TT	169	.end = OMAP3430_ISP_CSI2A_REGS1_END,
828c707e TL	170	.flags = IORESOURCE_MEM,
	171	},
	172	{
6817a69a TT	173	.start = OMAP3430_ISP_CSIPHY2_BASE,
	174	.end = OMAP3430_ISP_CSIPHY2_END,
	175	.flags = IORESOURCE_MEM,
	176	},
	177	{
	178	.start = OMAP3630_ISP_CSI2A_REGS2_BASE,
	179	.end = OMAP3630_ISP_CSI2A_REGS2_END,
828c707e TL	180	.flags = IORESOURCE_MEM,
	181	},
	182	{
6817a69a TT	183	.start = OMAP3630_ISP_CSI2C_REGS1_BASE,
	184	.end = OMAP3630_ISP_CSI2C_REGS1_END,
	185	.flags = IORESOURCE_MEM,
	186	},
	187	{
	188	.start = OMAP3630_ISP_CSIPHY1_BASE,
	189	.end = OMAP3630_ISP_CSIPHY1_END,
	190	.flags = IORESOURCE_MEM,
	191	},
	192	{
	193	.start = OMAP3630_ISP_CSI2C_REGS2_BASE,
	194	.end = OMAP3630_ISP_CSI2C_REGS2_END,
828c707e TL	195	.flags = IORESOURCE_MEM,
	196	},
	197	{
	198	.start = INT_34XX_CAM_IRQ,
	199	.flags = IORESOURCE_IRQ,
	200	}
	201	};
	202
	203	static struct platform_device omap3isp_device = {
	204	.name = "omap3isp",
	205	.id = -1,
	206	.num_resources = ARRAY_SIZE(omap3isp_resources),
	207	.resource = omap3isp_resources,
	208	};
	209
a11f6706	210	int omap3_init_camera(struct isp_platform_data *pdata)
828c707e	211	{
a11f6706 LP	212	omap3isp_device.dev.platform_data = pdata;
a11f6706 LP	213	return platform_device_register(&omap3isp_device);
828c707e	214	}
828c707e	215
828c707e TL	216	static inline void omap_init_camera(void)
828c707e TL	217	{
cfe2cde6 SA	218	#if defined(CONFIG_VIDEO_OMAP2) \|\| defined(CONFIG_VIDEO_OMAP2_MODULE)
	219	if (cpu_is_omap24xx())
	220	platform_device_register(&omap2cam_device);
828c707e	221	#endif
cfe2cde6	222	}
828c707e	223
59556765 SR	224	struct omap_device_pm_latency omap_keyboard_latency[] = {
	225	{
	226	.deactivate_func = omap_device_idle_hwmods,
	227	.activate_func = omap_device_enable_hwmods,
	228	.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
	229	},
	230	};
	231
	232	int __init omap4_keyboard_init(struct omap4_keypad_platform_data
f67df6c6	233	sdp4430_keypad_data, struct omap_board_data bdata)
59556765 SR	234	{
	235	struct omap_device *od;
	236	struct omap_hwmod *oh;
	237	struct omap4_keypad_platform_data *keypad_data;
	238	unsigned int id = -1;
	239	char *oh_name = "kbd";
	240	char *name = "omap4-keypad";
	241
	242	oh = omap_hwmod_lookup(oh_name);
	243	if (!oh) {
	244	pr_err("Could not look up %s\n", oh_name);
	245	return -ENODEV;
	246	}
	247
	248	keypad_data = sdp4430_keypad_data;
	249
	250	od = omap_device_build(name, id, oh, keypad_data,
	251	sizeof(struct omap4_keypad_platform_data),
	252	omap_keyboard_latency,
	253	ARRAY_SIZE(omap_keyboard_latency), 0);
	254
	255	if (IS_ERR(od)) {
25985edc	256	WARN(1, "Can't build omap_device for %s:%s.\n",
59556765 SR	257	name, oh->name);
	258	return PTR_ERR(od);
	259	}
f67df6c6	260	oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
59556765 SR	261
	262	return 0;
	263	}
	264
6c20a683	265	#if defined(CONFIG_OMAP_MBOX_FWK) \|\| defined(CONFIG_OMAP_MBOX_FWK_MODULE)
69dbf857 FC	266	static struct omap_device_pm_latency mbox_latencies[] = {
	267	[0] = {
	268	.activate_func = omap_device_enable_hwmods,
	269	.deactivate_func = omap_device_idle_hwmods,
	270	.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
454bf340 S	271	},
454bf340 S	272	};
c40fae95 TL	273
	274	static inline void omap_init_mbox(void)
	275	{
69dbf857 FC	276	struct omap_hwmod *oh;
	277	struct omap_device *od;
	278
	279	oh = omap_hwmod_lookup("mailbox");
	280	if (!oh) {
	281	pr_err("%s: unable to find hwmod\n", __func__);
6c20a683 HD	282	return;
6c20a683 HD	283	}
69dbf857 FC	284
	285	od = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
	286	mbox_latencies, ARRAY_SIZE(mbox_latencies), 0);
	287	WARN(IS_ERR(od), "%s: could not build device, err %ld\n",
	288	__func__, PTR_ERR(od));
c40fae95 TL	289	}
	290	#else
	291	static inline void omap_init_mbox(void) { }
6c20a683	292	#endif /* CONFIG_OMAP_MBOX_FWK */
c40fae95	293
9b6553cd	294	static inline void omap_init_sti(void) {}
9b6553cd	295
f0fba2ad LG	296	#if defined(CONFIG_SND_SOC) \|\| defined(CONFIG_SND_SOC_MODULE)
	297
	298	static struct platform_device omap_pcm = {
	299	.name = "omap-pcm-audio",
	300	.id = -1,
	301	};
	302
	303	/*
	304	* OMAP2420 has 2 McBSP ports
	305	* OMAP2430 has 5 McBSP ports
	306	* OMAP3 has 5 McBSP ports
	307	* OMAP4 has 4 McBSP ports
	308	*/
	309	OMAP_MCBSP_PLATFORM_DEVICE(1);
	310	OMAP_MCBSP_PLATFORM_DEVICE(2);
	311	OMAP_MCBSP_PLATFORM_DEVICE(3);
	312	OMAP_MCBSP_PLATFORM_DEVICE(4);
	313	OMAP_MCBSP_PLATFORM_DEVICE(5);
	314
	315	static void omap_init_audio(void)
	316	{
	317	platform_device_register(&omap_mcbsp1);
	318	platform_device_register(&omap_mcbsp2);
	319	if (cpu_is_omap243x() \|\| cpu_is_omap34xx() \|\| cpu_is_omap44xx()) {
	320	platform_device_register(&omap_mcbsp3);
	321	platform_device_register(&omap_mcbsp4);
	322	}
	323	if (cpu_is_omap243x() \|\| cpu_is_omap34xx())
	324	platform_device_register(&omap_mcbsp5);
	325
	326	platform_device_register(&omap_pcm);
	327	}
	328
	329	#else
	330	static inline void omap_init_audio(void) {}
	331	#endif
	332
646e3ed1	333	#if defined(CONFIG_SPI_OMAP24XX) \|\| defined(CONFIG_SPI_OMAP24XX_MODULE)
ed7eb9d9	334
ce491cf8	335	#include <plat/mcspi.h>
ed7eb9d9	336
1a5d8190 C	337	struct omap_device_pm_latency omap_mcspi_latency[] = {
	338	[0] = {
	339	.deactivate_func = omap_device_idle_hwmods,
	340	.activate_func = omap_device_enable_hwmods,
	341	.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
646e3ed1 TL	342	},
646e3ed1 TL	343	};
646e3ed1	344
1a5d8190	345	static int omap_mcspi_init(struct omap_hwmod oh, void unused)
af41a12f	346	{
1a5d8190 C	347	struct omap_device *od;
	348	char *name = "omap2_mcspi";
	349	struct omap2_mcspi_platform_config *pdata;
	350	static int spi_num;
	351	struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
	352
	353	pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
	354	if (!pdata) {
	355	pr_err("Memory allocation for McSPI device failed\n");
	356	return -ENOMEM;
	357	}
af41a12f	358
1a5d8190 C	359	pdata->num_cs = mcspi_attrib->num_chipselect;
	360	switch (oh->class->rev) {
	361	case OMAP2_MCSPI_REV:
	362	case OMAP3_MCSPI_REV:
	363	pdata->regs_offset = 0;
	364	break;
	365	case OMAP4_MCSPI_REV:
	366	pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
	367	break;
	368	default:
	369	pr_err("Invalid McSPI Revision value\n");
	370	return -EINVAL;
	371	}
af41a12f	372
1a5d8190 C	373	spi_num++;
	374	od = omap_device_build(name, spi_num, oh, pdata,
	375	sizeof(*pdata), omap_mcspi_latency,
	376	ARRAY_SIZE(omap_mcspi_latency), 0);
25985edc	377	WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n",
1a5d8190 C	378	name, oh->name);
	379	kfree(pdata);
	380	return 0;
af41a12f	381	}
af41a12f TL	382
	383	static void omap_init_mcspi(void)
	384	{
1a5d8190	385	omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
ed7eb9d9 JY	386	}
	387
	388	#else
	389	static inline void omap_init_mcspi(void) {}
	390	#endif
	391
88341334 WD	392	static struct resource omap2_pmu_resource = {
	393	.start = 3,
	394	.end = 3,
	395	.flags = IORESOURCE_IRQ,
	396	};
	397
	398	static struct resource omap3_pmu_resource = {
	399	.start = INT_34XX_BENCH_MPU_EMUL,
	400	.end = INT_34XX_BENCH_MPU_EMUL,
	401	.flags = IORESOURCE_IRQ,
	402	};
	403
	404	static struct platform_device omap_pmu_device = {
	405	.name = "arm-pmu",
	406	.id = ARM_PMU_DEVICE_CPU,
	407	.num_resources = 1,
	408	};
	409
	410	static void omap_init_pmu(void)
	411	{
	412	if (cpu_is_omap24xx())
	413	omap_pmu_device.resource = &omap2_pmu_resource;
	414	else if (cpu_is_omap34xx())
	415	omap_pmu_device.resource = &omap3_pmu_resource;
	416	else
	417	return;
	418
	419	platform_device_register(&omap_pmu_device);
	420	}
	421
	422
ee5500c4 DK	423	#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) \|\| defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
ee5500c4 DK	424
edc774ed	425	#ifdef CONFIG_ARCH_OMAP2
ee5500c4	426	static struct resource omap2_sham_resources[] = {
646e3ed1 TL	427	{
	428	.start = OMAP24XX_SEC_SHA1MD5_BASE,
	429	.end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
	430	.flags = IORESOURCE_MEM,
	431	},
	432	{
	433	.start = INT_24XX_SHA1MD5,
	434	.flags = IORESOURCE_IRQ,
	435	}
	436	};
ee5500c4 DK	437	static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
	438	#else
	439	#define omap2_sham_resources NULL
	440	#define omap2_sham_resources_sz 0
	441	#endif
646e3ed1	442
edc774ed	443	#ifdef CONFIG_ARCH_OMAP3
ee5500c4 DK	444	static struct resource omap3_sham_resources[] = {
	445	{
	446	.start = OMAP34XX_SEC_SHA1MD5_BASE,
	447	.end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
	448	.flags = IORESOURCE_MEM,
	449	},
	450	{
	451	.start = INT_34XX_SHA1MD52_IRQ,
	452	.flags = IORESOURCE_IRQ,
	453	},
	454	{
	455	.start = OMAP34XX_DMA_SHA1MD5_RX,
	456	.flags = IORESOURCE_DMA,
	457	}
	458	};
	459	static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
	460	#else
	461	#define omap3_sham_resources NULL
	462	#define omap3_sham_resources_sz 0
	463	#endif
	464
	465	static struct platform_device sham_device = {
	466	.name = "omap-sham",
646e3ed1	467	.id = -1,
646e3ed1 TL	468	};
646e3ed1 TL	469
ee5500c4	470	static void omap_init_sham(void)
646e3ed1	471	{
ee5500c4 DK	472	if (cpu_is_omap24xx()) {
	473	sham_device.resource = omap2_sham_resources;
	474	sham_device.num_resources = omap2_sham_resources_sz;
	475	} else if (cpu_is_omap34xx()) {
	476	sham_device.resource = omap3_sham_resources;
	477	sham_device.num_resources = omap3_sham_resources_sz;
	478	} else {
	479	pr_err("%s: platform not supported\n", __func__);
	480	return;
	481	}
	482	platform_device_register(&sham_device);
646e3ed1 TL	483	}
646e3ed1 TL	484	#else
ee5500c4	485	static inline void omap_init_sham(void) { }
646e3ed1 TL	486	#endif
646e3ed1 TL	487
b744c679 DK	488	#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) \|\| defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
b744c679 DK	489
82a0c149	490	#ifdef CONFIG_ARCH_OMAP2
b744c679 DK	491	static struct resource omap2_aes_resources[] = {
	492	{
	493	.start = OMAP24XX_SEC_AES_BASE,
	494	.end = OMAP24XX_SEC_AES_BASE + 0x4C,
	495	.flags = IORESOURCE_MEM,
	496	},
	497	{
	498	.start = OMAP24XX_DMA_AES_TX,
	499	.flags = IORESOURCE_DMA,
	500	},
	501	{
	502	.start = OMAP24XX_DMA_AES_RX,
	503	.flags = IORESOURCE_DMA,
	504	}
	505	};
	506	static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
	507	#else
	508	#define omap2_aes_resources NULL
	509	#define omap2_aes_resources_sz 0
	510	#endif
	511
82a0c149	512	#ifdef CONFIG_ARCH_OMAP3
b744c679 DK	513	static struct resource omap3_aes_resources[] = {
	514	{
	515	.start = OMAP34XX_SEC_AES_BASE,
	516	.end = OMAP34XX_SEC_AES_BASE + 0x4C,
	517	.flags = IORESOURCE_MEM,
	518	},
	519	{
	520	.start = OMAP34XX_DMA_AES2_TX,
	521	.flags = IORESOURCE_DMA,
	522	},
	523	{
	524	.start = OMAP34XX_DMA_AES2_RX,
	525	.flags = IORESOURCE_DMA,
	526	}
	527	};
	528	static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
	529	#else
	530	#define omap3_aes_resources NULL
	531	#define omap3_aes_resources_sz 0
	532	#endif
	533
	534	static struct platform_device aes_device = {
	535	.name = "omap-aes",
	536	.id = -1,
	537	};
	538
	539	static void omap_init_aes(void)
	540	{
	541	if (cpu_is_omap24xx()) {
	542	aes_device.resource = omap2_aes_resources;
	543	aes_device.num_resources = omap2_aes_resources_sz;
	544	} else if (cpu_is_omap34xx()) {
	545	aes_device.resource = omap3_aes_resources;
	546	aes_device.num_resources = omap3_aes_resources_sz;
	547	} else {
	548	pr_err("%s: platform not supported\n", __func__);
	549	return;
	550	}
	551	platform_device_register(&aes_device);
	552	}
	553
	554	#else
	555	static inline void omap_init_aes(void) { }
	556	#endif
	557
d8874665 TL	558	/-------------------------------------------------------------------------/
d8874665 TL	559
e08016d0	560	#if defined(CONFIG_MMC_OMAP) \|\| defined(CONFIG_MMC_OMAP_MODULE)
917fa280	561
e08016d0 AG	562	static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
e08016d0 AG	563	*mmc_controller)
d8874665	564	{
ed8303fc	565	if ((mmc_controller->slots[0].switch_pin > 0) && \
	566	(mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
	567	omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
	568	OMAP_PIN_INPUT_PULLUP);
	569	if ((mmc_controller->slots[0].gpio_wp > 0) && \
	570	(mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
	571	omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
	572	OMAP_PIN_INPUT_PULLUP);
	573
e08016d0 AG	574	omap_mux_init_signal("sdmmc_cmd", 0);
	575	omap_mux_init_signal("sdmmc_clki", 0);
	576	omap_mux_init_signal("sdmmc_clko", 0);
	577	omap_mux_init_signal("sdmmc_dat0", 0);
	578	omap_mux_init_signal("sdmmc_dat_dir0", 0);
	579	omap_mux_init_signal("sdmmc_cmd_dir", 0);
	580	if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
	581	omap_mux_init_signal("sdmmc_dat1", 0);
	582	omap_mux_init_signal("sdmmc_dat2", 0);
	583	omap_mux_init_signal("sdmmc_dat3", 0);
	584	omap_mux_init_signal("sdmmc_dat_dir1", 0);
	585	omap_mux_init_signal("sdmmc_dat_dir2", 0);
	586	omap_mux_init_signal("sdmmc_dat_dir3", 0);
d8874665	587	}
57b9daa0	588
e08016d0 AG	589	/*
	590	* Use internal loop-back in MMC/SDIO Module Input Clock
	591	* selection
	592	*/
	593	if (mmc_controller->slots[0].internal_clock) {
	594	u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
	595	v \|= (1 << 24);
	596	omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
57b9daa0	597	}
d8874665 TL	598	}
d8874665 TL	599
e08016d0	600	void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
d8874665	601	{
e08016d0	602	char *name = "mmci-omap";
d8874665	603
e08016d0 AG	604	if (!mmc_data[0]) {
	605	pr_err("%s fails: Incomplete platform data\n", __func__);
	606	return;
	607	}
d8874665	608
e08016d0 AG	609	omap242x_mmc_mux(mmc_data[0]);
	610	omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
	611	INT_24XX_MMC_IRQ, mmc_data[0]);
d8874665 TL	612	}
	613
	614	#endif
	615
	616	/-------------------------------------------------------------------------/
	617
646e3ed1	618	#if defined(CONFIG_HDQ_MASTER_OMAP) \|\| defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
59b479e0	619	#if defined(CONFIG_SOC_OMAP2430) \|\| defined(CONFIG_SOC_OMAP3430)
646e3ed1 TL	620	#define OMAP_HDQ_BASE 0x480B2000
	621	#endif
	622	static struct resource omap_hdq_resources[] = {
	623	{
	624	.start = OMAP_HDQ_BASE,
	625	.end = OMAP_HDQ_BASE + 0x1C,
	626	.flags = IORESOURCE_MEM,
	627	},
	628	{
	629	.start = INT_24XX_HDQ_IRQ,
	630	.flags = IORESOURCE_IRQ,
	631	},
	632	};
	633	static struct platform_device omap_hdq_dev = {
	634	.name = "omap_hdq",
	635	.id = 0,
	636	.dev = {
	637	.platform_data = NULL,
	638	},
	639	.num_resources = ARRAY_SIZE(omap_hdq_resources),
	640	.resource = omap_hdq_resources,
	641	};
	642	static inline void omap_hdq_init(void)
	643	{
	644	(void) platform_device_register(&omap_hdq_dev);
	645	}
	646	#else
	647	static inline void omap_hdq_init(void) {}
	648	#endif
	649
b227358d VH	650	/---------------------------------------------------------------------------/
	651
	652	#if defined(CONFIG_VIDEO_OMAP2_VOUT) \|\| \
	653	defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
	654	#if defined(CONFIG_FB_OMAP2) \|\| defined(CONFIG_FB_OMAP2_MODULE)
	655	static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
	656	};
	657	#else
	658	static struct resource omap_vout_resource[2] = {
	659	};
	660	#endif
	661
	662	static struct platform_device omap_vout_device = {
	663	.name = "omap_vout",
	664	.num_resources = ARRAY_SIZE(omap_vout_resource),
	665	.resource = &omap_vout_resource[0],
	666	.id = -1,
	667	};
	668	static void omap_init_vout(void)
	669	{
	670	if (platform_device_register(&omap_vout_device) < 0)
	671	printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
	672	}
	673	#else
	674	static inline void omap_init_vout(void) {}
	675	#endif
	676
1dbae815 TL	677	/-------------------------------------------------------------------------/
	678
	679	static int __init omap2_init_devices(void)
	680	{
81fbc5ef PW	681	/*
81fbc5ef PW	682	* please keep these calls, and their implementations above,
1dbae815 TL	683	* in alphabetical order so they're easier to sort through.
1dbae815 TL	684	*/
f0fba2ad	685	omap_init_audio();
828c707e	686	omap_init_camera();
c40fae95	687	omap_init_mbox();
ed7eb9d9	688	omap_init_mcspi();
88341334	689	omap_init_pmu();
646e3ed1	690	omap_hdq_init();
9b6553cd	691	omap_init_sti();
ee5500c4	692	omap_init_sham();
b744c679	693	omap_init_aes();
b227358d	694	omap_init_vout();
1dbae815 TL	695
	696	return 0;
	697	}
	698	arch_initcall(omap2_init_devices);
f2ce6231 VC	699
f2ce6231 VC	700	#if defined(CONFIG_OMAP_WATCHDOG) \|\| defined(CONFIG_OMAP_WATCHDOG_MODULE)
a9b365bd	701	static struct omap_device_pm_latency omap_wdt_latency[] = {
f2ce6231 VC	702	[0] = {
	703	.deactivate_func = omap_device_idle_hwmods,
	704	.activate_func = omap_device_enable_hwmods,
	705	.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
	706	},
	707	};
	708
	709	static int __init omap_init_wdt(void)
	710	{
	711	int id = -1;
	712	struct omap_device *od;
	713	struct omap_hwmod *oh;
	714	char *oh_name = "wd_timer2";
	715	char *dev_name = "omap_wdt";
	716
	717	if (!cpu_class_is_omap2())
	718	return 0;
	719
	720	oh = omap_hwmod_lookup(oh_name);
	721	if (!oh) {
	722	pr_err("Could not look up wd_timer%d hwmod\n", id);
	723	return -EINVAL;
	724	}
	725
	726	od = omap_device_build(dev_name, id, oh, NULL, 0,
	727	omap_wdt_latency,
	728	ARRAY_SIZE(omap_wdt_latency), 0);
25985edc	729	WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n",
f2ce6231 VC	730	dev_name, oh->name);
	731	return 0;
	732	}
	733	subsys_initcall(omap_init_wdt);
	734	#endif