Linux 3.5-rc5
[deliverable/linux.git] / arch / arm / mach-omap2 / gpmc-nand.c
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1/*
2 * gpmc-nand.c
3 *
4 * Copyright (C) 2009 Texas Instruments
5 * Vimal Singh <vimalsingh@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14#include <linux/io.h>
d5ce2b65 15#include <linux/mtd/nand.h>
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16
17#include <asm/mach/flash.h>
18
2c799cef 19#include <plat/cpu.h>
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20#include <plat/nand.h>
21#include <plat/board.h>
22#include <plat/gpmc.h>
23
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24static struct resource gpmc_nand_resource = {
25 .flags = IORESOURCE_MEM,
26};
27
28static struct platform_device gpmc_nand_device = {
29 .name = "omap2-nand",
30 .id = 0,
31 .num_resources = 1,
32 .resource = &gpmc_nand_resource,
33};
34
7a559c78 35static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
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36{
37 struct gpmc_timings t;
38 int err;
39
11e1ef2d 40 if (!gpmc_nand_data->gpmc_t)
41 return 0;
42
2f70a1e9 43 memset(&t, 0, sizeof(t));
a3551f5b 44 t.sync_clk = gpmc_nand_data->gpmc_t->sync_clk;
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45 t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on);
46 t.adv_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->adv_on);
47
48 /* Read */
49 t.adv_rd_off = gpmc_round_ns_to_ticks(
50 gpmc_nand_data->gpmc_t->adv_rd_off);
51 t.oe_on = t.adv_on;
52 t.access = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->access);
53 t.oe_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->oe_off);
54 t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_rd_off);
55 t.rd_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->rd_cycle);
56
57 /* Write */
58 t.adv_wr_off = gpmc_round_ns_to_ticks(
59 gpmc_nand_data->gpmc_t->adv_wr_off);
60 t.we_on = t.oe_on;
61 if (cpu_is_omap34xx()) {
62 t.wr_data_mux_bus = gpmc_round_ns_to_ticks(
63 gpmc_nand_data->gpmc_t->wr_data_mux_bus);
64 t.wr_access = gpmc_round_ns_to_ticks(
65 gpmc_nand_data->gpmc_t->wr_access);
66 }
67 t.we_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->we_off);
68 t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_wr_off);
69 t.wr_cycle = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle);
70
71 /* Configure GPMC */
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72 if (gpmc_nand_data->devsize == NAND_BUSWIDTH_16)
73 gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 1);
74 else
75 gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0);
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76 gpmc_cs_configure(gpmc_nand_data->cs,
77 GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
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78 err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
79 if (err)
80 return err;
81
82 return 0;
83}
84
7a559c78 85int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
2f70a1e9 86{
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87 int err = 0;
88 struct device *dev = &gpmc_nand_device.dev;
89
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90 gpmc_nand_device.dev.platform_data = gpmc_nand_data;
91
92 err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
93 &gpmc_nand_data->phys_base);
94 if (err < 0) {
95 dev_err(dev, "Cannot request GPMC CS\n");
96 return err;
97 }
98
2c01946c 99 /* Set timings in GPMC */
7a559c78 100 err = omap2_nand_gpmc_retime(gpmc_nand_data);
2f70a1e9 101 if (err < 0) {
2c01946c 102 dev_err(dev, "Unable to set gpmc timings: %d\n", err);
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103 return err;
104 }
105
106 /* Enable RD PIN Monitoring Reg */
107 if (gpmc_nand_data->dev_ready) {
2c01946c 108 gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1);
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109 }
110
111 err = platform_device_register(&gpmc_nand_device);
112 if (err < 0) {
113 dev_err(dev, "Unable to register NAND device\n");
114 goto out_free_cs;
115 }
116
117 return 0;
118
119out_free_cs:
120 gpmc_cs_free(gpmc_nand_data->cs);
121
122 return err;
123}
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