[deliverable/linux.git] / arch / arm / mach-omap2 / i2c.c

/*
 * Helper module for board specific I2C bus registration
 *
 * Copyright (C) 2009 Nokia Corporation.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include "soc.h"
#include "common.h"
#include "omap_hwmod.h"
#include "omap_device.h"

#include "mux.h"
#include "i2c.h"

/* In register I2C_CON, Bit 15 is the I2C enable bit */
#define I2C_EN					BIT(15)
#define OMAP2_I2C_CON_OFFSET			0x24
#define OMAP4_I2C_CON_OFFSET			0xA4

/* Maximum microseconds to wait for OMAP module to softreset */
#define MAX_MODULE_SOFTRESET_WAIT	10000

#define MAX_OMAP_I2C_HWMOD_NAME_LEN	16

static void __init omap2_i2c_mux_pins(int bus_id)
{
	char mux_name[sizeof("i2c2_scl.i2c2_scl")];

	/* First I2C bus is not muxable */
	if (bus_id == 1)
		return;

	sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id);
	omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
	sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
	omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
}

/**
 * omap_i2c_reset - reset the omap i2c module.
 * @oh: struct omap_hwmod *
 *
 * The i2c moudle in omap2, omap3 had a special sequence to reset. The
 * sequence is:
 * - Disable the I2C.
 * - Write to SOFTRESET bit.
 * - Enable the I2C.
 * - Poll on the RESETDONE bit.
 * The sequence is implemented in below function. This is called for 2420,
 * 2430 and omap3.
 */
int omap_i2c_reset(struct omap_hwmod *oh)
{
	u32 v;
	u16 i2c_con;
	int c = 0;

	if (oh->class->rev == OMAP_I2C_IP_VERSION_2) {
		i2c_con = OMAP4_I2C_CON_OFFSET;
	} else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) {
		i2c_con = OMAP2_I2C_CON_OFFSET;
	} else {
		WARN(1, "Cannot reset I2C block %s: unsupported revision\n",
		     oh->name);
		return -EINVAL;
	}

	/* Disable I2C */
	v = omap_hwmod_read(oh, i2c_con);
	v &= ~I2C_EN;
	omap_hwmod_write(v, oh, i2c_con);

	/* Write to the SOFTRESET bit */
	omap_hwmod_softreset(oh);

	/* Enable I2C */
	v = omap_hwmod_read(oh, i2c_con);
	v |= I2C_EN;
	omap_hwmod_write(v, oh, i2c_con);

	/* Poll on RESETDONE bit */
	omap_test_timeout((omap_hwmod_read(oh,
				oh->class->sysc->syss_offs)
				& SYSS_RESETDONE_MASK),
				MAX_MODULE_SOFTRESET_WAIT, c);

	if (c == MAX_MODULE_SOFTRESET_WAIT)
		pr_warning("%s: %s: softreset failed (waited %d usec)\n",
			__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
	else
		pr_debug("%s: %s: softreset in %d usec\n", __func__,
			oh->name, c);

	return 0;
}

static const char name[] = "omap_i2c";

int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
				int bus_id)
{
	int l;
	struct omap_hwmod *oh;
	struct platform_device *pdev;
	char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
	struct omap_i2c_bus_platform_data *pdata;
	struct omap_i2c_dev_attr *dev_attr;

	omap2_i2c_mux_pins(bus_id);

	l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
	WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
		"String buffer overflow in I2C%d device setup\n", bus_id);
	oh = omap_hwmod_lookup(oh_name);
	if (!oh) {
			pr_err("Could not look up %s\n", oh_name);
			return -EEXIST;
	}

	pdata = i2c_pdata;
	/*
	 * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
	 * use, and functionality implementation flags, up to the OMAP I2C
	 * driver via platform data
	 */
	pdata->rev = oh->class->rev;

	dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
	pdata->flags = dev_attr->flags;

	pdev = omap_device_build(name, bus_id, oh, pdata,
			sizeof(struct omap_i2c_bus_platform_data),
			NULL, 0, 0);
	WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);

	return PTR_RET(pdev);
}
Commit	Line	Data
b63128e8 TL	1	/*
	2	* Helper module for board specific I2C bus registration
	3	*
	4	* Copyright (C) 2009 Nokia Corporation.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* version 2 as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful, but
	11	* WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	* General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	18	* 02110-1301 USA
	19	*
	20	*/
	21
e4c060db	22	#include "soc.h"
4e65331c	23	#include "common.h"
2a296c8f	24	#include "omap_hwmod.h"
25c7d49e	25	#include "omap_device.h"
b63128e8 TL	26
b63128e8 TL	27	#include "mux.h"
3a8761c0	28	#include "i2c.h"
b63128e8	29
6d3c55fd A	30	/* In register I2C_CON, Bit 15 is the I2C enable bit */
	31	#define I2C_EN BIT(15)
	32	#define OMAP2_I2C_CON_OFFSET 0x24
	33	#define OMAP4_I2C_CON_OFFSET 0xA4
	34
	35	/* Maximum microseconds to wait for OMAP module to softreset */
	36	#define MAX_MODULE_SOFTRESET_WAIT 10000
	37
3a8761c0 TL	38	#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
	39
	40	static void __init omap2_i2c_mux_pins(int bus_id)
b63128e8	41	{
f99bf16d	42	char mux_name[sizeof("i2c2_scl.i2c2_scl")];
b63128e8 TL	43
b63128e8 TL	44	/* First I2C bus is not muxable */
f99bf16d TL	45	if (bus_id == 1)
f99bf16d TL	46	return;
b63128e8	47
f99bf16d TL	48	sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id);
	49	omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
	50	sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
	51	omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
b63128e8	52	}
6d3c55fd A	53
	54	/**
	55	* omap_i2c_reset - reset the omap i2c module.
	56	* @oh: struct omap_hwmod *
	57	*
	58	* The i2c moudle in omap2, omap3 had a special sequence to reset. The
	59	* sequence is:
	60	* - Disable the I2C.
	61	* - Write to SOFTRESET bit.
	62	* - Enable the I2C.
	63	* - Poll on the RESETDONE bit.
	64	* The sequence is implemented in below function. This is called for 2420,
	65	* 2430 and omap3.
	66	*/
	67	int omap_i2c_reset(struct omap_hwmod *oh)
	68	{
	69	u32 v;
	70	u16 i2c_con;
	71	int c = 0;
	72
	73	if (oh->class->rev == OMAP_I2C_IP_VERSION_2) {
	74	i2c_con = OMAP4_I2C_CON_OFFSET;
	75	} else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) {
	76	i2c_con = OMAP2_I2C_CON_OFFSET;
	77	} else {
	78	WARN(1, "Cannot reset I2C block %s: unsupported revision\n",
	79	oh->name);
	80	return -EINVAL;
	81	}
	82
	83	/* Disable I2C */
	84	v = omap_hwmod_read(oh, i2c_con);
	85	v &= ~I2C_EN;
	86	omap_hwmod_write(v, oh, i2c_con);
	87
	88	/* Write to the SOFTRESET bit */
	89	omap_hwmod_softreset(oh);
	90
	91	/* Enable I2C */
	92	v = omap_hwmod_read(oh, i2c_con);
	93	v \|= I2C_EN;
	94	omap_hwmod_write(v, oh, i2c_con);
	95
	96	/* Poll on RESETDONE bit */
	97	omap_test_timeout((omap_hwmod_read(oh,
	98	oh->class->sysc->syss_offs)
	99	& SYSS_RESETDONE_MASK),
	100	MAX_MODULE_SOFTRESET_WAIT, c);
	101
	102	if (c == MAX_MODULE_SOFTRESET_WAIT)
	103	pr_warning("%s: %s: softreset failed (waited %d usec)\n",
	104	__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
	105	else
	106	pr_debug("%s: %s: softreset in %d usec\n", __func__,
	107	oh->name, c);
	108
	109	return 0;
	110	}
3a8761c0 TL	111
	112	static const char name[] = "omap_i2c";
	113
	114	int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
	115	int bus_id)
	116	{
	117	int l;
	118	struct omap_hwmod *oh;
	119	struct platform_device *pdev;
	120	char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
	121	struct omap_i2c_bus_platform_data *pdata;
	122	struct omap_i2c_dev_attr *dev_attr;
	123
	124	omap2_i2c_mux_pins(bus_id);
	125
	126	l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
	127	WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
	128	"String buffer overflow in I2C%d device setup\n", bus_id);
	129	oh = omap_hwmod_lookup(oh_name);
	130	if (!oh) {
	131	pr_err("Could not look up %s\n", oh_name);
	132	return -EEXIST;
	133	}
	134
	135	pdata = i2c_pdata;
	136	/*
	137	* pass the hwmod class's CPU-specific knowledge of I2C IP revision in
	138	* use, and functionality implementation flags, up to the OMAP I2C
	139	* driver via platform data
	140	*/
	141	pdata->rev = oh->class->rev;
	142
	143	dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
	144	pdata->flags = dev_attr->flags;
	145
	146	pdev = omap_device_build(name, bus_id, oh, pdata,
	147	sizeof(struct omap_i2c_bus_platform_data),
	148	NULL, 0, 0);
	149	WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
	150
	151	return PTR_RET(pdev);
	152	}
	153