Commit | Line | Data |
---|---|---|
1dbae815 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap2/id.c | |
3 | * | |
4 | * OMAP2 CPU identification code | |
5 | * | |
6 | * Copyright (C) 2005 Nokia Corporation | |
7 | * Written by Tony Lindgren <tony@atomide.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
1dbae815 TL |
14 | #include <linux/module.h> |
15 | #include <linux/kernel.h> | |
16 | #include <linux/init.h> | |
fced80c7 | 17 | #include <linux/io.h> |
1dbae815 | 18 | |
0ba8b9b2 | 19 | #include <asm/cputype.h> |
1dbae815 | 20 | |
0e564848 | 21 | #include <mach/common.h> |
a09e64fb RK |
22 | #include <mach/control.h> |
23 | #include <mach/cpu.h> | |
72d0f1c3 | 24 | |
097c584c | 25 | static struct omap_chip_id omap_chip; |
84a34344 LL |
26 | static unsigned int omap_revision; |
27 | ||
28 | ||
29 | unsigned int omap_rev(void) | |
30 | { | |
31 | return omap_revision; | |
32 | } | |
33 | EXPORT_SYMBOL(omap_rev); | |
097c584c PW |
34 | |
35 | /** | |
36 | * omap_chip_is - test whether currently running OMAP matches a chip type | |
37 | * @oc: omap_chip_t to test against | |
38 | * | |
39 | * Test whether the currently-running OMAP chip matches the supplied | |
40 | * chip type 'oc'. Returns 1 upon a match; 0 upon failure. | |
41 | */ | |
42 | int omap_chip_is(struct omap_chip_id oci) | |
43 | { | |
44 | return (oci.oc & omap_chip.oc) ? 1 : 0; | |
45 | } | |
46 | EXPORT_SYMBOL(omap_chip_is); | |
47 | ||
a8823143 | 48 | /*----------------------------------------------------------------------------*/ |
097c584c | 49 | |
a8823143 TL |
50 | #define OMAP_TAP_IDCODE 0x0204 |
51 | #define OMAP_TAP_DIE_ID_0 0x0218 | |
52 | #define OMAP_TAP_DIE_ID_1 0x021C | |
53 | #define OMAP_TAP_DIE_ID_2 0x0220 | |
54 | #define OMAP_TAP_DIE_ID_3 0x0224 | |
097c584c | 55 | |
a8823143 | 56 | #define read_tap_reg(reg) __raw_readl(tap_base + (reg)) |
097c584c | 57 | |
a8823143 TL |
58 | struct omap_id { |
59 | u16 hawkeye; /* Silicon type (Hawkeye id) */ | |
60 | u8 dev; /* Device type from production_id reg */ | |
84a34344 | 61 | u32 type; /* Combined type id copied to omap_revision */ |
a8823143 | 62 | }; |
097c584c | 63 | |
a8823143 TL |
64 | /* Register values to detect the OMAP version */ |
65 | static struct omap_id omap_ids[] __initdata = { | |
66 | { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 }, | |
67 | { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 }, | |
68 | { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 }, | |
69 | { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 }, | |
70 | { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 }, | |
71 | { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 }, | |
72 | }; | |
097c584c | 73 | |
a8823143 TL |
74 | static void __iomem *tap_base; |
75 | static u16 tap_prod_id; | |
1dbae815 | 76 | |
5ba02dca | 77 | void __init omap24xx_check_revision(void) |
1dbae815 TL |
78 | { |
79 | int i, j; | |
a8823143 | 80 | u32 idcode, prod_id; |
1dbae815 | 81 | u16 hawkeye; |
a8823143 | 82 | u8 dev_type, rev; |
1dbae815 TL |
83 | |
84 | idcode = read_tap_reg(OMAP_TAP_IDCODE); | |
0e564848 | 85 | prod_id = read_tap_reg(tap_prod_id); |
1dbae815 TL |
86 | hawkeye = (idcode >> 12) & 0xffff; |
87 | rev = (idcode >> 28) & 0x0f; | |
88 | dev_type = (prod_id >> 16) & 0x0f; | |
89 | ||
097c584c PW |
90 | pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n", |
91 | idcode, rev, hawkeye, (idcode >> 1) & 0x7ff); | |
92 | pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", | |
93 | read_tap_reg(OMAP_TAP_DIE_ID_0)); | |
94 | pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n", | |
95 | read_tap_reg(OMAP_TAP_DIE_ID_1), | |
96 | (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf); | |
97 | pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", | |
98 | read_tap_reg(OMAP_TAP_DIE_ID_2)); | |
99 | pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", | |
100 | read_tap_reg(OMAP_TAP_DIE_ID_3)); | |
101 | pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n", | |
102 | prod_id, dev_type); | |
103 | ||
1dbae815 TL |
104 | /* Check hawkeye ids */ |
105 | for (i = 0; i < ARRAY_SIZE(omap_ids); i++) { | |
106 | if (hawkeye == omap_ids[i].hawkeye) | |
107 | break; | |
108 | } | |
109 | ||
110 | if (i == ARRAY_SIZE(omap_ids)) { | |
111 | printk(KERN_ERR "Unknown OMAP CPU id\n"); | |
112 | return; | |
113 | } | |
114 | ||
115 | for (j = i; j < ARRAY_SIZE(omap_ids); j++) { | |
116 | if (dev_type == omap_ids[j].dev) | |
117 | break; | |
118 | } | |
119 | ||
120 | if (j == ARRAY_SIZE(omap_ids)) { | |
121 | printk(KERN_ERR "Unknown OMAP device type. " | |
122 | "Handling it as OMAP%04x\n", | |
123 | omap_ids[i].type >> 16); | |
124 | j = i; | |
125 | } | |
1dbae815 | 126 | |
84a34344 LL |
127 | pr_info("OMAP%04x", omap_rev() >> 16); |
128 | if ((omap_rev() >> 8) & 0x0f) | |
129 | pr_info("ES%x", (omap_rev() >> 12) & 0xf); | |
097c584c | 130 | pr_info("\n"); |
a8823143 TL |
131 | } |
132 | ||
133 | void __init omap34xx_check_revision(void) | |
134 | { | |
135 | u32 cpuid, idcode; | |
136 | u16 hawkeye; | |
137 | u8 rev; | |
138 | char *rev_name = "ES1.0"; | |
139 | ||
140 | /* | |
141 | * We cannot access revision registers on ES1.0. | |
142 | * If the processor type is Cortex-A8 and the revision is 0x0 | |
143 | * it means its Cortex r0p0 which is 3430 ES1.0. | |
144 | */ | |
145 | cpuid = read_cpuid(CPUID_ID); | |
146 | if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { | |
84a34344 | 147 | omap_revision = OMAP3430_REV_ES1_0; |
a8823143 TL |
148 | goto out; |
149 | } | |
150 | ||
151 | /* | |
152 | * Detection for 34xx ES2.0 and above can be done with just | |
153 | * hawkeye and rev. See TRM 1.5.2 Device Identification. | |
154 | * Note that rev does not map directly to our defined processor | |
155 | * revision numbers as ES1.0 uses value 0. | |
156 | */ | |
157 | idcode = read_tap_reg(OMAP_TAP_IDCODE); | |
158 | hawkeye = (idcode >> 12) & 0xffff; | |
159 | rev = (idcode >> 28) & 0xff; | |
097c584c | 160 | |
a8823143 TL |
161 | if (hawkeye == 0xb7ae) { |
162 | switch (rev) { | |
163 | case 0: | |
84a34344 | 164 | omap_revision = OMAP3430_REV_ES2_0; |
a8823143 TL |
165 | rev_name = "ES2.0"; |
166 | break; | |
167 | case 2: | |
84a34344 | 168 | omap_revision = OMAP3430_REV_ES2_1; |
a8823143 TL |
169 | rev_name = "ES2.1"; |
170 | break; | |
171 | case 3: | |
84a34344 | 172 | omap_revision = OMAP3430_REV_ES3_0; |
a8823143 TL |
173 | rev_name = "ES3.0"; |
174 | break; | |
175 | default: | |
176 | /* Use the latest known revision as default */ | |
84a34344 | 177 | omap_revision = OMAP3430_REV_ES3_0; |
a8823143 TL |
178 | rev_name = "Unknown revision\n"; |
179 | } | |
180 | } | |
181 | ||
182 | out: | |
84a34344 | 183 | pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name); |
1dbae815 TL |
184 | } |
185 | ||
a8823143 TL |
186 | /* |
187 | * Try to detect the exact revision of the omap we're running on | |
188 | */ | |
5ba02dca TL |
189 | void __init omap2_check_revision(void) |
190 | { | |
a8823143 TL |
191 | /* |
192 | * At this point we have an idea about the processor revision set | |
193 | * earlier with omap2_set_globals_tap(). | |
194 | */ | |
195 | if (cpu_is_omap24xx()) | |
196 | omap24xx_check_revision(); | |
197 | else if (cpu_is_omap34xx()) | |
198 | omap34xx_check_revision(); | |
199 | else | |
200 | pr_err("OMAP revision unknown, please fix!\n"); | |
201 | ||
202 | /* | |
203 | * OK, now we know the exact revision. Initialize omap_chip bits | |
204 | * for powerdowmain and clockdomain code. | |
205 | */ | |
206 | if (cpu_is_omap243x()) { | |
207 | /* Currently only supports 2430ES2.1 and 2430-all */ | |
208 | omap_chip.oc |= CHIP_IS_OMAP2430; | |
209 | } else if (cpu_is_omap242x()) { | |
210 | /* Currently only supports 2420ES2.1.1 and 2420-all */ | |
211 | omap_chip.oc |= CHIP_IS_OMAP2420; | |
212 | } else if (cpu_is_omap343x()) { | |
213 | omap_chip.oc = CHIP_IS_OMAP3430; | |
84a34344 | 214 | if (omap_rev() == OMAP3430_REV_ES1_0) |
a8823143 | 215 | omap_chip.oc |= CHIP_IS_OMAP3430ES1; |
84a34344 | 216 | else if (omap_rev() > OMAP3430_REV_ES1_0) |
a8823143 TL |
217 | omap_chip.oc |= CHIP_IS_OMAP3430ES2; |
218 | } else { | |
219 | pr_err("Uninitialized omap_chip, please fix!\n"); | |
220 | } | |
5ba02dca TL |
221 | } |
222 | ||
a8823143 TL |
223 | /* |
224 | * Set up things for map_io and processor detection later on. Gets called | |
225 | * pretty much first thing from board init. For multi-omap, this gets | |
226 | * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to | |
227 | * detect the exact revision later on in omap2_detect_revision() once map_io | |
228 | * is done. | |
229 | */ | |
0e564848 TL |
230 | void __init omap2_set_globals_tap(struct omap_globals *omap2_globals) |
231 | { | |
84a34344 | 232 | omap_revision = omap2_globals->class; |
0e564848 TL |
233 | tap_base = omap2_globals->tap; |
234 | ||
a8823143 | 235 | if (cpu_is_omap34xx()) |
0e564848 TL |
236 | tap_prod_id = 0x0210; |
237 | else | |
238 | tap_prod_id = 0x0208; | |
239 | } |