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1dbae815 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap2/io.c | |
3 | * | |
4 | * OMAP2 I/O mapping code | |
5 | * | |
6 | * Copyright (C) 2005 Nokia Corporation | |
646e3ed1 TL |
7 | * Copyright (C) 2007 Texas Instruments |
8 | * | |
9 | * Author: | |
10 | * Juha Yrjola <juha.yrjola@nokia.com> | |
11 | * Syed Khasim <x0khasim@ti.com> | |
1dbae815 TL |
12 | * |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License version 2 as | |
15 | * published by the Free Software Foundation. | |
16 | */ | |
17 | ||
1dbae815 TL |
18 | #include <linux/module.h> |
19 | #include <linux/kernel.h> | |
20 | #include <linux/init.h> | |
fced80c7 | 21 | #include <linux/io.h> |
1dbae815 | 22 | |
120db2cb | 23 | #include <asm/tlb.h> |
120db2cb TL |
24 | |
25 | #include <asm/mach/map.h> | |
26 | ||
a09e64fb RK |
27 | #include <mach/mux.h> |
28 | #include <mach/omapfb.h> | |
646e3ed1 | 29 | #include <mach/sram.h> |
f8de9b2c PW |
30 | #include <mach/sdrc.h> |
31 | #include <mach/gpmc.h> | |
646e3ed1 TL |
32 | |
33 | #include "clock.h" | |
1dbae815 | 34 | |
9717100f PW |
35 | #include <mach/powerdomain.h> |
36 | ||
37 | #include "powerdomains.h" | |
1dbae815 | 38 | |
801954d3 PW |
39 | #include <mach/clockdomain.h> |
40 | #include "clockdomains.h" | |
1dbae815 TL |
41 | |
42 | /* | |
43 | * The machine specific code may provide the extra mapping besides the | |
44 | * default mapping provided here. | |
45 | */ | |
cc26b3b0 SMK |
46 | |
47 | #ifdef CONFIG_ARCH_OMAP24XX | |
48 | static struct map_desc omap24xx_io_desc[] __initdata = { | |
1dbae815 TL |
49 | { |
50 | .virtual = L3_24XX_VIRT, | |
51 | .pfn = __phys_to_pfn(L3_24XX_PHYS), | |
52 | .length = L3_24XX_SIZE, | |
53 | .type = MT_DEVICE | |
54 | }, | |
09f21ed4 | 55 | { |
cc26b3b0 SMK |
56 | .virtual = L4_24XX_VIRT, |
57 | .pfn = __phys_to_pfn(L4_24XX_PHYS), | |
58 | .length = L4_24XX_SIZE, | |
59 | .type = MT_DEVICE | |
09f21ed4 | 60 | }, |
cc26b3b0 SMK |
61 | }; |
62 | ||
63 | #ifdef CONFIG_ARCH_OMAP2420 | |
64 | static struct map_desc omap242x_io_desc[] __initdata = { | |
65 | { | |
66 | .virtual = DSP_MEM_24XX_VIRT, | |
67 | .pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS), | |
68 | .length = DSP_MEM_24XX_SIZE, | |
69 | .type = MT_DEVICE | |
70 | }, | |
71 | { | |
72 | .virtual = DSP_IPI_24XX_VIRT, | |
73 | .pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS), | |
74 | .length = DSP_IPI_24XX_SIZE, | |
75 | .type = MT_DEVICE | |
09f21ed4 | 76 | }, |
cc26b3b0 SMK |
77 | { |
78 | .virtual = DSP_MMU_24XX_VIRT, | |
79 | .pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS), | |
80 | .length = DSP_MMU_24XX_SIZE, | |
81 | .type = MT_DEVICE | |
82 | }, | |
83 | }; | |
84 | ||
85 | #endif | |
86 | ||
72d0f1c3 | 87 | #ifdef CONFIG_ARCH_OMAP2430 |
cc26b3b0 | 88 | static struct map_desc omap243x_io_desc[] __initdata = { |
72d0f1c3 SMK |
89 | { |
90 | .virtual = L4_WK_243X_VIRT, | |
91 | .pfn = __phys_to_pfn(L4_WK_243X_PHYS), | |
92 | .length = L4_WK_243X_SIZE, | |
93 | .type = MT_DEVICE | |
94 | }, | |
95 | { | |
96 | .virtual = OMAP243X_GPMC_VIRT, | |
97 | .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS), | |
98 | .length = OMAP243X_GPMC_SIZE, | |
99 | .type = MT_DEVICE | |
100 | }, | |
cc26b3b0 SMK |
101 | { |
102 | .virtual = OMAP243X_SDRC_VIRT, | |
103 | .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS), | |
104 | .length = OMAP243X_SDRC_SIZE, | |
105 | .type = MT_DEVICE | |
106 | }, | |
107 | { | |
108 | .virtual = OMAP243X_SMS_VIRT, | |
109 | .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS), | |
110 | .length = OMAP243X_SMS_SIZE, | |
111 | .type = MT_DEVICE | |
112 | }, | |
113 | }; | |
72d0f1c3 | 114 | #endif |
72d0f1c3 | 115 | #endif |
cc26b3b0 SMK |
116 | |
117 | #ifdef CONFIG_ARCH_OMAP34XX | |
118 | static struct map_desc omap34xx_io_desc[] __initdata = { | |
1dbae815 | 119 | { |
cc26b3b0 SMK |
120 | .virtual = L3_34XX_VIRT, |
121 | .pfn = __phys_to_pfn(L3_34XX_PHYS), | |
122 | .length = L3_34XX_SIZE, | |
c40fae95 TL |
123 | .type = MT_DEVICE |
124 | }, | |
125 | { | |
cc26b3b0 SMK |
126 | .virtual = L4_34XX_VIRT, |
127 | .pfn = __phys_to_pfn(L4_34XX_PHYS), | |
128 | .length = L4_34XX_SIZE, | |
c40fae95 TL |
129 | .type = MT_DEVICE |
130 | }, | |
131 | { | |
cc26b3b0 SMK |
132 | .virtual = L4_WK_34XX_VIRT, |
133 | .pfn = __phys_to_pfn(L4_WK_34XX_PHYS), | |
134 | .length = L4_WK_34XX_SIZE, | |
135 | .type = MT_DEVICE | |
136 | }, | |
137 | { | |
138 | .virtual = OMAP34XX_GPMC_VIRT, | |
139 | .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS), | |
140 | .length = OMAP34XX_GPMC_SIZE, | |
1dbae815 | 141 | .type = MT_DEVICE |
cc26b3b0 SMK |
142 | }, |
143 | { | |
144 | .virtual = OMAP343X_SMS_VIRT, | |
145 | .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS), | |
146 | .length = OMAP343X_SMS_SIZE, | |
147 | .type = MT_DEVICE | |
148 | }, | |
149 | { | |
150 | .virtual = OMAP343X_SDRC_VIRT, | |
151 | .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS), | |
152 | .length = OMAP343X_SDRC_SIZE, | |
1dbae815 | 153 | .type = MT_DEVICE |
cc26b3b0 SMK |
154 | }, |
155 | { | |
156 | .virtual = L4_PER_34XX_VIRT, | |
157 | .pfn = __phys_to_pfn(L4_PER_34XX_PHYS), | |
158 | .length = L4_PER_34XX_SIZE, | |
159 | .type = MT_DEVICE | |
160 | }, | |
161 | { | |
162 | .virtual = L4_EMU_34XX_VIRT, | |
163 | .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS), | |
164 | .length = L4_EMU_34XX_SIZE, | |
165 | .type = MT_DEVICE | |
166 | }, | |
1dbae815 | 167 | }; |
cc26b3b0 | 168 | #endif |
1dbae815 | 169 | |
120db2cb | 170 | void __init omap2_map_common_io(void) |
1dbae815 | 171 | { |
cc26b3b0 SMK |
172 | #if defined(CONFIG_ARCH_OMAP2420) |
173 | iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); | |
174 | iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); | |
175 | #endif | |
176 | ||
177 | #if defined(CONFIG_ARCH_OMAP2430) | |
178 | iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); | |
179 | iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); | |
180 | #endif | |
181 | ||
182 | #if defined(CONFIG_ARCH_OMAP34XX) | |
183 | iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); | |
184 | #endif | |
120db2cb TL |
185 | |
186 | /* Normally devicemaps_init() would flush caches and tlb after | |
187 | * mdesc->map_io(), but we must also do it here because of the CPU | |
188 | * revision check below. | |
189 | */ | |
190 | local_flush_tlb_all(); | |
191 | flush_cache_all(); | |
192 | ||
1dbae815 TL |
193 | omap2_check_revision(); |
194 | omap_sram_init(); | |
b7cc6d46 | 195 | omapfb_reserve_sdram(); |
120db2cb TL |
196 | } |
197 | ||
87246b75 | 198 | void __init omap2_init_common_hw(struct omap_sdrc_params *sp) |
120db2cb | 199 | { |
1dbae815 | 200 | omap2_mux_init(); |
9717100f | 201 | pwrdm_init(powerdomains_omap); |
801954d3 | 202 | clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); |
1dbae815 | 203 | omap2_clk_init(); |
87246b75 | 204 | omap2_sdrc_init(sp); |
4bbbc1ad | 205 | gpmc_init(); |
1dbae815 | 206 | } |