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78673bc8 EV |
1 | /* |
2 | * linux/arch/arm/mach-omap2/mcbsp.c | |
3 | * | |
4 | * Copyright (C) 2008 Instituto Nokia de Tecnologia | |
5 | * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * Multichannel mode not supported. | |
12 | */ | |
13 | #include <linux/module.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/clk.h> | |
16 | #include <linux/err.h> | |
17 | #include <linux/io.h> | |
18 | #include <linux/platform_device.h> | |
5a0e3ad6 | 19 | #include <linux/slab.h> |
78673bc8 | 20 | |
dd7667aa | 21 | #include <mach/irqs.h> |
ce491cf8 | 22 | #include <plat/dma.h> |
ce491cf8 TL |
23 | #include <plat/cpu.h> |
24 | #include <plat/mcbsp.h> | |
64bcbd33 | 25 | #include <plat/omap_device.h> |
e95496d4 | 26 | #include <linux/pm_runtime.h> |
4814ced5 PW |
27 | |
28 | #include "control.h" | |
29 | ||
cf4c87ab PW |
30 | /* McBSP internal signal muxing functions */ |
31 | ||
32 | void omap2_mcbsp1_mux_clkr_src(u8 mux) | |
33 | { | |
34 | u32 v; | |
35 | ||
36 | v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | |
37 | if (mux == CLKR_SRC_CLKR) | |
425925dd | 38 | v &= ~OMAP2_MCBSP1_CLKR_MASK; |
cf4c87ab PW |
39 | else if (mux == CLKR_SRC_CLKX) |
40 | v |= OMAP2_MCBSP1_CLKR_MASK; | |
41 | omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); | |
42 | } | |
43 | EXPORT_SYMBOL(omap2_mcbsp1_mux_clkr_src); | |
44 | ||
45 | void omap2_mcbsp1_mux_fsr_src(u8 mux) | |
46 | { | |
47 | u32 v; | |
48 | ||
49 | v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | |
50 | if (mux == FSR_SRC_FSR) | |
425925dd | 51 | v &= ~OMAP2_MCBSP1_FSR_MASK; |
cf4c87ab PW |
52 | else if (mux == FSR_SRC_FSX) |
53 | v |= OMAP2_MCBSP1_FSR_MASK; | |
54 | omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); | |
55 | } | |
56 | EXPORT_SYMBOL(omap2_mcbsp1_mux_fsr_src); | |
57 | ||
d1358657 PW |
58 | /* McBSP CLKS source switching function */ |
59 | ||
60 | int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id) | |
61 | { | |
62 | struct omap_mcbsp *mcbsp; | |
63 | struct clk *fck_src; | |
64 | char *fck_src_name; | |
65 | int r; | |
66 | ||
67 | if (!omap_mcbsp_check_valid_id(id)) { | |
68 | pr_err("%s: Invalid id (%d)\n", __func__, id + 1); | |
69 | return -EINVAL; | |
70 | } | |
71 | mcbsp = id_to_mcbsp_ptr(id); | |
72 | ||
73 | if (fck_src_id == MCBSP_CLKS_PAD_SRC) | |
74 | fck_src_name = "pad_fck"; | |
75 | else if (fck_src_id == MCBSP_CLKS_PRCM_SRC) | |
76 | fck_src_name = "prcm_fck"; | |
77 | else | |
78 | return -EINVAL; | |
79 | ||
80 | fck_src = clk_get(mcbsp->dev, fck_src_name); | |
81 | if (IS_ERR_OR_NULL(fck_src)) { | |
82 | pr_err("omap-mcbsp: %s: could not clk_get() %s\n", "clks", | |
83 | fck_src_name); | |
84 | return -EINVAL; | |
85 | } | |
86 | ||
e95496d4 | 87 | pm_runtime_put_sync(mcbsp->dev); |
d1358657 PW |
88 | |
89 | r = clk_set_parent(mcbsp->fclk, fck_src); | |
90 | if (IS_ERR_VALUE(r)) { | |
91 | pr_err("omap-mcbsp: %s: could not clk_set_parent() to %s\n", | |
92 | "clks", fck_src_name); | |
93 | clk_put(fck_src); | |
94 | return -EINVAL; | |
95 | } | |
96 | ||
e95496d4 | 97 | pm_runtime_get_sync(mcbsp->dev); |
d1358657 PW |
98 | |
99 | clk_put(fck_src); | |
100 | ||
101 | return 0; | |
102 | } | |
103 | EXPORT_SYMBOL(omap2_mcbsp_set_clks_src); | |
104 | ||
64bcbd33 | 105 | struct omap_device_pm_latency omap2_mcbsp_latency[] = { |
78673bc8 | 106 | { |
64bcbd33 KVA |
107 | .deactivate_func = omap_device_idle_hwmods, |
108 | .activate_func = omap_device_enable_hwmods, | |
109 | .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, | |
78673bc8 EV |
110 | }, |
111 | }; | |
05228c35 | 112 | |
64bcbd33 KVA |
113 | static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused) |
114 | { | |
115 | int id, count = 1; | |
116 | char *name = "omap-mcbsp"; | |
117 | struct omap_hwmod *oh_device[2]; | |
118 | struct omap_mcbsp_platform_data *pdata = NULL; | |
119 | struct omap_device *od; | |
3cf32bba | 120 | |
64bcbd33 | 121 | sscanf(oh->name, "mcbsp%d", &id); |
78673bc8 | 122 | |
64bcbd33 KVA |
123 | pdata = kzalloc(sizeof(struct omap_mcbsp_platform_data), GFP_KERNEL); |
124 | if (!pdata) { | |
125 | pr_err("%s: No memory for mcbsp\n", __func__); | |
126 | return -ENOMEM; | |
127 | } | |
3cf32bba | 128 | |
9504ba64 KVA |
129 | pdata->mcbsp_config_type = oh->class->rev; |
130 | ||
64bcbd33 KVA |
131 | if (oh->class->rev == MCBSP_CONFIG_TYPE3) { |
132 | if (id == 2) | |
133 | /* The FIFO has 1024 + 256 locations */ | |
134 | pdata->buffer_size = 0x500; | |
135 | else | |
136 | /* The FIFO has 128 locations */ | |
137 | pdata->buffer_size = 0x80; | |
138 | } | |
3cf32bba | 139 | |
64bcbd33 | 140 | oh_device[0] = oh; |
78673bc8 | 141 | |
64bcbd33 KVA |
142 | if (oh->dev_attr) { |
143 | oh_device[1] = omap_hwmod_lookup(( | |
144 | (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); | |
145 | count++; | |
146 | } | |
147 | od = omap_device_build_ss(name, id, oh_device, count, pdata, | |
148 | sizeof(*pdata), omap2_mcbsp_latency, | |
149 | ARRAY_SIZE(omap2_mcbsp_latency), false); | |
150 | kfree(pdata); | |
151 | if (IS_ERR(od)) { | |
25985edc | 152 | pr_err("%s: Can't build omap_device for %s:%s.\n", __func__, |
64bcbd33 KVA |
153 | name, oh->name); |
154 | return PTR_ERR(od); | |
155 | } | |
156 | omap_mcbsp_count++; | |
157 | return 0; | |
158 | } | |
a5b92cc3 | 159 | |
b4b58f58 | 160 | static int __init omap2_mcbsp_init(void) |
78673bc8 | 161 | { |
64bcbd33 | 162 | omap_hwmod_for_each_by_class("mcbsp", omap_init_mcbsp, NULL); |
b4b58f58 CS |
163 | |
164 | mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), | |
165 | GFP_KERNEL); | |
166 | if (!mcbsp_ptr) | |
167 | return -ENOMEM; | |
168 | ||
78673bc8 EV |
169 | return omap_mcbsp_init(); |
170 | } | |
171 | arch_initcall(omap2_mcbsp_init); |