Commit | Line | Data |
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1dbae815 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap2/mux.c | |
3 | * | |
112485e9 | 4 | * OMAP2, OMAP3 and OMAP4 pin multiplexing configurations |
1dbae815 | 5 | * |
112485e9 | 6 | * Copyright (C) 2004 - 2010 Texas Instruments Inc. |
9330899e | 7 | * Copyright (C) 2003 - 2008 Nokia Corporation |
1dbae815 | 8 | * |
9330899e | 9 | * Written by Tony Lindgren |
1dbae815 TL |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
24 | * | |
25 | */ | |
4814ced5 | 26 | #include <linux/kernel.h> |
1dbae815 | 27 | #include <linux/init.h> |
fced80c7 | 28 | #include <linux/io.h> |
15ac7afe | 29 | #include <linux/list.h> |
4814ced5 | 30 | #include <linux/slab.h> |
4b715efc TL |
31 | #include <linux/ctype.h> |
32 | #include <linux/debugfs.h> | |
33 | #include <linux/seq_file.h> | |
34 | #include <linux/uaccess.h> | |
13a3fe52 TK |
35 | #include <linux/irq.h> |
36 | #include <linux/interrupt.h> | |
1dbae815 | 37 | |
fced80c7 | 38 | |
2a296c8f | 39 | #include "omap_hwmod.h" |
9796b323 | 40 | |
e4c060db | 41 | #include "soc.h" |
4814ced5 | 42 | #include "control.h" |
15ac7afe | 43 | #include "mux.h" |
13a3fe52 | 44 | #include "prm.h" |
65e25976 | 45 | #include "common.h" |
1dbae815 | 46 | |
92c9f501 MR |
47 | #define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ |
48 | #define OMAP_MUX_BASE_SZ 0x5ca | |
49 | ||
15ac7afe TL |
50 | struct omap_mux_entry { |
51 | struct omap_mux mux; | |
52 | struct list_head node; | |
53 | }; | |
54 | ||
112485e9 BC |
55 | static LIST_HEAD(mux_partitions); |
56 | static DEFINE_MUTEX(muxmode_mutex); | |
57 | ||
58 | struct omap_mux_partition *omap_mux_get(const char *name) | |
59 | { | |
60 | struct omap_mux_partition *partition; | |
61 | ||
62 | list_for_each_entry(partition, &mux_partitions, node) { | |
63 | if (!strcmp(name, partition->name)) | |
64 | return partition; | |
65 | } | |
92c9f501 | 66 | |
112485e9 BC |
67 | return NULL; |
68 | } | |
69 | ||
70 | u16 omap_mux_read(struct omap_mux_partition *partition, u16 reg) | |
92c9f501 | 71 | { |
112485e9 BC |
72 | if (partition->flags & OMAP_MUX_REG_8BIT) |
73 | return __raw_readb(partition->base + reg); | |
92c9f501 | 74 | else |
112485e9 | 75 | return __raw_readw(partition->base + reg); |
92c9f501 MR |
76 | } |
77 | ||
112485e9 BC |
78 | void omap_mux_write(struct omap_mux_partition *partition, u16 val, |
79 | u16 reg) | |
92c9f501 | 80 | { |
112485e9 BC |
81 | if (partition->flags & OMAP_MUX_REG_8BIT) |
82 | __raw_writeb(val, partition->base + reg); | |
92c9f501 | 83 | else |
112485e9 | 84 | __raw_writew(val, partition->base + reg); |
92c9f501 | 85 | } |
7d7f665d | 86 | |
112485e9 BC |
87 | void omap_mux_write_array(struct omap_mux_partition *partition, |
88 | struct omap_board_mux *board_mux) | |
d4bb72e5 | 89 | { |
d4ff6121 CC |
90 | if (!board_mux) |
91 | return; | |
92 | ||
112485e9 BC |
93 | while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) { |
94 | omap_mux_write(partition, board_mux->value, | |
95 | board_mux->reg_offset); | |
d4bb72e5 TL |
96 | board_mux++; |
97 | } | |
98 | } | |
99 | ||
15ac7afe TL |
100 | #ifdef CONFIG_OMAP_MUX |
101 | ||
102 | static char *omap_mux_options; | |
103 | ||
d1589f09 TL |
104 | static int __init _omap_mux_init_gpio(struct omap_mux_partition *partition, |
105 | int gpio, int val) | |
15ac7afe TL |
106 | { |
107 | struct omap_mux_entry *e; | |
ca828760 | 108 | struct omap_mux *gpio_mux = NULL; |
8a6f7e14 GI |
109 | u16 old_mode; |
110 | u16 mux_mode; | |
15ac7afe | 111 | int found = 0; |
112485e9 | 112 | struct list_head *muxmodes = &partition->muxmodes; |
15ac7afe TL |
113 | |
114 | if (!gpio) | |
115 | return -EINVAL; | |
116 | ||
112485e9 | 117 | list_for_each_entry(e, muxmodes, node) { |
15ac7afe TL |
118 | struct omap_mux *m = &e->mux; |
119 | if (gpio == m->gpio) { | |
8a6f7e14 | 120 | gpio_mux = m; |
15ac7afe TL |
121 | found++; |
122 | } | |
123 | } | |
124 | ||
8a6f7e14 | 125 | if (found == 0) { |
032a6424 | 126 | pr_err("%s: Could not set gpio%i\n", __func__, gpio); |
8a6f7e14 GI |
127 | return -ENODEV; |
128 | } | |
15ac7afe TL |
129 | |
130 | if (found > 1) { | |
032a6424 | 131 | pr_info("%s: Multiple gpio paths (%d) for gpio%i\n", __func__, |
1cbb3a9a | 132 | found, gpio); |
15ac7afe TL |
133 | return -EINVAL; |
134 | } | |
135 | ||
112485e9 | 136 | old_mode = omap_mux_read(partition, gpio_mux->reg_offset); |
8a6f7e14 | 137 | mux_mode = val & ~(OMAP_MUX_NR_MODES - 1); |
421e8450 | 138 | mux_mode |= partition->gpio; |
032a6424 | 139 | pr_debug("%s: Setting signal %s.gpio%i 0x%04x -> 0x%04x\n", __func__, |
1cbb3a9a | 140 | gpio_mux->muxnames[0], gpio, old_mode, mux_mode); |
112485e9 | 141 | omap_mux_write(partition, mux_mode, gpio_mux->reg_offset); |
15ac7afe | 142 | |
8a6f7e14 | 143 | return 0; |
15ac7afe TL |
144 | } |
145 | ||
d1589f09 | 146 | int __init omap_mux_init_gpio(int gpio, int val) |
112485e9 BC |
147 | { |
148 | struct omap_mux_partition *partition; | |
149 | int ret; | |
150 | ||
151 | list_for_each_entry(partition, &mux_partitions, node) { | |
152 | ret = _omap_mux_init_gpio(partition, gpio, val); | |
153 | if (!ret) | |
154 | return ret; | |
155 | } | |
156 | ||
157 | return -ENODEV; | |
158 | } | |
159 | ||
d1589f09 TL |
160 | static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition, |
161 | const char *muxname, | |
162 | struct omap_mux **found_mux) | |
15ac7afe | 163 | { |
8419fdba | 164 | struct omap_mux *mux = NULL; |
15ac7afe | 165 | struct omap_mux_entry *e; |
5a3b2f7a | 166 | const char *mode_name; |
afb7d709 | 167 | int found = 0, found_mode = 0, mode0_len = 0; |
112485e9 | 168 | struct list_head *muxmodes = &partition->muxmodes; |
15ac7afe TL |
169 | |
170 | mode_name = strchr(muxname, '.'); | |
171 | if (mode_name) { | |
5a3b2f7a | 172 | mode0_len = strlen(muxname) - strlen(mode_name); |
15ac7afe | 173 | mode_name++; |
15ac7afe TL |
174 | } else { |
175 | mode_name = muxname; | |
176 | } | |
177 | ||
112485e9 | 178 | list_for_each_entry(e, muxmodes, node) { |
8419fdba | 179 | char *m0_entry; |
15ac7afe TL |
180 | int i; |
181 | ||
8419fdba TL |
182 | mux = &e->mux; |
183 | m0_entry = mux->muxnames[0]; | |
184 | ||
5a3b2f7a TL |
185 | /* First check for full name in mode0.muxmode format */ |
186 | if (mode0_len && strncmp(muxname, m0_entry, mode0_len)) | |
15ac7afe TL |
187 | continue; |
188 | ||
5a3b2f7a | 189 | /* Then check for muxmode only */ |
15ac7afe | 190 | for (i = 0; i < OMAP_MUX_NR_MODES; i++) { |
8419fdba | 191 | char *mode_cur = mux->muxnames[i]; |
15ac7afe TL |
192 | |
193 | if (!mode_cur) | |
194 | continue; | |
195 | ||
196 | if (!strcmp(mode_name, mode_cur)) { | |
8419fdba | 197 | *found_mux = mux; |
15ac7afe | 198 | found++; |
8419fdba | 199 | found_mode = i; |
15ac7afe TL |
200 | } |
201 | } | |
202 | } | |
203 | ||
8419fdba TL |
204 | if (found == 1) { |
205 | return found_mode; | |
206 | } | |
15ac7afe TL |
207 | |
208 | if (found > 1) { | |
032a6424 | 209 | pr_err("%s: Multiple signal paths (%i) for %s\n", __func__, |
1cbb3a9a | 210 | found, muxname); |
15ac7afe TL |
211 | return -EINVAL; |
212 | } | |
213 | ||
15ac7afe TL |
214 | return -ENODEV; |
215 | } | |
216 | ||
91930652 | 217 | int __init omap_mux_get_by_name(const char *muxname, |
8419fdba TL |
218 | struct omap_mux_partition **found_partition, |
219 | struct omap_mux **found_mux) | |
112485e9 BC |
220 | { |
221 | struct omap_mux_partition *partition; | |
112485e9 BC |
222 | |
223 | list_for_each_entry(partition, &mux_partitions, node) { | |
8419fdba TL |
224 | struct omap_mux *mux = NULL; |
225 | int mux_mode = _omap_mux_get_by_name(partition, muxname, &mux); | |
226 | if (mux_mode < 0) | |
227 | continue; | |
228 | ||
229 | *found_partition = partition; | |
230 | *found_mux = mux; | |
231 | ||
232 | return mux_mode; | |
112485e9 BC |
233 | } |
234 | ||
39bb356e RB |
235 | pr_err("%s: Could not find signal %s\n", __func__, muxname); |
236 | ||
112485e9 | 237 | return -ENODEV; |
8419fdba | 238 | } |
112485e9 | 239 | |
d1589f09 | 240 | int __init omap_mux_init_signal(const char *muxname, int val) |
8419fdba TL |
241 | { |
242 | struct omap_mux_partition *partition = NULL; | |
243 | struct omap_mux *mux = NULL; | |
244 | u16 old_mode; | |
245 | int mux_mode; | |
246 | ||
247 | mux_mode = omap_mux_get_by_name(muxname, &partition, &mux); | |
eeb3711b | 248 | if (mux_mode < 0 || !mux) |
8419fdba TL |
249 | return mux_mode; |
250 | ||
251 | old_mode = omap_mux_read(partition, mux->reg_offset); | |
252 | mux_mode |= val; | |
253 | pr_debug("%s: Setting signal %s 0x%04x -> 0x%04x\n", | |
254 | __func__, muxname, old_mode, mux_mode); | |
255 | omap_mux_write(partition, mux_mode, mux->reg_offset); | |
256 | ||
257 | return 0; | |
112485e9 BC |
258 | } |
259 | ||
9796b323 TL |
260 | struct omap_hwmod_mux_info * __init |
261 | omap_hwmod_mux_init(struct omap_device_pad *bpads, int nr_pads) | |
262 | { | |
263 | struct omap_hwmod_mux_info *hmux; | |
029268e4 | 264 | int i, nr_pads_dynamic = 0; |
9796b323 TL |
265 | |
266 | if (!bpads || nr_pads < 1) | |
267 | return NULL; | |
268 | ||
269 | hmux = kzalloc(sizeof(struct omap_hwmod_mux_info), GFP_KERNEL); | |
270 | if (!hmux) | |
271 | goto err1; | |
272 | ||
273 | hmux->nr_pads = nr_pads; | |
274 | ||
275 | hmux->pads = kzalloc(sizeof(struct omap_device_pad) * | |
276 | nr_pads, GFP_KERNEL); | |
277 | if (!hmux->pads) | |
278 | goto err2; | |
279 | ||
280 | for (i = 0; i < hmux->nr_pads; i++) { | |
281 | struct omap_mux_partition *partition; | |
282 | struct omap_device_pad *bpad = &bpads[i], *pad = &hmux->pads[i]; | |
283 | struct omap_mux *mux; | |
284 | int mux_mode; | |
285 | ||
286 | mux_mode = omap_mux_get_by_name(bpad->name, &partition, &mux); | |
287 | if (mux_mode < 0) | |
288 | goto err3; | |
289 | if (!pad->partition) | |
290 | pad->partition = partition; | |
291 | if (!pad->mux) | |
292 | pad->mux = mux; | |
293 | ||
294 | pad->name = kzalloc(strlen(bpad->name) + 1, GFP_KERNEL); | |
295 | if (!pad->name) { | |
296 | int j; | |
297 | ||
298 | for (j = i - 1; j >= 0; j--) | |
299 | kfree(hmux->pads[j].name); | |
300 | goto err3; | |
301 | } | |
302 | strcpy(pad->name, bpad->name); | |
303 | ||
304 | pad->flags = bpad->flags; | |
305 | pad->enable = bpad->enable; | |
306 | pad->idle = bpad->idle; | |
307 | pad->off = bpad->off; | |
029268e4 | 308 | |
96dc19fd PW |
309 | if (pad->flags & |
310 | (OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP)) | |
029268e4 TL |
311 | nr_pads_dynamic++; |
312 | ||
9796b323 TL |
313 | pr_debug("%s: Initialized %s\n", __func__, pad->name); |
314 | } | |
315 | ||
029268e4 TL |
316 | if (!nr_pads_dynamic) |
317 | return hmux; | |
318 | ||
319 | /* | |
320 | * Add pads that need dynamic muxing into a separate list | |
321 | */ | |
322 | ||
323 | hmux->nr_pads_dynamic = nr_pads_dynamic; | |
324 | hmux->pads_dynamic = kzalloc(sizeof(struct omap_device_pad *) * | |
325 | nr_pads_dynamic, GFP_KERNEL); | |
326 | if (!hmux->pads_dynamic) { | |
327 | pr_err("%s: Could not allocate dynamic pads\n", __func__); | |
328 | return hmux; | |
329 | } | |
330 | ||
331 | nr_pads_dynamic = 0; | |
332 | for (i = 0; i < hmux->nr_pads; i++) { | |
333 | struct omap_device_pad *pad = &hmux->pads[i]; | |
334 | ||
96dc19fd PW |
335 | if (pad->flags & |
336 | (OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP)) { | |
029268e4 TL |
337 | pr_debug("%s: pad %s tagged dynamic\n", |
338 | __func__, pad->name); | |
339 | hmux->pads_dynamic[nr_pads_dynamic] = pad; | |
340 | nr_pads_dynamic++; | |
341 | } | |
342 | } | |
343 | ||
9796b323 TL |
344 | return hmux; |
345 | ||
346 | err3: | |
347 | kfree(hmux->pads); | |
348 | err2: | |
349 | kfree(hmux); | |
350 | err1: | |
351 | pr_err("%s: Could not allocate device mux entry\n", __func__); | |
352 | ||
353 | return NULL; | |
354 | } | |
355 | ||
13a3fe52 TK |
356 | /** |
357 | * omap_hwmod_mux_scan_wakeups - omap hwmod scan wakeup pads | |
358 | * @hmux: Pads for a hwmod | |
359 | * @mpu_irqs: MPU irq array for a hwmod | |
360 | * | |
361 | * Scans the wakeup status of pads for a single hwmod. If an irq | |
362 | * array is defined for this mux, the parser will call the registered | |
363 | * ISRs for corresponding pads, otherwise the parser will stop at the | |
364 | * first wakeup active pad and return. Returns true if there is a | |
365 | * pending and non-served wakeup event for the mux, otherwise false. | |
366 | */ | |
367 | static bool omap_hwmod_mux_scan_wakeups(struct omap_hwmod_mux_info *hmux, | |
368 | struct omap_hwmod_irq_info *mpu_irqs) | |
369 | { | |
370 | int i, irq; | |
371 | unsigned int val; | |
372 | u32 handled_irqs = 0; | |
373 | ||
374 | for (i = 0; i < hmux->nr_pads_dynamic; i++) { | |
375 | struct omap_device_pad *pad = hmux->pads_dynamic[i]; | |
376 | ||
377 | if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP) || | |
378 | !(pad->idle & OMAP_WAKEUP_EN)) | |
379 | continue; | |
380 | ||
381 | val = omap_mux_read(pad->partition, pad->mux->reg_offset); | |
382 | if (!(val & OMAP_WAKEUP_EVENT)) | |
383 | continue; | |
384 | ||
385 | if (!hmux->irqs) | |
386 | return true; | |
387 | ||
388 | irq = hmux->irqs[i]; | |
389 | /* make sure we only handle each irq once */ | |
390 | if (handled_irqs & 1 << irq) | |
391 | continue; | |
392 | ||
393 | handled_irqs |= 1 << irq; | |
394 | ||
395 | generic_handle_irq(mpu_irqs[irq].irq); | |
396 | } | |
397 | ||
398 | return false; | |
399 | } | |
400 | ||
401 | /** | |
402 | * _omap_hwmod_mux_handle_irq - Process wakeup events for a single hwmod | |
403 | * | |
404 | * Checks a single hwmod for every wakeup capable pad to see if there is an | |
405 | * active wakeup event. If this is the case, call the corresponding ISR. | |
406 | */ | |
407 | static int _omap_hwmod_mux_handle_irq(struct omap_hwmod *oh, void *data) | |
408 | { | |
409 | if (!oh->mux || !oh->mux->enabled) | |
410 | return 0; | |
411 | if (omap_hwmod_mux_scan_wakeups(oh->mux, oh->mpu_irqs)) | |
412 | generic_handle_irq(oh->mpu_irqs[0].irq); | |
413 | return 0; | |
414 | } | |
415 | ||
416 | /** | |
417 | * omap_hwmod_mux_handle_irq - Process pad wakeup irqs. | |
418 | * | |
419 | * Calls a function for each registered omap_hwmod to check | |
420 | * pad wakeup statuses. | |
421 | */ | |
422 | static irqreturn_t omap_hwmod_mux_handle_irq(int irq, void *unused) | |
423 | { | |
424 | omap_hwmod_for_each(_omap_hwmod_mux_handle_irq, NULL); | |
425 | return IRQ_HANDLED; | |
426 | } | |
427 | ||
8d9af88f TL |
428 | /* Assumes the calling function takes care of locking */ |
429 | void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state) | |
430 | { | |
431 | int i; | |
432 | ||
029268e4 TL |
433 | /* Runtime idling of dynamic pads */ |
434 | if (state == _HWMOD_STATE_IDLE && hmux->enabled) { | |
435 | for (i = 0; i < hmux->nr_pads_dynamic; i++) { | |
436 | struct omap_device_pad *pad = hmux->pads_dynamic[i]; | |
437 | int val = -EINVAL; | |
438 | ||
029268e4 TL |
439 | val = pad->idle; |
440 | omap_mux_write(pad->partition, val, | |
441 | pad->mux->reg_offset); | |
442 | } | |
443 | ||
444 | return; | |
445 | } | |
446 | ||
447 | /* Runtime enabling of dynamic pads */ | |
86c79bf4 S |
448 | if ((state == _HWMOD_STATE_ENABLED) && hmux->pads_dynamic |
449 | && hmux->enabled) { | |
029268e4 TL |
450 | for (i = 0; i < hmux->nr_pads_dynamic; i++) { |
451 | struct omap_device_pad *pad = hmux->pads_dynamic[i]; | |
452 | int val = -EINVAL; | |
453 | ||
029268e4 TL |
454 | val = pad->enable; |
455 | omap_mux_write(pad->partition, val, | |
456 | pad->mux->reg_offset); | |
029268e4 TL |
457 | } |
458 | ||
86c79bf4 | 459 | return; |
029268e4 TL |
460 | } |
461 | ||
462 | /* Enabling or disabling of all pads */ | |
8d9af88f TL |
463 | for (i = 0; i < hmux->nr_pads; i++) { |
464 | struct omap_device_pad *pad = &hmux->pads[i]; | |
465 | int flags, val = -EINVAL; | |
466 | ||
467 | flags = pad->flags; | |
468 | ||
469 | switch (state) { | |
470 | case _HWMOD_STATE_ENABLED: | |
8d9af88f TL |
471 | val = pad->enable; |
472 | pr_debug("%s: Enabling %s %x\n", __func__, | |
473 | pad->name, val); | |
474 | break; | |
8d9af88f | 475 | case _HWMOD_STATE_DISABLED: |
8d9af88f TL |
476 | /* Use safe mode unless OMAP_DEVICE_PAD_REMUX */ |
477 | if (flags & OMAP_DEVICE_PAD_REMUX) | |
478 | val = pad->off; | |
479 | else | |
480 | val = OMAP_MUX_MODE7; | |
8d9af88f TL |
481 | pr_debug("%s: Disabling %s %x\n", __func__, |
482 | pad->name, val); | |
86c79bf4 S |
483 | break; |
484 | default: | |
485 | /* Nothing to be done */ | |
486 | break; | |
c09fcc43 | 487 | } |
8d9af88f TL |
488 | |
489 | if (val >= 0) { | |
490 | omap_mux_write(pad->partition, val, | |
491 | pad->mux->reg_offset); | |
492 | pad->flags = flags; | |
493 | } | |
494 | } | |
029268e4 TL |
495 | |
496 | if (state == _HWMOD_STATE_ENABLED) | |
497 | hmux->enabled = true; | |
498 | else | |
499 | hmux->enabled = false; | |
8d9af88f TL |
500 | } |
501 | ||
4b715efc TL |
502 | #ifdef CONFIG_DEBUG_FS |
503 | ||
504 | #define OMAP_MUX_MAX_NR_FLAGS 10 | |
505 | #define OMAP_MUX_TEST_FLAG(val, mask) \ | |
506 | if (((val) & (mask)) == (mask)) { \ | |
507 | i++; \ | |
508 | flags[i] = #mask; \ | |
509 | } | |
510 | ||
511 | /* REVISIT: Add checking for non-optimal mux settings */ | |
512 | static inline void omap_mux_decode(struct seq_file *s, u16 val) | |
513 | { | |
514 | char *flags[OMAP_MUX_MAX_NR_FLAGS]; | |
78737ae1 | 515 | char mode[sizeof("OMAP_MUX_MODE") + 1]; |
4b715efc TL |
516 | int i = -1; |
517 | ||
518 | sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7); | |
519 | i++; | |
520 | flags[i] = mode; | |
521 | ||
522 | OMAP_MUX_TEST_FLAG(val, OMAP_PIN_OFF_WAKEUPENABLE); | |
523 | if (val & OMAP_OFF_EN) { | |
524 | if (!(val & OMAP_OFFOUT_EN)) { | |
525 | if (!(val & OMAP_OFF_PULL_UP)) { | |
526 | OMAP_MUX_TEST_FLAG(val, | |
527 | OMAP_PIN_OFF_INPUT_PULLDOWN); | |
528 | } else { | |
529 | OMAP_MUX_TEST_FLAG(val, | |
530 | OMAP_PIN_OFF_INPUT_PULLUP); | |
531 | } | |
532 | } else { | |
533 | if (!(val & OMAP_OFFOUT_VAL)) { | |
534 | OMAP_MUX_TEST_FLAG(val, | |
535 | OMAP_PIN_OFF_OUTPUT_LOW); | |
536 | } else { | |
537 | OMAP_MUX_TEST_FLAG(val, | |
538 | OMAP_PIN_OFF_OUTPUT_HIGH); | |
539 | } | |
540 | } | |
541 | } | |
542 | ||
543 | if (val & OMAP_INPUT_EN) { | |
544 | if (val & OMAP_PULL_ENA) { | |
545 | if (!(val & OMAP_PULL_UP)) { | |
546 | OMAP_MUX_TEST_FLAG(val, | |
547 | OMAP_PIN_INPUT_PULLDOWN); | |
548 | } else { | |
549 | OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT_PULLUP); | |
550 | } | |
551 | } else { | |
552 | OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT); | |
553 | } | |
554 | } else { | |
555 | i++; | |
556 | flags[i] = "OMAP_PIN_OUTPUT"; | |
557 | } | |
558 | ||
559 | do { | |
560 | seq_printf(s, "%s", flags[i]); | |
561 | if (i > 0) | |
562 | seq_printf(s, " | "); | |
563 | } while (i-- > 0); | |
564 | } | |
565 | ||
112485e9 | 566 | #define OMAP_MUX_DEFNAME_LEN 32 |
4b715efc TL |
567 | |
568 | static int omap_mux_dbg_board_show(struct seq_file *s, void *unused) | |
569 | { | |
112485e9 | 570 | struct omap_mux_partition *partition = s->private; |
4b715efc | 571 | struct omap_mux_entry *e; |
112485e9 | 572 | u8 omap_gen = omap_rev() >> 28; |
4b715efc | 573 | |
112485e9 | 574 | list_for_each_entry(e, &partition->muxmodes, node) { |
4b715efc TL |
575 | struct omap_mux *m = &e->mux; |
576 | char m0_def[OMAP_MUX_DEFNAME_LEN]; | |
577 | char *m0_name = m->muxnames[0]; | |
578 | u16 val; | |
579 | int i, mode; | |
580 | ||
581 | if (!m0_name) | |
582 | continue; | |
583 | ||
78737ae1 | 584 | /* REVISIT: Needs to be updated if mode0 names get longer */ |
4b715efc TL |
585 | for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) { |
586 | if (m0_name[i] == '\0') { | |
587 | m0_def[i] = m0_name[i]; | |
588 | break; | |
589 | } | |
590 | m0_def[i] = toupper(m0_name[i]); | |
591 | } | |
112485e9 | 592 | val = omap_mux_read(partition, m->reg_offset); |
4b715efc | 593 | mode = val & OMAP_MUX_MODE7; |
112485e9 BC |
594 | if (mode != 0) |
595 | seq_printf(s, "/* %s */\n", m->muxnames[mode]); | |
596 | ||
597 | /* | |
25985edc | 598 | * XXX: Might be revisited to support differences across |
112485e9 BC |
599 | * same OMAP generation. |
600 | */ | |
601 | seq_printf(s, "OMAP%d_MUX(%s, ", omap_gen, m0_def); | |
4b715efc TL |
602 | omap_mux_decode(s, val); |
603 | seq_printf(s, "),\n"); | |
604 | } | |
605 | ||
606 | return 0; | |
607 | } | |
608 | ||
609 | static int omap_mux_dbg_board_open(struct inode *inode, struct file *file) | |
610 | { | |
112485e9 | 611 | return single_open(file, omap_mux_dbg_board_show, inode->i_private); |
4b715efc TL |
612 | } |
613 | ||
614 | static const struct file_operations omap_mux_dbg_board_fops = { | |
615 | .open = omap_mux_dbg_board_open, | |
616 | .read = seq_read, | |
617 | .llseek = seq_lseek, | |
618 | .release = single_release, | |
619 | }; | |
620 | ||
112485e9 BC |
621 | static struct omap_mux_partition *omap_mux_get_partition(struct omap_mux *mux) |
622 | { | |
623 | struct omap_mux_partition *partition; | |
624 | ||
625 | list_for_each_entry(partition, &mux_partitions, node) { | |
626 | struct list_head *muxmodes = &partition->muxmodes; | |
627 | struct omap_mux_entry *e; | |
628 | ||
629 | list_for_each_entry(e, muxmodes, node) { | |
630 | struct omap_mux *m = &e->mux; | |
631 | ||
632 | if (m == mux) | |
633 | return partition; | |
634 | } | |
635 | } | |
636 | ||
637 | return NULL; | |
638 | } | |
639 | ||
4b715efc TL |
640 | static int omap_mux_dbg_signal_show(struct seq_file *s, void *unused) |
641 | { | |
642 | struct omap_mux *m = s->private; | |
112485e9 | 643 | struct omap_mux_partition *partition; |
4b715efc TL |
644 | const char *none = "NA"; |
645 | u16 val; | |
646 | int mode; | |
647 | ||
112485e9 BC |
648 | partition = omap_mux_get_partition(m); |
649 | if (!partition) | |
650 | return 0; | |
651 | ||
652 | val = omap_mux_read(partition, m->reg_offset); | |
4b715efc TL |
653 | mode = val & OMAP_MUX_MODE7; |
654 | ||
112485e9 | 655 | seq_printf(s, "name: %s.%s (0x%08x/0x%03x = 0x%04x), b %s, t %s\n", |
4b715efc | 656 | m->muxnames[0], m->muxnames[mode], |
112485e9 | 657 | partition->phys + m->reg_offset, m->reg_offset, val, |
4b715efc TL |
658 | m->balls[0] ? m->balls[0] : none, |
659 | m->balls[1] ? m->balls[1] : none); | |
660 | seq_printf(s, "mode: "); | |
661 | omap_mux_decode(s, val); | |
662 | seq_printf(s, "\n"); | |
663 | seq_printf(s, "signals: %s | %s | %s | %s | %s | %s | %s | %s\n", | |
664 | m->muxnames[0] ? m->muxnames[0] : none, | |
665 | m->muxnames[1] ? m->muxnames[1] : none, | |
666 | m->muxnames[2] ? m->muxnames[2] : none, | |
667 | m->muxnames[3] ? m->muxnames[3] : none, | |
668 | m->muxnames[4] ? m->muxnames[4] : none, | |
669 | m->muxnames[5] ? m->muxnames[5] : none, | |
670 | m->muxnames[6] ? m->muxnames[6] : none, | |
671 | m->muxnames[7] ? m->muxnames[7] : none); | |
672 | ||
673 | return 0; | |
674 | } | |
675 | ||
676 | #define OMAP_MUX_MAX_ARG_CHAR 7 | |
677 | ||
678 | static ssize_t omap_mux_dbg_signal_write(struct file *file, | |
112485e9 BC |
679 | const char __user *user_buf, |
680 | size_t count, loff_t *ppos) | |
4b715efc TL |
681 | { |
682 | char buf[OMAP_MUX_MAX_ARG_CHAR]; | |
683 | struct seq_file *seqf; | |
684 | struct omap_mux *m; | |
685 | unsigned long val; | |
686 | int buf_size, ret; | |
112485e9 | 687 | struct omap_mux_partition *partition; |
4b715efc TL |
688 | |
689 | if (count > OMAP_MUX_MAX_ARG_CHAR) | |
690 | return -EINVAL; | |
691 | ||
692 | memset(buf, 0, sizeof(buf)); | |
693 | buf_size = min(count, sizeof(buf) - 1); | |
694 | ||
695 | if (copy_from_user(buf, user_buf, buf_size)) | |
696 | return -EFAULT; | |
697 | ||
698 | ret = strict_strtoul(buf, 0x10, &val); | |
699 | if (ret < 0) | |
700 | return ret; | |
701 | ||
702 | if (val > 0xffff) | |
703 | return -EINVAL; | |
704 | ||
705 | seqf = file->private_data; | |
706 | m = seqf->private; | |
707 | ||
112485e9 BC |
708 | partition = omap_mux_get_partition(m); |
709 | if (!partition) | |
710 | return -ENODEV; | |
711 | ||
712 | omap_mux_write(partition, (u16)val, m->reg_offset); | |
4b715efc TL |
713 | *ppos += count; |
714 | ||
715 | return count; | |
716 | } | |
717 | ||
718 | static int omap_mux_dbg_signal_open(struct inode *inode, struct file *file) | |
719 | { | |
720 | return single_open(file, omap_mux_dbg_signal_show, inode->i_private); | |
721 | } | |
722 | ||
723 | static const struct file_operations omap_mux_dbg_signal_fops = { | |
724 | .open = omap_mux_dbg_signal_open, | |
725 | .read = seq_read, | |
726 | .write = omap_mux_dbg_signal_write, | |
727 | .llseek = seq_lseek, | |
728 | .release = single_release, | |
729 | }; | |
730 | ||
731 | static struct dentry *mux_dbg_dir; | |
732 | ||
112485e9 BC |
733 | static void __init omap_mux_dbg_create_entry( |
734 | struct omap_mux_partition *partition, | |
735 | struct dentry *mux_dbg_dir) | |
4b715efc TL |
736 | { |
737 | struct omap_mux_entry *e; | |
738 | ||
112485e9 BC |
739 | list_for_each_entry(e, &partition->muxmodes, node) { |
740 | struct omap_mux *m = &e->mux; | |
741 | ||
0fa26ce9 FB |
742 | (void)debugfs_create_file(m->muxnames[0], S_IWUSR | S_IRUGO, |
743 | mux_dbg_dir, m, | |
744 | &omap_mux_dbg_signal_fops); | |
112485e9 BC |
745 | } |
746 | } | |
747 | ||
748 | static void __init omap_mux_dbg_init(void) | |
749 | { | |
750 | struct omap_mux_partition *partition; | |
751 | static struct dentry *mux_dbg_board_dir; | |
752 | ||
4b715efc TL |
753 | mux_dbg_dir = debugfs_create_dir("omap_mux", NULL); |
754 | if (!mux_dbg_dir) | |
755 | return; | |
756 | ||
112485e9 BC |
757 | mux_dbg_board_dir = debugfs_create_dir("board", mux_dbg_dir); |
758 | if (!mux_dbg_board_dir) | |
759 | return; | |
4b715efc | 760 | |
112485e9 BC |
761 | list_for_each_entry(partition, &mux_partitions, node) { |
762 | omap_mux_dbg_create_entry(partition, mux_dbg_dir); | |
763 | (void)debugfs_create_file(partition->name, S_IRUGO, | |
764 | mux_dbg_board_dir, partition, | |
765 | &omap_mux_dbg_board_fops); | |
4b715efc TL |
766 | } |
767 | } | |
768 | ||
769 | #else | |
770 | static inline void omap_mux_dbg_init(void) | |
771 | { | |
772 | } | |
773 | #endif /* CONFIG_DEBUG_FS */ | |
774 | ||
15ac7afe TL |
775 | static void __init omap_mux_free_names(struct omap_mux *m) |
776 | { | |
777 | int i; | |
778 | ||
779 | for (i = 0; i < OMAP_MUX_NR_MODES; i++) | |
780 | kfree(m->muxnames[i]); | |
781 | ||
782 | #ifdef CONFIG_DEBUG_FS | |
783 | for (i = 0; i < OMAP_MUX_NR_SIDES; i++) | |
784 | kfree(m->balls[i]); | |
785 | #endif | |
786 | ||
787 | } | |
788 | ||
789 | /* Free all data except for GPIO pins unless CONFIG_DEBUG_FS is set */ | |
bbd707ac | 790 | int __init omap_mux_late_init(void) |
15ac7afe | 791 | { |
112485e9 | 792 | struct omap_mux_partition *partition; |
13a3fe52 | 793 | int ret; |
15ac7afe | 794 | |
112485e9 BC |
795 | list_for_each_entry(partition, &mux_partitions, node) { |
796 | struct omap_mux_entry *e, *tmp; | |
797 | list_for_each_entry_safe(e, tmp, &partition->muxmodes, node) { | |
798 | struct omap_mux *m = &e->mux; | |
799 | u16 mode = omap_mux_read(partition, m->reg_offset); | |
15ac7afe | 800 | |
421e8450 | 801 | if (OMAP_MODE_GPIO(partition, mode)) |
112485e9 | 802 | continue; |
15ac7afe TL |
803 | |
804 | #ifndef CONFIG_DEBUG_FS | |
112485e9 BC |
805 | mutex_lock(&muxmode_mutex); |
806 | list_del(&e->node); | |
807 | mutex_unlock(&muxmode_mutex); | |
808 | omap_mux_free_names(m); | |
809 | kfree(m); | |
1dbae815 | 810 | #endif |
112485e9 | 811 | } |
15ac7afe TL |
812 | } |
813 | ||
13a3fe52 TK |
814 | ret = request_irq(omap_prcm_event_to_irq("io"), |
815 | omap_hwmod_mux_handle_irq, IRQF_SHARED | IRQF_NO_SUSPEND, | |
816 | "hwmod_io", omap_mux_late_init); | |
817 | ||
818 | if (ret) | |
819 | pr_warning("mux: Failed to setup hwmod io irq %d\n", ret); | |
820 | ||
4b715efc TL |
821 | omap_mux_dbg_init(); |
822 | ||
15ac7afe TL |
823 | return 0; |
824 | } | |
15ac7afe TL |
825 | |
826 | static void __init omap_mux_package_fixup(struct omap_mux *p, | |
827 | struct omap_mux *superset) | |
828 | { | |
829 | while (p->reg_offset != OMAP_MUX_TERMINATOR) { | |
830 | struct omap_mux *s = superset; | |
831 | int found = 0; | |
832 | ||
833 | while (s->reg_offset != OMAP_MUX_TERMINATOR) { | |
834 | if (s->reg_offset == p->reg_offset) { | |
835 | *s = *p; | |
836 | found++; | |
837 | break; | |
838 | } | |
839 | s++; | |
840 | } | |
841 | if (!found) | |
032a6424 | 842 | pr_err("%s: Unknown entry offset 0x%x\n", __func__, |
1cbb3a9a | 843 | p->reg_offset); |
15ac7afe TL |
844 | p++; |
845 | } | |
846 | } | |
847 | ||
848 | #ifdef CONFIG_DEBUG_FS | |
849 | ||
850 | static void __init omap_mux_package_init_balls(struct omap_ball *b, | |
851 | struct omap_mux *superset) | |
852 | { | |
853 | while (b->reg_offset != OMAP_MUX_TERMINATOR) { | |
854 | struct omap_mux *s = superset; | |
855 | int found = 0; | |
856 | ||
857 | while (s->reg_offset != OMAP_MUX_TERMINATOR) { | |
858 | if (s->reg_offset == b->reg_offset) { | |
859 | s->balls[0] = b->balls[0]; | |
860 | s->balls[1] = b->balls[1]; | |
861 | found++; | |
862 | break; | |
863 | } | |
864 | s++; | |
865 | } | |
866 | if (!found) | |
032a6424 | 867 | pr_err("%s: Unknown ball offset 0x%x\n", __func__, |
1cbb3a9a | 868 | b->reg_offset); |
15ac7afe TL |
869 | b++; |
870 | } | |
871 | } | |
872 | ||
873 | #else /* CONFIG_DEBUG_FS */ | |
874 | ||
875 | static inline void omap_mux_package_init_balls(struct omap_ball *b, | |
876 | struct omap_mux *superset) | |
877 | { | |
878 | } | |
879 | ||
880 | #endif /* CONFIG_DEBUG_FS */ | |
881 | ||
882 | static int __init omap_mux_setup(char *options) | |
883 | { | |
884 | if (!options) | |
885 | return 0; | |
886 | ||
887 | omap_mux_options = options; | |
888 | ||
889 | return 1; | |
890 | } | |
891 | __setup("omap_mux=", omap_mux_setup); | |
892 | ||
893 | /* | |
894 | * Note that the omap_mux=some.signal1=0x1234,some.signal2=0x1234 | |
895 | * cmdline options only override the bootloader values. | |
896 | * During development, please enable CONFIG_DEBUG_FS, and use the | |
897 | * signal specific entries under debugfs. | |
898 | */ | |
899 | static void __init omap_mux_set_cmdline_signals(void) | |
900 | { | |
901 | char *options, *next_opt, *token; | |
902 | ||
903 | if (!omap_mux_options) | |
904 | return; | |
905 | ||
dccb3b0e | 906 | options = kstrdup(omap_mux_options, GFP_KERNEL); |
15ac7afe TL |
907 | if (!options) |
908 | return; | |
909 | ||
15ac7afe TL |
910 | next_opt = options; |
911 | ||
912 | while ((token = strsep(&next_opt, ",")) != NULL) { | |
913 | char *keyval, *name; | |
914 | unsigned long val; | |
915 | ||
916 | keyval = token; | |
917 | name = strsep(&keyval, "="); | |
918 | if (name) { | |
919 | int res; | |
920 | ||
921 | res = strict_strtoul(keyval, 0x10, &val); | |
922 | if (res < 0) | |
923 | continue; | |
924 | ||
925 | omap_mux_init_signal(name, (u16)val); | |
926 | } | |
927 | } | |
928 | ||
929 | kfree(options); | |
930 | } | |
931 | ||
15ac7afe | 932 | static int __init omap_mux_copy_names(struct omap_mux *src, |
112485e9 | 933 | struct omap_mux *dst) |
15ac7afe TL |
934 | { |
935 | int i; | |
936 | ||
937 | for (i = 0; i < OMAP_MUX_NR_MODES; i++) { | |
938 | if (src->muxnames[i]) { | |
dccb3b0e TM |
939 | dst->muxnames[i] = kstrdup(src->muxnames[i], |
940 | GFP_KERNEL); | |
15ac7afe TL |
941 | if (!dst->muxnames[i]) |
942 | goto free; | |
15ac7afe TL |
943 | } |
944 | } | |
945 | ||
946 | #ifdef CONFIG_DEBUG_FS | |
947 | for (i = 0; i < OMAP_MUX_NR_SIDES; i++) { | |
948 | if (src->balls[i]) { | |
dccb3b0e | 949 | dst->balls[i] = kstrdup(src->balls[i], GFP_KERNEL); |
15ac7afe TL |
950 | if (!dst->balls[i]) |
951 | goto free; | |
15ac7afe TL |
952 | } |
953 | } | |
954 | #endif | |
955 | ||
956 | return 0; | |
957 | ||
958 | free: | |
959 | omap_mux_free_names(dst); | |
960 | return -ENOMEM; | |
961 | ||
962 | } | |
963 | ||
964 | #endif /* CONFIG_OMAP_MUX */ | |
965 | ||
112485e9 BC |
966 | static struct omap_mux *omap_mux_get_by_gpio( |
967 | struct omap_mux_partition *partition, | |
968 | int gpio) | |
15ac7afe TL |
969 | { |
970 | struct omap_mux_entry *e; | |
112485e9 | 971 | struct omap_mux *ret = NULL; |
15ac7afe | 972 | |
112485e9 | 973 | list_for_each_entry(e, &partition->muxmodes, node) { |
15ac7afe TL |
974 | struct omap_mux *m = &e->mux; |
975 | if (m->gpio == gpio) { | |
112485e9 | 976 | ret = m; |
15ac7afe TL |
977 | break; |
978 | } | |
979 | } | |
980 | ||
112485e9 | 981 | return ret; |
15ac7afe TL |
982 | } |
983 | ||
984 | /* Needed for dynamic muxing of GPIO pins for off-idle */ | |
985 | u16 omap_mux_get_gpio(int gpio) | |
986 | { | |
112485e9 | 987 | struct omap_mux_partition *partition; |
30ebad9d | 988 | struct omap_mux *m = NULL; |
15ac7afe | 989 | |
112485e9 BC |
990 | list_for_each_entry(partition, &mux_partitions, node) { |
991 | m = omap_mux_get_by_gpio(partition, gpio); | |
992 | if (m) | |
993 | return omap_mux_read(partition, m->reg_offset); | |
15ac7afe TL |
994 | } |
995 | ||
112485e9 | 996 | if (!m || m->reg_offset == OMAP_MUX_TERMINATOR) |
032a6424 | 997 | pr_err("%s: Could not get gpio%i\n", __func__, gpio); |
112485e9 BC |
998 | |
999 | return OMAP_MUX_TERMINATOR; | |
15ac7afe TL |
1000 | } |
1001 | ||
1002 | /* Needed for dynamic muxing of GPIO pins for off-idle */ | |
1003 | void omap_mux_set_gpio(u16 val, int gpio) | |
1004 | { | |
112485e9 BC |
1005 | struct omap_mux_partition *partition; |
1006 | struct omap_mux *m = NULL; | |
15ac7afe | 1007 | |
112485e9 BC |
1008 | list_for_each_entry(partition, &mux_partitions, node) { |
1009 | m = omap_mux_get_by_gpio(partition, gpio); | |
1010 | if (m) { | |
1011 | omap_mux_write(partition, val, m->reg_offset); | |
1012 | return; | |
1013 | } | |
15ac7afe TL |
1014 | } |
1015 | ||
112485e9 | 1016 | if (!m || m->reg_offset == OMAP_MUX_TERMINATOR) |
032a6424 | 1017 | pr_err("%s: Could not set gpio%i\n", __func__, gpio); |
15ac7afe TL |
1018 | } |
1019 | ||
112485e9 BC |
1020 | static struct omap_mux * __init omap_mux_list_add( |
1021 | struct omap_mux_partition *partition, | |
1022 | struct omap_mux *src) | |
15ac7afe TL |
1023 | { |
1024 | struct omap_mux_entry *entry; | |
1025 | struct omap_mux *m; | |
1026 | ||
1027 | entry = kzalloc(sizeof(struct omap_mux_entry), GFP_KERNEL); | |
1028 | if (!entry) | |
1029 | return NULL; | |
1030 | ||
1031 | m = &entry->mux; | |
30833142 | 1032 | entry->mux = *src; |
15ac7afe TL |
1033 | |
1034 | #ifdef CONFIG_OMAP_MUX | |
1035 | if (omap_mux_copy_names(src, m)) { | |
1036 | kfree(entry); | |
1037 | return NULL; | |
1038 | } | |
1039 | #endif | |
1040 | ||
1041 | mutex_lock(&muxmode_mutex); | |
112485e9 | 1042 | list_add_tail(&entry->node, &partition->muxmodes); |
15ac7afe TL |
1043 | mutex_unlock(&muxmode_mutex); |
1044 | ||
1045 | return m; | |
1046 | } | |
1047 | ||
1048 | /* | |
1049 | * Note if CONFIG_OMAP_MUX is not selected, we will only initialize | |
1050 | * the GPIO to mux offset mapping that is needed for dynamic muxing | |
1051 | * of GPIO pins for off-idle. | |
1052 | */ | |
112485e9 BC |
1053 | static void __init omap_mux_init_list(struct omap_mux_partition *partition, |
1054 | struct omap_mux *superset) | |
15ac7afe TL |
1055 | { |
1056 | while (superset->reg_offset != OMAP_MUX_TERMINATOR) { | |
1057 | struct omap_mux *entry; | |
1058 | ||
b72c7d54 RL |
1059 | #ifdef CONFIG_OMAP_MUX |
1060 | if (!superset->muxnames || !superset->muxnames[0]) { | |
15ac7afe TL |
1061 | superset++; |
1062 | continue; | |
1063 | } | |
b72c7d54 RL |
1064 | #else |
1065 | /* Skip pins that are not muxed as GPIO by bootloader */ | |
421e8450 | 1066 | if (!OMAP_MODE_GPIO(partition, omap_mux_read(partition, |
112485e9 | 1067 | superset->reg_offset))) { |
9ecef433 TL |
1068 | superset++; |
1069 | continue; | |
1070 | } | |
1071 | #endif | |
1072 | ||
112485e9 | 1073 | entry = omap_mux_list_add(partition, superset); |
15ac7afe | 1074 | if (!entry) { |
032a6424 | 1075 | pr_err("%s: Could not add entry\n", __func__); |
15ac7afe TL |
1076 | return; |
1077 | } | |
1078 | superset++; | |
1079 | } | |
1080 | } | |
1081 | ||
321cfc85 TL |
1082 | #ifdef CONFIG_OMAP_MUX |
1083 | ||
1084 | static void omap_mux_init_package(struct omap_mux *superset, | |
1085 | struct omap_mux *package_subset, | |
1086 | struct omap_ball *package_balls) | |
1087 | { | |
1088 | if (package_subset) | |
1089 | omap_mux_package_fixup(package_subset, superset); | |
1090 | if (package_balls) | |
1091 | omap_mux_package_init_balls(package_balls, superset); | |
1092 | } | |
1093 | ||
27d8d3bf RK |
1094 | static void __init omap_mux_init_signals(struct omap_mux_partition *partition, |
1095 | struct omap_board_mux *board_mux) | |
321cfc85 TL |
1096 | { |
1097 | omap_mux_set_cmdline_signals(); | |
112485e9 | 1098 | omap_mux_write_array(partition, board_mux); |
321cfc85 TL |
1099 | } |
1100 | ||
1101 | #else | |
1102 | ||
1103 | static void omap_mux_init_package(struct omap_mux *superset, | |
1104 | struct omap_mux *package_subset, | |
1105 | struct omap_ball *package_balls) | |
1106 | { | |
1107 | } | |
1108 | ||
27d8d3bf RK |
1109 | static void __init omap_mux_init_signals(struct omap_mux_partition *partition, |
1110 | struct omap_board_mux *board_mux) | |
321cfc85 TL |
1111 | { |
1112 | } | |
1113 | ||
1114 | #endif | |
1115 | ||
112485e9 | 1116 | static u32 mux_partitions_cnt; |
15ac7afe | 1117 | |
112485e9 BC |
1118 | int __init omap_mux_init(const char *name, u32 flags, |
1119 | u32 mux_pbase, u32 mux_size, | |
1120 | struct omap_mux *superset, | |
1121 | struct omap_mux *package_subset, | |
1122 | struct omap_board_mux *board_mux, | |
1123 | struct omap_ball *package_balls) | |
1124 | { | |
1125 | struct omap_mux_partition *partition; | |
1126 | ||
1127 | partition = kzalloc(sizeof(struct omap_mux_partition), GFP_KERNEL); | |
1128 | if (!partition) | |
1129 | return -ENOMEM; | |
1130 | ||
1131 | partition->name = name; | |
1132 | partition->flags = flags; | |
421e8450 | 1133 | partition->gpio = flags & OMAP_MUX_MODE7; |
112485e9 BC |
1134 | partition->size = mux_size; |
1135 | partition->phys = mux_pbase; | |
1136 | partition->base = ioremap(mux_pbase, mux_size); | |
1137 | if (!partition->base) { | |
032a6424 DM |
1138 | pr_err("%s: Could not ioremap mux partition at 0x%08x\n", |
1139 | __func__, partition->phys); | |
9d47e309 | 1140 | kfree(partition); |
15ac7afe TL |
1141 | return -ENODEV; |
1142 | } | |
1143 | ||
112485e9 BC |
1144 | INIT_LIST_HEAD(&partition->muxmodes); |
1145 | ||
1146 | list_add_tail(&partition->node, &mux_partitions); | |
1147 | mux_partitions_cnt++; | |
032a6424 | 1148 | pr_info("%s: Add partition: #%d: %s, flags: %x\n", __func__, |
112485e9 | 1149 | mux_partitions_cnt, partition->name, partition->flags); |
d5425be6 | 1150 | |
321cfc85 | 1151 | omap_mux_init_package(superset, package_subset, package_balls); |
112485e9 BC |
1152 | omap_mux_init_list(partition, superset); |
1153 | omap_mux_init_signals(partition, board_mux); | |
2cb0c54f | 1154 | |
15ac7afe TL |
1155 | return 0; |
1156 | } | |
1157 |