[deliverable/linux.git] / arch / arm / mach-omap2 / mux.c

/*
 * linux/arch/arm/mach-omap2/mux.c
 *
 * OMAP2 and OMAP3 pin multiplexing configurations
 *
 * Copyright (C) 2004 - 2008 Texas Instruments Inc.
 * Copyright (C) 2003 - 2008 Nokia Corporation
 *
 * Written by Tony Lindgren
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 *
 */
#include <linux/module.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/ctype.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include <linux/uaccess.h>

#include <asm/system.h>

#include <plat/control.h>

#include "mux.h"

#define OMAP_MUX_BASE_OFFSET		0x30	/* Offset from CTRL_BASE */
#define OMAP_MUX_BASE_SZ		0x5ca
#define MUXABLE_GPIO_MODE3		BIT(0)

struct omap_mux_entry {
	struct omap_mux		mux;
	struct list_head	node;
};

static unsigned long mux_phys;
static void __iomem *mux_base;
static u8 omap_mux_flags;

u16 omap_mux_read(u16 reg)
{
	if (cpu_is_omap24xx())
		return __raw_readb(mux_base + reg);
	else
		return __raw_readw(mux_base + reg);
}

void omap_mux_write(u16 val, u16 reg)
{
	if (cpu_is_omap24xx())
		__raw_writeb(val, mux_base + reg);
	else
		__raw_writew(val, mux_base + reg);
}

void omap_mux_write_array(struct omap_board_mux *board_mux)
{
	while (board_mux->reg_offset !=  OMAP_MUX_TERMINATOR) {
		omap_mux_write(board_mux->value, board_mux->reg_offset);
		board_mux++;
	}
}

static LIST_HEAD(muxmodes);
static DEFINE_MUTEX(muxmode_mutex);

#ifdef CONFIG_OMAP_MUX

static char *omap_mux_options;

int __init omap_mux_init_gpio(int gpio, int val)
{
	struct omap_mux_entry *e;
	struct omap_mux *gpio_mux = NULL;
	u16 old_mode;
	u16 mux_mode;
	int found = 0;

	if (!gpio)
		return -EINVAL;

	list_for_each_entry(e, &muxmodes, node) {
		struct omap_mux *m = &e->mux;
		if (gpio == m->gpio) {
			gpio_mux = m;
			found++;
		}
	}

	if (found == 0) {
		printk(KERN_ERR "mux: Could not set gpio%i\n", gpio);
		return -ENODEV;
	}

	if (found > 1) {
		printk(KERN_INFO "mux: Multiple gpio paths (%d) for gpio%i\n",
				found, gpio);
		return -EINVAL;
	}

	old_mode = omap_mux_read(gpio_mux->reg_offset);
	mux_mode = val & ~(OMAP_MUX_NR_MODES - 1);
	if (omap_mux_flags & MUXABLE_GPIO_MODE3)
		mux_mode |= OMAP_MUX_MODE3;
	else
		mux_mode |= OMAP_MUX_MODE4;
	printk(KERN_DEBUG "mux: Setting signal %s.gpio%i 0x%04x -> 0x%04x\n",
			gpio_mux->muxnames[0], gpio, old_mode, mux_mode);
	omap_mux_write(mux_mode, gpio_mux->reg_offset);

	return 0;
}

int __init omap_mux_init_signal(const char *muxname, int val)
{
	struct omap_mux_entry *e;
	const char *mode_name;
	int found = 0, mode0_len = 0;

	mode_name = strchr(muxname, '.');
	if (mode_name) {
		mode0_len = strlen(muxname) - strlen(mode_name);
		mode_name++;
	} else {
		mode_name = muxname;
	}

	list_for_each_entry(e, &muxmodes, node) {
		struct omap_mux *m = &e->mux;
		char *m0_entry = m->muxnames[0];
		int i;

		/* First check for full name in mode0.muxmode format */
		if (mode0_len && strncmp(muxname, m0_entry, mode0_len))
			continue;

		/* Then check for muxmode only */
		for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
			char *mode_cur = m->muxnames[i];

			if (!mode_cur)
				continue;

			if (!strcmp(mode_name, mode_cur)) {
				u16 old_mode;
				u16 mux_mode;

				old_mode = omap_mux_read(m->reg_offset);
				mux_mode = val | i;
				printk(KERN_DEBUG "mux: Setting signal "
					"%s.%s 0x%04x -> 0x%04x\n",
					m0_entry, muxname, old_mode, mux_mode);
				omap_mux_write(mux_mode, m->reg_offset);
				found++;
			}
		}
	}

	if (found == 1)
		return 0;

	if (found > 1) {
		printk(KERN_ERR "mux: Multiple signal paths (%i) for %s\n",
				found, muxname);
		return -EINVAL;
	}

	printk(KERN_ERR "mux: Could not set signal %s\n", muxname);

	return -ENODEV;
}

#ifdef CONFIG_DEBUG_FS

#define OMAP_MUX_MAX_NR_FLAGS	10
#define OMAP_MUX_TEST_FLAG(val, mask)				\
	if (((val) & (mask)) == (mask)) {			\
		i++;						\
		flags[i] =  #mask;				\
	}

/* REVISIT: Add checking for non-optimal mux settings */
static inline void omap_mux_decode(struct seq_file *s, u16 val)
{
	char *flags[OMAP_MUX_MAX_NR_FLAGS];
	char mode[sizeof("OMAP_MUX_MODE") + 1];
	int i = -1;

	sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7);
	i++;
	flags[i] = mode;

	OMAP_MUX_TEST_FLAG(val, OMAP_PIN_OFF_WAKEUPENABLE);
	if (val & OMAP_OFF_EN) {
		if (!(val & OMAP_OFFOUT_EN)) {
			if (!(val & OMAP_OFF_PULL_UP)) {
				OMAP_MUX_TEST_FLAG(val,
					OMAP_PIN_OFF_INPUT_PULLDOWN);
			} else {
				OMAP_MUX_TEST_FLAG(val,
					OMAP_PIN_OFF_INPUT_PULLUP);
			}
		} else {
			if (!(val & OMAP_OFFOUT_VAL)) {
				OMAP_MUX_TEST_FLAG(val,
					OMAP_PIN_OFF_OUTPUT_LOW);
			} else {
				OMAP_MUX_TEST_FLAG(val,
					OMAP_PIN_OFF_OUTPUT_HIGH);
			}
		}
	}

	if (val & OMAP_INPUT_EN) {
		if (val & OMAP_PULL_ENA) {
			if (!(val & OMAP_PULL_UP)) {
				OMAP_MUX_TEST_FLAG(val,
					OMAP_PIN_INPUT_PULLDOWN);
			} else {
				OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT_PULLUP);
			}
		} else {
			OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT);
		}
	} else {
		i++;
		flags[i] = "OMAP_PIN_OUTPUT";
	}

	do {
		seq_printf(s, "%s", flags[i]);
		if (i > 0)
			seq_printf(s, " | ");
	} while (i-- > 0);
}

#define OMAP_MUX_DEFNAME_LEN	16

static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
{
	struct omap_mux_entry *e;

	list_for_each_entry(e, &muxmodes, node) {
		struct omap_mux *m = &e->mux;
		char m0_def[OMAP_MUX_DEFNAME_LEN];
		char *m0_name = m->muxnames[0];
		u16 val;
		int i, mode;

		if (!m0_name)
			continue;

		/* REVISIT: Needs to be updated if mode0 names get longer */
		for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) {
			if (m0_name[i] == '\0') {
				m0_def[i] = m0_name[i];
				break;
			}
			m0_def[i] = toupper(m0_name[i]);
		}
		val = omap_mux_read(m->reg_offset);
		mode = val & OMAP_MUX_MODE7;

		seq_printf(s, "OMAP%i_MUX(%s, ",
					cpu_is_omap34xx() ? 3 : 0, m0_def);
		omap_mux_decode(s, val);
		seq_printf(s, "),\n");
	}

	return 0;
}

static int omap_mux_dbg_board_open(struct inode *inode, struct file *file)
{
	return single_open(file, omap_mux_dbg_board_show, &inode->i_private);
}

static const struct file_operations omap_mux_dbg_board_fops = {
	.open		= omap_mux_dbg_board_open,
	.read		= seq_read,
	.llseek		= seq_lseek,
	.release	= single_release,
};

static int omap_mux_dbg_signal_show(struct seq_file *s, void *unused)
{
	struct omap_mux *m = s->private;
	const char *none = "NA";
	u16 val;
	int mode;

	val = omap_mux_read(m->reg_offset);
	mode = val & OMAP_MUX_MODE7;

	seq_printf(s, "name: %s.%s (0x%08lx/0x%03x = 0x%04x), b %s, t %s\n",
			m->muxnames[0], m->muxnames[mode],
			mux_phys + m->reg_offset, m->reg_offset, val,
			m->balls[0] ? m->balls[0] : none,
			m->balls[1] ? m->balls[1] : none);
	seq_printf(s, "mode: ");
	omap_mux_decode(s, val);
	seq_printf(s, "\n");
	seq_printf(s, "signals: %s | %s | %s | %s | %s | %s | %s | %s\n",
			m->muxnames[0] ? m->muxnames[0] : none,
			m->muxnames[1] ? m->muxnames[1] : none,
			m->muxnames[2] ? m->muxnames[2] : none,
			m->muxnames[3] ? m->muxnames[3] : none,
			m->muxnames[4] ? m->muxnames[4] : none,
			m->muxnames[5] ? m->muxnames[5] : none,
			m->muxnames[6] ? m->muxnames[6] : none,
			m->muxnames[7] ? m->muxnames[7] : none);

	return 0;
}

#define OMAP_MUX_MAX_ARG_CHAR  7

static ssize_t omap_mux_dbg_signal_write(struct file *file,
						const char __user *user_buf,
						size_t count, loff_t *ppos)
{
	char buf[OMAP_MUX_MAX_ARG_CHAR];
	struct seq_file *seqf;
	struct omap_mux *m;
	unsigned long val;
	int buf_size, ret;

	if (count > OMAP_MUX_MAX_ARG_CHAR)
		return -EINVAL;

	memset(buf, 0, sizeof(buf));
	buf_size = min(count, sizeof(buf) - 1);

	if (copy_from_user(buf, user_buf, buf_size))
		return -EFAULT;

	ret = strict_strtoul(buf, 0x10, &val);
	if (ret < 0)
		return ret;

	if (val > 0xffff)
		return -EINVAL;

	seqf = file->private_data;
	m = seqf->private;

	omap_mux_write((u16)val, m->reg_offset);
	*ppos += count;

	return count;
}

static int omap_mux_dbg_signal_open(struct inode *inode, struct file *file)
{
	return single_open(file, omap_mux_dbg_signal_show, inode->i_private);
}

static const struct file_operations omap_mux_dbg_signal_fops = {
	.open		= omap_mux_dbg_signal_open,
	.read		= seq_read,
	.write		= omap_mux_dbg_signal_write,
	.llseek		= seq_lseek,
	.release	= single_release,
};

static struct dentry *mux_dbg_dir;

static void __init omap_mux_dbg_init(void)
{
	struct omap_mux_entry *e;

	mux_dbg_dir = debugfs_create_dir("omap_mux", NULL);
	if (!mux_dbg_dir)
		return;

	(void)debugfs_create_file("board", S_IRUGO, mux_dbg_dir,
					NULL, &omap_mux_dbg_board_fops);

	list_for_each_entry(e, &muxmodes, node) {
		struct omap_mux *m = &e->mux;

		(void)debugfs_create_file(m->muxnames[0], S_IWUGO, mux_dbg_dir,
					m, &omap_mux_dbg_signal_fops);
	}
}

#else
static inline void omap_mux_dbg_init(void)
{
}
#endif	/* CONFIG_DEBUG_FS */

static void __init omap_mux_free_names(struct omap_mux *m)
{
	int i;

	for (i = 0; i < OMAP_MUX_NR_MODES; i++)
		kfree(m->muxnames[i]);

#ifdef CONFIG_DEBUG_FS
	for (i = 0; i < OMAP_MUX_NR_SIDES; i++)
		kfree(m->balls[i]);
#endif

}

/* Free all data except for GPIO pins unless CONFIG_DEBUG_FS is set */
static int __init omap_mux_late_init(void)
{
	struct omap_mux_entry *e, *tmp;

	list_for_each_entry_safe(e, tmp, &muxmodes, node) {
		struct omap_mux *m = &e->mux;
		u16 mode = omap_mux_read(m->reg_offset);

		if (OMAP_MODE_GPIO(mode))
			continue;

#ifndef CONFIG_DEBUG_FS
		mutex_lock(&muxmode_mutex);
		list_del(&e->node);
		mutex_unlock(&muxmode_mutex);
		omap_mux_free_names(m);
		kfree(m);
#endif

	}

	omap_mux_dbg_init();

	return 0;
}
late_initcall(omap_mux_late_init);

static void __init omap_mux_package_fixup(struct omap_mux *p,
					struct omap_mux *superset)
{
	while (p->reg_offset !=  OMAP_MUX_TERMINATOR) {
		struct omap_mux *s = superset;
		int found = 0;

		while (s->reg_offset != OMAP_MUX_TERMINATOR) {
			if (s->reg_offset == p->reg_offset) {
				*s = *p;
				found++;
				break;
			}
			s++;
		}
		if (!found)
			printk(KERN_ERR "mux: Unknown entry offset 0x%x\n",
					p->reg_offset);
		p++;
	}
}

#ifdef CONFIG_DEBUG_FS

static void __init omap_mux_package_init_balls(struct omap_ball *b,
				struct omap_mux *superset)
{
	while (b->reg_offset != OMAP_MUX_TERMINATOR) {
		struct omap_mux *s = superset;
		int found = 0;

		while (s->reg_offset != OMAP_MUX_TERMINATOR) {
			if (s->reg_offset == b->reg_offset) {
				s->balls[0] = b->balls[0];
				s->balls[1] = b->balls[1];
				found++;
				break;
			}
			s++;
		}
		if (!found)
			printk(KERN_ERR "mux: Unknown ball offset 0x%x\n",
					b->reg_offset);
		b++;
	}
}

#else	/* CONFIG_DEBUG_FS */

static inline void omap_mux_package_init_balls(struct omap_ball *b,
					struct omap_mux *superset)
{
}

#endif	/* CONFIG_DEBUG_FS */

static int __init omap_mux_setup(char *options)
{
	if (!options)
		return 0;

	omap_mux_options = options;

	return 1;
}
__setup("omap_mux=", omap_mux_setup);

/*
 * Note that the omap_mux=some.signal1=0x1234,some.signal2=0x1234
 * cmdline options only override the bootloader values.
 * During development, please enable CONFIG_DEBUG_FS, and use the
 * signal specific entries under debugfs.
 */
static void __init omap_mux_set_cmdline_signals(void)
{
	char *options, *next_opt, *token;

	if (!omap_mux_options)
		return;

	options = kmalloc(strlen(omap_mux_options) + 1, GFP_KERNEL);
	if (!options)
		return;

	strcpy(options, omap_mux_options);
	next_opt = options;

	while ((token = strsep(&next_opt, ",")) != NULL) {
		char *keyval, *name;
		unsigned long val;

		keyval = token;
		name = strsep(&keyval, "=");
		if (name) {
			int res;

			res = strict_strtoul(keyval, 0x10, &val);
			if (res < 0)
				continue;

			omap_mux_init_signal(name, (u16)val);
		}
	}

	kfree(options);
}

static int __init omap_mux_copy_names(struct omap_mux *src,
					struct omap_mux *dst)
{
	int i;

	for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
		if (src->muxnames[i]) {
			dst->muxnames[i] =
				kmalloc(strlen(src->muxnames[i]) + 1,
					GFP_KERNEL);
			if (!dst->muxnames[i])
				goto free;
			strcpy(dst->muxnames[i], src->muxnames[i]);
		}
	}

#ifdef CONFIG_DEBUG_FS
	for (i = 0; i < OMAP_MUX_NR_SIDES; i++) {
		if (src->balls[i]) {
			dst->balls[i] =
				kmalloc(strlen(src->balls[i]) + 1,
					GFP_KERNEL);
			if (!dst->balls[i])
				goto free;
			strcpy(dst->balls[i], src->balls[i]);
		}
	}
#endif

	return 0;

free:
	omap_mux_free_names(dst);
	return -ENOMEM;

}

#endif	/* CONFIG_OMAP_MUX */

static u16 omap_mux_get_by_gpio(int gpio)
{
	struct omap_mux_entry *e;
	u16 offset = OMAP_MUX_TERMINATOR;

	list_for_each_entry(e, &muxmodes, node) {
		struct omap_mux *m = &e->mux;
		if (m->gpio == gpio) {
			offset = m->reg_offset;
			break;
		}
	}

	return offset;
}

/* Needed for dynamic muxing of GPIO pins for off-idle */
u16 omap_mux_get_gpio(int gpio)
{
	u16 offset;

	offset = omap_mux_get_by_gpio(gpio);
	if (offset == OMAP_MUX_TERMINATOR) {
		printk(KERN_ERR "mux: Could not get gpio%i\n", gpio);
		return offset;
	}

	return omap_mux_read(offset);
}

/* Needed for dynamic muxing of GPIO pins for off-idle */
void omap_mux_set_gpio(u16 val, int gpio)
{
	u16 offset;

	offset = omap_mux_get_by_gpio(gpio);
	if (offset == OMAP_MUX_TERMINATOR) {
		printk(KERN_ERR "mux: Could not set gpio%i\n", gpio);
		return;
	}

	omap_mux_write(val, offset);
}

static struct omap_mux * __init omap_mux_list_add(struct omap_mux *src)
{
	struct omap_mux_entry *entry;
	struct omap_mux *m;

	entry = kzalloc(sizeof(struct omap_mux_entry), GFP_KERNEL);
	if (!entry)
		return NULL;

	m = &entry->mux;
	memcpy(m, src, sizeof(struct omap_mux_entry));

#ifdef CONFIG_OMAP_MUX
	if (omap_mux_copy_names(src, m)) {
		kfree(entry);
		return NULL;
	}
#endif

	mutex_lock(&muxmode_mutex);
	list_add_tail(&entry->node, &muxmodes);
	mutex_unlock(&muxmode_mutex);

	return m;
}

/*
 * Note if CONFIG_OMAP_MUX is not selected, we will only initialize
 * the GPIO to mux offset mapping that is needed for dynamic muxing
 * of GPIO pins for off-idle.
 */
static void __init omap_mux_init_list(struct omap_mux *superset)
{
	while (superset->reg_offset !=  OMAP_MUX_TERMINATOR) {
		struct omap_mux *entry;

#ifdef CONFIG_OMAP_MUX
		if (!superset->muxnames || !superset->muxnames[0]) {
			superset++;
			continue;
		}
#else
		/* Skip pins that are not muxed as GPIO by bootloader */
		if (!OMAP_MODE_GPIO(omap_mux_read(superset->reg_offset))) {
			superset++;
			continue;
		}
#endif

		entry = omap_mux_list_add(superset);
		if (!entry) {
			printk(KERN_ERR "mux: Could not add entry\n");
			return;
		}
		superset++;
	}
}

#ifdef CONFIG_OMAP_MUX

static void omap_mux_init_package(struct omap_mux *superset,
				  struct omap_mux *package_subset,
				  struct omap_ball *package_balls)
{
	if (package_subset)
		omap_mux_package_fixup(package_subset, superset);
	if (package_balls)
		omap_mux_package_init_balls(package_balls, superset);
}

static void omap_mux_init_signals(struct omap_board_mux *board_mux)
{
	omap_mux_set_cmdline_signals();
	omap_mux_write_array(board_mux);
}

#else

static void omap_mux_init_package(struct omap_mux *superset,
				  struct omap_mux *package_subset,
				  struct omap_ball *package_balls)
{
}

static void omap_mux_init_signals(struct omap_board_mux *board_mux)
{
}

#endif

int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
				struct omap_mux *superset,
				struct omap_mux *package_subset,
				struct omap_board_mux *board_mux,
				struct omap_ball *package_balls)
{
	if (mux_base)
		return -EBUSY;

	mux_phys = mux_pbase;
	mux_base = ioremap(mux_pbase, mux_size);
	if (!mux_base) {
		printk(KERN_ERR "mux: Could not ioremap\n");
		return -ENODEV;
	}

	if (cpu_is_omap24xx())
		omap_mux_flags = MUXABLE_GPIO_MODE3;

	omap_mux_init_package(superset, package_subset, package_balls);
	omap_mux_init_list(superset);
	omap_mux_init_signals(board_mux);

	return 0;
}
Commit	Line	Data
1dbae815 TL	1	/*
	2	* linux/arch/arm/mach-omap2/mux.c
	3	*
2351872c	4	* OMAP2 and OMAP3 pin multiplexing configurations
1dbae815	5	*
9330899e TL	6	* Copyright (C) 2004 - 2008 Texas Instruments Inc.
9330899e TL	7	* Copyright (C) 2003 - 2008 Nokia Corporation
1dbae815	8	*
9330899e	9	* Written by Tony Lindgren
1dbae815 TL	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License as published by
	13	* the Free Software Foundation; either version 2 of the License, or
	14	* (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	24	*
	25	*/
1dbae815 TL	26	#include <linux/module.h>
1dbae815 TL	27	#include <linux/init.h>
fced80c7	28	#include <linux/io.h>
5a0e3ad6	29	#include <linux/slab.h>
1dbae815	30	#include <linux/spinlock.h>
15ac7afe	31	#include <linux/list.h>
4b715efc TL	32	#include <linux/ctype.h>
	33	#include <linux/debugfs.h>
	34	#include <linux/seq_file.h>
	35	#include <linux/uaccess.h>
1dbae815	36
fced80c7 RK	37	#include <asm/system.h>
fced80c7 RK	38
ce491cf8	39	#include <plat/control.h>
1dbae815	40
15ac7afe	41	#include "mux.h"
1dbae815	42
92c9f501 MR	43	#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
92c9f501 MR	44	#define OMAP_MUX_BASE_SZ 0x5ca
d5425be6	45	#define MUXABLE_GPIO_MODE3 BIT(0)
92c9f501	46
15ac7afe TL	47	struct omap_mux_entry {
	48	struct omap_mux mux;
	49	struct list_head node;
	50	};
	51
4b715efc	52	static unsigned long mux_phys;
92c9f501	53	static void __iomem *mux_base;
d5425be6	54	static u8 omap_mux_flags;
92c9f501	55
d4bb72e5	56	u16 omap_mux_read(u16 reg)
92c9f501 MR	57	{
	58	if (cpu_is_omap24xx())
	59	return __raw_readb(mux_base + reg);
	60	else
	61	return __raw_readw(mux_base + reg);
	62	}
	63
d4bb72e5	64	void omap_mux_write(u16 val, u16 reg)
92c9f501 MR	65	{
	66	if (cpu_is_omap24xx())
	67	__raw_writeb(val, mux_base + reg);
	68	else
	69	__raw_writew(val, mux_base + reg);
	70	}
7d7f665d	71
d4bb72e5 TL	72	void omap_mux_write_array(struct omap_board_mux *board_mux)
	73	{
	74	while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
	75	omap_mux_write(board_mux->value, board_mux->reg_offset);
	76	board_mux++;
	77	}
	78	}
	79
15ac7afe TL	80	static LIST_HEAD(muxmodes);
	81	static DEFINE_MUTEX(muxmode_mutex);
	82
	83	#ifdef CONFIG_OMAP_MUX
	84
	85	static char *omap_mux_options;
	86
	87	int __init omap_mux_init_gpio(int gpio, int val)
	88	{
	89	struct omap_mux_entry *e;
ca828760	90	struct omap_mux *gpio_mux = NULL;
8a6f7e14 GI	91	u16 old_mode;
8a6f7e14 GI	92	u16 mux_mode;
15ac7afe TL	93	int found = 0;
	94
	95	if (!gpio)
	96	return -EINVAL;
	97
	98	list_for_each_entry(e, &muxmodes, node) {
	99	struct omap_mux *m = &e->mux;
	100	if (gpio == m->gpio) {
8a6f7e14	101	gpio_mux = m;
15ac7afe TL	102	found++;
	103	}
	104	}
	105
8a6f7e14 GI	106	if (found == 0) {
	107	printk(KERN_ERR "mux: Could not set gpio%i\n", gpio);
	108	return -ENODEV;
	109	}
15ac7afe TL	110
15ac7afe TL	111	if (found > 1) {
8a6f7e14 GI	112	printk(KERN_INFO "mux: Multiple gpio paths (%d) for gpio%i\n",
8a6f7e14 GI	113	found, gpio);
15ac7afe TL	114	return -EINVAL;
	115	}
	116
8a6f7e14 GI	117	old_mode = omap_mux_read(gpio_mux->reg_offset);
	118	mux_mode = val & ~(OMAP_MUX_NR_MODES - 1);
	119	if (omap_mux_flags & MUXABLE_GPIO_MODE3)
	120	mux_mode \|= OMAP_MUX_MODE3;
	121	else
	122	mux_mode \|= OMAP_MUX_MODE4;
	123	printk(KERN_DEBUG "mux: Setting signal %s.gpio%i 0x%04x -> 0x%04x\n",
	124	gpio_mux->muxnames[0], gpio, old_mode, mux_mode);
	125	omap_mux_write(mux_mode, gpio_mux->reg_offset);
15ac7afe	126
8a6f7e14	127	return 0;
15ac7afe TL	128	}
15ac7afe TL	129
5a3b2f7a	130	int __init omap_mux_init_signal(const char *muxname, int val)
15ac7afe TL	131	{
15ac7afe TL	132	struct omap_mux_entry *e;
5a3b2f7a TL	133	const char *mode_name;
5a3b2f7a TL	134	int found = 0, mode0_len = 0;
15ac7afe TL	135
	136	mode_name = strchr(muxname, '.');
	137	if (mode_name) {
5a3b2f7a	138	mode0_len = strlen(muxname) - strlen(mode_name);
15ac7afe	139	mode_name++;
15ac7afe TL	140	} else {
	141	mode_name = muxname;
	142	}
	143
	144	list_for_each_entry(e, &muxmodes, node) {
	145	struct omap_mux *m = &e->mux;
	146	char *m0_entry = m->muxnames[0];
	147	int i;
	148
5a3b2f7a TL	149	/* First check for full name in mode0.muxmode format */
5a3b2f7a TL	150	if (mode0_len && strncmp(muxname, m0_entry, mode0_len))
15ac7afe TL	151	continue;
15ac7afe TL	152
5a3b2f7a	153	/* Then check for muxmode only */
15ac7afe TL	154	for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
	155	char *mode_cur = m->muxnames[i];
	156
	157	if (!mode_cur)
	158	continue;
	159
	160	if (!strcmp(mode_name, mode_cur)) {
	161	u16 old_mode;
	162	u16 mux_mode;
	163
	164	old_mode = omap_mux_read(m->reg_offset);
	165	mux_mode = val \| i;
	166	printk(KERN_DEBUG "mux: Setting signal "
	167	"%s.%s 0x%04x -> 0x%04x\n",
	168	m0_entry, muxname, old_mode, mux_mode);
	169	omap_mux_write(mux_mode, m->reg_offset);
	170	found++;
	171	}
	172	}
	173	}
	174
	175	if (found == 1)
	176	return 0;
	177
	178	if (found > 1) {
	179	printk(KERN_ERR "mux: Multiple signal paths (%i) for %s\n",
	180	found, muxname);
	181	return -EINVAL;
	182	}
	183
	184	printk(KERN_ERR "mux: Could not set signal %s\n", muxname);
	185
	186	return -ENODEV;
	187	}
	188
4b715efc TL	189	#ifdef CONFIG_DEBUG_FS
	190
	191	#define OMAP_MUX_MAX_NR_FLAGS 10
	192	#define OMAP_MUX_TEST_FLAG(val, mask) \
	193	if (((val) & (mask)) == (mask)) { \
	194	i++; \
	195	flags[i] = #mask; \
	196	}
	197
	198	/* REVISIT: Add checking for non-optimal mux settings */
	199	static inline void omap_mux_decode(struct seq_file *s, u16 val)
	200	{
	201	char *flags[OMAP_MUX_MAX_NR_FLAGS];
78737ae1	202	char mode[sizeof("OMAP_MUX_MODE") + 1];
4b715efc TL	203	int i = -1;
	204
	205	sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7);
	206	i++;
	207	flags[i] = mode;
	208
	209	OMAP_MUX_TEST_FLAG(val, OMAP_PIN_OFF_WAKEUPENABLE);
	210	if (val & OMAP_OFF_EN) {
	211	if (!(val & OMAP_OFFOUT_EN)) {
	212	if (!(val & OMAP_OFF_PULL_UP)) {
	213	OMAP_MUX_TEST_FLAG(val,
	214	OMAP_PIN_OFF_INPUT_PULLDOWN);
	215	} else {
	216	OMAP_MUX_TEST_FLAG(val,
	217	OMAP_PIN_OFF_INPUT_PULLUP);
	218	}
	219	} else {
	220	if (!(val & OMAP_OFFOUT_VAL)) {
	221	OMAP_MUX_TEST_FLAG(val,
	222	OMAP_PIN_OFF_OUTPUT_LOW);
	223	} else {
	224	OMAP_MUX_TEST_FLAG(val,
	225	OMAP_PIN_OFF_OUTPUT_HIGH);
	226	}
	227	}
	228	}
	229
	230	if (val & OMAP_INPUT_EN) {
	231	if (val & OMAP_PULL_ENA) {
	232	if (!(val & OMAP_PULL_UP)) {
	233	OMAP_MUX_TEST_FLAG(val,
	234	OMAP_PIN_INPUT_PULLDOWN);
	235	} else {
	236	OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT_PULLUP);
	237	}
	238	} else {
	239	OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT);
	240	}
	241	} else {
	242	i++;
	243	flags[i] = "OMAP_PIN_OUTPUT";
	244	}
	245
	246	do {
	247	seq_printf(s, "%s", flags[i]);
	248	if (i > 0)
	249	seq_printf(s, " \| ");
	250	} while (i-- > 0);
	251	}
	252
	253	#define OMAP_MUX_DEFNAME_LEN 16
	254
	255	static int omap_mux_dbg_board_show(struct seq_file s, void unused)
	256	{
	257	struct omap_mux_entry *e;
	258
	259	list_for_each_entry(e, &muxmodes, node) {
	260	struct omap_mux *m = &e->mux;
	261	char m0_def[OMAP_MUX_DEFNAME_LEN];
	262	char *m0_name = m->muxnames[0];
	263	u16 val;
	264	int i, mode;
	265
	266	if (!m0_name)
267	continue;
268
78737ae1	269	/* REVISIT: Needs to be updated if mode0 names get longer */
4b715efc TL	270	for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) {
	271	if (m0_name[i] == '\0') {
	272	m0_def[i] = m0_name[i];
	273	break;
	274	}
	275	m0_def[i] = toupper(m0_name[i]);
	276	}
	277	val = omap_mux_read(m->reg_offset);
	278	mode = val & OMAP_MUX_MODE7;
	279
	280	seq_printf(s, "OMAP%i_MUX(%s, ",
	281	cpu_is_omap34xx() ? 3 : 0, m0_def);
	282	omap_mux_decode(s, val);
	283	seq_printf(s, "),\n");
	284	}
	285
	286	return 0;
	287	}
	288
	289	static int omap_mux_dbg_board_open(struct inode inode, struct file file)
	290	{
	291	return single_open(file, omap_mux_dbg_board_show, &inode->i_private);
	292	}
	293
	294	static const struct file_operations omap_mux_dbg_board_fops = {
	295	.open = omap_mux_dbg_board_open,
	296	.read = seq_read,
	297	.llseek = seq_lseek,
	298	.release = single_release,
	299	};
	300
	301	static int omap_mux_dbg_signal_show(struct seq_file s, void unused)
	302	{
	303	struct omap_mux *m = s->private;
	304	const char *none = "NA";
	305	u16 val;
	306	int mode;
	307
	308	val = omap_mux_read(m->reg_offset);
	309	mode = val & OMAP_MUX_MODE7;
	310
	311	seq_printf(s, "name: %s.%s (0x%08lx/0x%03x = 0x%04x), b %s, t %s\n",
	312	m->muxnames[0], m->muxnames[mode],
	313	mux_phys + m->reg_offset, m->reg_offset, val,
	314	m->balls[0] ? m->balls[0] : none,
	315	m->balls[1] ? m->balls[1] : none);
	316	seq_printf(s, "mode: ");
	317	omap_mux_decode(s, val);
	318	seq_printf(s, "\n");
	319	seq_printf(s, "signals: %s \| %s \| %s \| %s \| %s \| %s \| %s \| %s\n",
	320	m->muxnames[0] ? m->muxnames[0] : none,
	321	m->muxnames[1] ? m->muxnames[1] : none,
	322	m->muxnames[2] ? m->muxnames[2] : none,
	323	m->muxnames[3] ? m->muxnames[3] : none,
	324	m->muxnames[4] ? m->muxnames[4] : none,
	325	m->muxnames[5] ? m->muxnames[5] : none,
	326	m->muxnames[6] ? m->muxnames[6] : none,
	327	m->muxnames[7] ? m->muxnames[7] : none);
	328
	329	return 0;
	330	}
	331
	332	#define OMAP_MUX_MAX_ARG_CHAR 7
	333
334	static ssize_t omap_mux_dbg_signal_write(struct file *file,
335	const char __user *user_buf,
336	size_t count, loff_t *ppos)
337	{
338	char buf[OMAP_MUX_MAX_ARG_CHAR];
339	struct seq_file *seqf;
340	struct omap_mux *m;
341	unsigned long val;
342	int buf_size, ret;
343
344	if (count > OMAP_MUX_MAX_ARG_CHAR)
345	return -EINVAL;
346
347	memset(buf, 0, sizeof(buf));
348	buf_size = min(count, sizeof(buf) - 1);
349
350	if (copy_from_user(buf, user_buf, buf_size))
351	return -EFAULT;
352
353	ret = strict_strtoul(buf, 0x10, &val);
354	if (ret < 0)
355	return ret;
356
357	if (val > 0xffff)
358	return -EINVAL;
359
360	seqf = file->private_data;
361	m = seqf->private;
362
363	omap_mux_write((u16)val, m->reg_offset);
364	*ppos += count;
365
366	return count;
367	}
368
369	static int omap_mux_dbg_signal_open(struct inode inode, struct file file)
370	{
371	return single_open(file, omap_mux_dbg_signal_show, inode->i_private);
372	}
373
374	static const struct file_operations omap_mux_dbg_signal_fops = {
375	.open = omap_mux_dbg_signal_open,
376	.read = seq_read,
377	.write = omap_mux_dbg_signal_write,
378	.llseek = seq_lseek,
379	.release = single_release,
380	};
381
382	static struct dentry *mux_dbg_dir;
383
384	static void __init omap_mux_dbg_init(void)
385	{
386	struct omap_mux_entry *e;
387
388	mux_dbg_dir = debugfs_create_dir("omap_mux", NULL);
389	if (!mux_dbg_dir)
390	return;
391
392	(void)debugfs_create_file("board", S_IRUGO, mux_dbg_dir,
393	NULL, &omap_mux_dbg_board_fops);
394
395	list_for_each_entry(e, &muxmodes, node) {
396	struct omap_mux *m = &e->mux;
397
398	(void)debugfs_create_file(m->muxnames[0], S_IWUGO, mux_dbg_dir,
399	m, &omap_mux_dbg_signal_fops);
400	}
401	}
402
403	#else
404	static inline void omap_mux_dbg_init(void)
405	{
406	}
407	#endif /* CONFIG_DEBUG_FS */
408
15ac7afe TL	409	static void __init omap_mux_free_names(struct omap_mux *m)
	410	{
	411	int i;
	412
	413	for (i = 0; i < OMAP_MUX_NR_MODES; i++)
	414	kfree(m->muxnames[i]);
	415
	416	#ifdef CONFIG_DEBUG_FS
	417	for (i = 0; i < OMAP_MUX_NR_SIDES; i++)
	418	kfree(m->balls[i]);
	419	#endif
	420
	421	}
	422
	423	/* Free all data except for GPIO pins unless CONFIG_DEBUG_FS is set */
	424	static int __init omap_mux_late_init(void)
	425	{
	426	struct omap_mux_entry e, tmp;
	427
	428	list_for_each_entry_safe(e, tmp, &muxmodes, node) {
	429	struct omap_mux *m = &e->mux;
	430	u16 mode = omap_mux_read(m->reg_offset);
	431
	432	if (OMAP_MODE_GPIO(mode))
	433	continue;
	434
	435	#ifndef CONFIG_DEBUG_FS
	436	mutex_lock(&muxmode_mutex);
	437	list_del(&e->node);
	438	mutex_unlock(&muxmode_mutex);
	439	omap_mux_free_names(m);
	440	kfree(m);
1dbae815	441	#endif
15ac7afe TL	442
	443	}
	444
4b715efc TL	445	omap_mux_dbg_init();
4b715efc TL	446
15ac7afe TL	447	return 0;
	448	}
	449	late_initcall(omap_mux_late_init);
	450
	451	static void __init omap_mux_package_fixup(struct omap_mux *p,
	452	struct omap_mux *superset)
	453	{
	454	while (p->reg_offset != OMAP_MUX_TERMINATOR) {
	455	struct omap_mux *s = superset;
	456	int found = 0;
	457
	458	while (s->reg_offset != OMAP_MUX_TERMINATOR) {
	459	if (s->reg_offset == p->reg_offset) {
	460	s = p;
	461	found++;
	462	break;
	463	}
	464	s++;
	465	}
	466	if (!found)
	467	printk(KERN_ERR "mux: Unknown entry offset 0x%x\n",
	468	p->reg_offset);
	469	p++;
	470	}
	471	}
	472
	473	#ifdef CONFIG_DEBUG_FS
	474
	475	static void __init omap_mux_package_init_balls(struct omap_ball *b,
	476	struct omap_mux *superset)
	477	{
	478	while (b->reg_offset != OMAP_MUX_TERMINATOR) {
	479	struct omap_mux *s = superset;
	480	int found = 0;
	481
	482	while (s->reg_offset != OMAP_MUX_TERMINATOR) {
	483	if (s->reg_offset == b->reg_offset) {
	484	s->balls[0] = b->balls[0];
	485	s->balls[1] = b->balls[1];
	486	found++;
	487	break;
	488	}
	489	s++;
	490	}
	491	if (!found)
	492	printk(KERN_ERR "mux: Unknown ball offset 0x%x\n",
	493	b->reg_offset);
	494	b++;
	495	}
	496	}
	497
	498	#else /* CONFIG_DEBUG_FS */
	499
	500	static inline void omap_mux_package_init_balls(struct omap_ball *b,
	501	struct omap_mux *superset)
	502	{
	503	}
	504
	505	#endif /* CONFIG_DEBUG_FS */
	506
	507	static int __init omap_mux_setup(char *options)
	508	{
	509	if (!options)
	510	return 0;
511
512	omap_mux_options = options;
513
514	return 1;
515	}
516	__setup("omap_mux=", omap_mux_setup);
517
518	/*
519	* Note that the omap_mux=some.signal1=0x1234,some.signal2=0x1234
520	* cmdline options only override the bootloader values.
521	* During development, please enable CONFIG_DEBUG_FS, and use the
522	* signal specific entries under debugfs.
523	*/
524	static void __init omap_mux_set_cmdline_signals(void)
525	{
526	char options, next_opt, *token;
527
528	if (!omap_mux_options)
529	return;
530
531	options = kmalloc(strlen(omap_mux_options) + 1, GFP_KERNEL);
532	if (!options)
533	return;
534
535	strcpy(options, omap_mux_options);
536	next_opt = options;
537
538	while ((token = strsep(&next_opt, ",")) != NULL) {
539	char keyval, name;
540	unsigned long val;
541
542	keyval = token;
543	name = strsep(&keyval, "=");
544	if (name) {
545	int res;
546
547	res = strict_strtoul(keyval, 0x10, &val);
548	if (res < 0)
549	continue;
550
551	omap_mux_init_signal(name, (u16)val);
552	}
553	}
554
555	kfree(options);
556	}
557
15ac7afe TL	558	static int __init omap_mux_copy_names(struct omap_mux *src,
	559	struct omap_mux *dst)
	560	{
	561	int i;
	562
	563	for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
	564	if (src->muxnames[i]) {
	565	dst->muxnames[i] =
	566	kmalloc(strlen(src->muxnames[i]) + 1,
	567	GFP_KERNEL);
	568	if (!dst->muxnames[i])
	569	goto free;
	570	strcpy(dst->muxnames[i], src->muxnames[i]);
	571	}
	572	}
	573
	574	#ifdef CONFIG_DEBUG_FS
	575	for (i = 0; i < OMAP_MUX_NR_SIDES; i++) {
	576	if (src->balls[i]) {
	577	dst->balls[i] =
	578	kmalloc(strlen(src->balls[i]) + 1,
	579	GFP_KERNEL);
	580	if (!dst->balls[i])
	581	goto free;
	582	strcpy(dst->balls[i], src->balls[i]);
	583	}
	584	}
	585	#endif
	586
	587	return 0;
	588
	589	free:
	590	omap_mux_free_names(dst);
	591	return -ENOMEM;
	592
	593	}
	594
	595	#endif /* CONFIG_OMAP_MUX */
	596
	597	static u16 omap_mux_get_by_gpio(int gpio)
	598	{
	599	struct omap_mux_entry *e;
	600	u16 offset = OMAP_MUX_TERMINATOR;
	601
	602	list_for_each_entry(e, &muxmodes, node) {
	603	struct omap_mux *m = &e->mux;
	604	if (m->gpio == gpio) {
	605	offset = m->reg_offset;
	606	break;
	607	}
	608	}
	609
	610	return offset;
	611	}
	612
	613	/* Needed for dynamic muxing of GPIO pins for off-idle */
	614	u16 omap_mux_get_gpio(int gpio)
	615	{
	616	u16 offset;
	617
	618	offset = omap_mux_get_by_gpio(gpio);
	619	if (offset == OMAP_MUX_TERMINATOR) {
	620	printk(KERN_ERR "mux: Could not get gpio%i\n", gpio);
	621	return offset;
622	}
623
624	return omap_mux_read(offset);
625	}
626
627	/* Needed for dynamic muxing of GPIO pins for off-idle */
628	void omap_mux_set_gpio(u16 val, int gpio)
629	{
630	u16 offset;
631
632	offset = omap_mux_get_by_gpio(gpio);
633	if (offset == OMAP_MUX_TERMINATOR) {
634	printk(KERN_ERR "mux: Could not set gpio%i\n", gpio);
635	return;
636	}
637
638	omap_mux_write(val, offset);
639	}
640
641	static struct omap_mux * __init omap_mux_list_add(struct omap_mux *src)
642	{
643	struct omap_mux_entry *entry;
644	struct omap_mux *m;
645
646	entry = kzalloc(sizeof(struct omap_mux_entry), GFP_KERNEL);
647	if (!entry)
648	return NULL;
649
650	m = &entry->mux;
651	memcpy(m, src, sizeof(struct omap_mux_entry));
652
653	#ifdef CONFIG_OMAP_MUX
654	if (omap_mux_copy_names(src, m)) {
655	kfree(entry);
656	return NULL;
657	}
658	#endif
659
660	mutex_lock(&muxmode_mutex);
661	list_add_tail(&entry->node, &muxmodes);
662	mutex_unlock(&muxmode_mutex);
663
664	return m;
665	}
666
667	/*
668	* Note if CONFIG_OMAP_MUX is not selected, we will only initialize
669	* the GPIO to mux offset mapping that is needed for dynamic muxing
670	* of GPIO pins for off-idle.
671	*/
672	static void __init omap_mux_init_list(struct omap_mux *superset)
673	{
674	while (superset->reg_offset != OMAP_MUX_TERMINATOR) {
675	struct omap_mux *entry;
676
b72c7d54 RL	677	#ifdef CONFIG_OMAP_MUX
b72c7d54 RL	678	if (!superset->muxnames \|\| !superset->muxnames[0]) {
15ac7afe TL	679	superset++;
	680	continue;
	681	}
b72c7d54 RL	682	#else
	683	/* Skip pins that are not muxed as GPIO by bootloader */
	684	if (!OMAP_MODE_GPIO(omap_mux_read(superset->reg_offset))) {
9ecef433 TL	685	superset++;
	686	continue;
	687	}
	688	#endif
	689
15ac7afe TL	690	entry = omap_mux_list_add(superset);
	691	if (!entry) {
	692	printk(KERN_ERR "mux: Could not add entry\n");
	693	return;
	694	}
	695	superset++;
	696	}
	697	}
	698
321cfc85 TL	699	#ifdef CONFIG_OMAP_MUX
	700
	701	static void omap_mux_init_package(struct omap_mux *superset,
	702	struct omap_mux *package_subset,
	703	struct omap_ball *package_balls)
	704	{
	705	if (package_subset)
	706	omap_mux_package_fixup(package_subset, superset);
	707	if (package_balls)
	708	omap_mux_package_init_balls(package_balls, superset);
	709	}
	710
	711	static void omap_mux_init_signals(struct omap_board_mux *board_mux)
	712	{
	713	omap_mux_set_cmdline_signals();
	714	omap_mux_write_array(board_mux);
	715	}
	716
	717	#else
	718
	719	static void omap_mux_init_package(struct omap_mux *superset,
	720	struct omap_mux *package_subset,
	721	struct omap_ball *package_balls)
	722	{
	723	}
	724
	725	static void omap_mux_init_signals(struct omap_board_mux *board_mux)
	726	{
	727	}
	728
	729	#endif
	730
15ac7afe TL	731	int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
	732	struct omap_mux *superset,
	733	struct omap_mux *package_subset,
	734	struct omap_board_mux *board_mux,
	735	struct omap_ball *package_balls)
	736	{
	737	if (mux_base)
	738	return -EBUSY;
	739
4b715efc	740	mux_phys = mux_pbase;
15ac7afe TL	741	mux_base = ioremap(mux_pbase, mux_size);
	742	if (!mux_base) {
	743	printk(KERN_ERR "mux: Could not ioremap\n");
	744	return -ENODEV;
	745	}
	746
d5425be6 TL	747	if (cpu_is_omap24xx())
	748	omap_mux_flags = MUXABLE_GPIO_MODE3;
	749
321cfc85	750	omap_mux_init_package(superset, package_subset, package_balls);
15ac7afe	751	omap_mux_init_list(superset);
321cfc85	752	omap_mux_init_signals(board_mux);
2cb0c54f	753
15ac7afe TL	754	return 0;
	755	}
	756