Linux 2.6.37-rc2
[deliverable/linux.git] / arch / arm / mach-omap2 / mux.c
CommitLineData
1dbae815
TL
1/*
2 * linux/arch/arm/mach-omap2/mux.c
3 *
2351872c 4 * OMAP2 and OMAP3 pin multiplexing configurations
1dbae815 5 *
9330899e
TL
6 * Copyright (C) 2004 - 2008 Texas Instruments Inc.
7 * Copyright (C) 2003 - 2008 Nokia Corporation
1dbae815 8 *
9330899e 9 * Written by Tony Lindgren
1dbae815
TL
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
4814ced5 26#include <linux/kernel.h>
1dbae815 27#include <linux/init.h>
fced80c7 28#include <linux/io.h>
15ac7afe 29#include <linux/list.h>
4814ced5 30#include <linux/slab.h>
4b715efc
TL
31#include <linux/ctype.h>
32#include <linux/debugfs.h>
33#include <linux/seq_file.h>
34#include <linux/uaccess.h>
1dbae815 35
fced80c7
RK
36#include <asm/system.h>
37
4814ced5 38#include "control.h"
15ac7afe 39#include "mux.h"
1dbae815 40
92c9f501
MR
41#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
42#define OMAP_MUX_BASE_SZ 0x5ca
d5425be6 43#define MUXABLE_GPIO_MODE3 BIT(0)
92c9f501 44
15ac7afe
TL
45struct omap_mux_entry {
46 struct omap_mux mux;
47 struct list_head node;
48};
49
4b715efc 50static unsigned long mux_phys;
92c9f501 51static void __iomem *mux_base;
d5425be6 52static u8 omap_mux_flags;
92c9f501 53
d4bb72e5 54u16 omap_mux_read(u16 reg)
92c9f501
MR
55{
56 if (cpu_is_omap24xx())
57 return __raw_readb(mux_base + reg);
58 else
59 return __raw_readw(mux_base + reg);
60}
61
d4bb72e5 62void omap_mux_write(u16 val, u16 reg)
92c9f501
MR
63{
64 if (cpu_is_omap24xx())
65 __raw_writeb(val, mux_base + reg);
66 else
67 __raw_writew(val, mux_base + reg);
68}
7d7f665d 69
d4bb72e5
TL
70void omap_mux_write_array(struct omap_board_mux *board_mux)
71{
72 while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
73 omap_mux_write(board_mux->value, board_mux->reg_offset);
74 board_mux++;
75 }
76}
77
15ac7afe
TL
78static LIST_HEAD(muxmodes);
79static DEFINE_MUTEX(muxmode_mutex);
80
81#ifdef CONFIG_OMAP_MUX
82
83static char *omap_mux_options;
84
85int __init omap_mux_init_gpio(int gpio, int val)
86{
87 struct omap_mux_entry *e;
ca828760 88 struct omap_mux *gpio_mux = NULL;
8a6f7e14
GI
89 u16 old_mode;
90 u16 mux_mode;
15ac7afe
TL
91 int found = 0;
92
93 if (!gpio)
94 return -EINVAL;
95
96 list_for_each_entry(e, &muxmodes, node) {
97 struct omap_mux *m = &e->mux;
98 if (gpio == m->gpio) {
8a6f7e14 99 gpio_mux = m;
15ac7afe
TL
100 found++;
101 }
102 }
103
8a6f7e14
GI
104 if (found == 0) {
105 printk(KERN_ERR "mux: Could not set gpio%i\n", gpio);
106 return -ENODEV;
107 }
15ac7afe
TL
108
109 if (found > 1) {
8a6f7e14
GI
110 printk(KERN_INFO "mux: Multiple gpio paths (%d) for gpio%i\n",
111 found, gpio);
15ac7afe
TL
112 return -EINVAL;
113 }
114
8a6f7e14
GI
115 old_mode = omap_mux_read(gpio_mux->reg_offset);
116 mux_mode = val & ~(OMAP_MUX_NR_MODES - 1);
117 if (omap_mux_flags & MUXABLE_GPIO_MODE3)
118 mux_mode |= OMAP_MUX_MODE3;
119 else
120 mux_mode |= OMAP_MUX_MODE4;
121 printk(KERN_DEBUG "mux: Setting signal %s.gpio%i 0x%04x -> 0x%04x\n",
122 gpio_mux->muxnames[0], gpio, old_mode, mux_mode);
123 omap_mux_write(mux_mode, gpio_mux->reg_offset);
15ac7afe 124
8a6f7e14 125 return 0;
15ac7afe
TL
126}
127
5a3b2f7a 128int __init omap_mux_init_signal(const char *muxname, int val)
15ac7afe
TL
129{
130 struct omap_mux_entry *e;
5a3b2f7a
TL
131 const char *mode_name;
132 int found = 0, mode0_len = 0;
15ac7afe
TL
133
134 mode_name = strchr(muxname, '.');
135 if (mode_name) {
5a3b2f7a 136 mode0_len = strlen(muxname) - strlen(mode_name);
15ac7afe 137 mode_name++;
15ac7afe
TL
138 } else {
139 mode_name = muxname;
140 }
141
142 list_for_each_entry(e, &muxmodes, node) {
143 struct omap_mux *m = &e->mux;
144 char *m0_entry = m->muxnames[0];
145 int i;
146
5a3b2f7a
TL
147 /* First check for full name in mode0.muxmode format */
148 if (mode0_len && strncmp(muxname, m0_entry, mode0_len))
15ac7afe
TL
149 continue;
150
5a3b2f7a 151 /* Then check for muxmode only */
15ac7afe
TL
152 for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
153 char *mode_cur = m->muxnames[i];
154
155 if (!mode_cur)
156 continue;
157
158 if (!strcmp(mode_name, mode_cur)) {
159 u16 old_mode;
160 u16 mux_mode;
161
162 old_mode = omap_mux_read(m->reg_offset);
163 mux_mode = val | i;
164 printk(KERN_DEBUG "mux: Setting signal "
165 "%s.%s 0x%04x -> 0x%04x\n",
166 m0_entry, muxname, old_mode, mux_mode);
167 omap_mux_write(mux_mode, m->reg_offset);
168 found++;
169 }
170 }
171 }
172
173 if (found == 1)
174 return 0;
175
176 if (found > 1) {
177 printk(KERN_ERR "mux: Multiple signal paths (%i) for %s\n",
178 found, muxname);
179 return -EINVAL;
180 }
181
182 printk(KERN_ERR "mux: Could not set signal %s\n", muxname);
183
184 return -ENODEV;
185}
186
4b715efc
TL
187#ifdef CONFIG_DEBUG_FS
188
189#define OMAP_MUX_MAX_NR_FLAGS 10
190#define OMAP_MUX_TEST_FLAG(val, mask) \
191 if (((val) & (mask)) == (mask)) { \
192 i++; \
193 flags[i] = #mask; \
194 }
195
196/* REVISIT: Add checking for non-optimal mux settings */
197static inline void omap_mux_decode(struct seq_file *s, u16 val)
198{
199 char *flags[OMAP_MUX_MAX_NR_FLAGS];
78737ae1 200 char mode[sizeof("OMAP_MUX_MODE") + 1];
4b715efc
TL
201 int i = -1;
202
203 sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7);
204 i++;
205 flags[i] = mode;
206
207 OMAP_MUX_TEST_FLAG(val, OMAP_PIN_OFF_WAKEUPENABLE);
208 if (val & OMAP_OFF_EN) {
209 if (!(val & OMAP_OFFOUT_EN)) {
210 if (!(val & OMAP_OFF_PULL_UP)) {
211 OMAP_MUX_TEST_FLAG(val,
212 OMAP_PIN_OFF_INPUT_PULLDOWN);
213 } else {
214 OMAP_MUX_TEST_FLAG(val,
215 OMAP_PIN_OFF_INPUT_PULLUP);
216 }
217 } else {
218 if (!(val & OMAP_OFFOUT_VAL)) {
219 OMAP_MUX_TEST_FLAG(val,
220 OMAP_PIN_OFF_OUTPUT_LOW);
221 } else {
222 OMAP_MUX_TEST_FLAG(val,
223 OMAP_PIN_OFF_OUTPUT_HIGH);
224 }
225 }
226 }
227
228 if (val & OMAP_INPUT_EN) {
229 if (val & OMAP_PULL_ENA) {
230 if (!(val & OMAP_PULL_UP)) {
231 OMAP_MUX_TEST_FLAG(val,
232 OMAP_PIN_INPUT_PULLDOWN);
233 } else {
234 OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT_PULLUP);
235 }
236 } else {
237 OMAP_MUX_TEST_FLAG(val, OMAP_PIN_INPUT);
238 }
239 } else {
240 i++;
241 flags[i] = "OMAP_PIN_OUTPUT";
242 }
243
244 do {
245 seq_printf(s, "%s", flags[i]);
246 if (i > 0)
247 seq_printf(s, " | ");
248 } while (i-- > 0);
249}
250
251#define OMAP_MUX_DEFNAME_LEN 16
252
253static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
254{
255 struct omap_mux_entry *e;
256
257 list_for_each_entry(e, &muxmodes, node) {
258 struct omap_mux *m = &e->mux;
259 char m0_def[OMAP_MUX_DEFNAME_LEN];
260 char *m0_name = m->muxnames[0];
261 u16 val;
262 int i, mode;
263
264 if (!m0_name)
265 continue;
266
78737ae1 267 /* REVISIT: Needs to be updated if mode0 names get longer */
4b715efc
TL
268 for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) {
269 if (m0_name[i] == '\0') {
270 m0_def[i] = m0_name[i];
271 break;
272 }
273 m0_def[i] = toupper(m0_name[i]);
274 }
275 val = omap_mux_read(m->reg_offset);
276 mode = val & OMAP_MUX_MODE7;
277
278 seq_printf(s, "OMAP%i_MUX(%s, ",
279 cpu_is_omap34xx() ? 3 : 0, m0_def);
280 omap_mux_decode(s, val);
281 seq_printf(s, "),\n");
282 }
283
284 return 0;
285}
286
287static int omap_mux_dbg_board_open(struct inode *inode, struct file *file)
288{
289 return single_open(file, omap_mux_dbg_board_show, &inode->i_private);
290}
291
292static const struct file_operations omap_mux_dbg_board_fops = {
293 .open = omap_mux_dbg_board_open,
294 .read = seq_read,
295 .llseek = seq_lseek,
296 .release = single_release,
297};
298
299static int omap_mux_dbg_signal_show(struct seq_file *s, void *unused)
300{
301 struct omap_mux *m = s->private;
302 const char *none = "NA";
303 u16 val;
304 int mode;
305
306 val = omap_mux_read(m->reg_offset);
307 mode = val & OMAP_MUX_MODE7;
308
309 seq_printf(s, "name: %s.%s (0x%08lx/0x%03x = 0x%04x), b %s, t %s\n",
310 m->muxnames[0], m->muxnames[mode],
311 mux_phys + m->reg_offset, m->reg_offset, val,
312 m->balls[0] ? m->balls[0] : none,
313 m->balls[1] ? m->balls[1] : none);
314 seq_printf(s, "mode: ");
315 omap_mux_decode(s, val);
316 seq_printf(s, "\n");
317 seq_printf(s, "signals: %s | %s | %s | %s | %s | %s | %s | %s\n",
318 m->muxnames[0] ? m->muxnames[0] : none,
319 m->muxnames[1] ? m->muxnames[1] : none,
320 m->muxnames[2] ? m->muxnames[2] : none,
321 m->muxnames[3] ? m->muxnames[3] : none,
322 m->muxnames[4] ? m->muxnames[4] : none,
323 m->muxnames[5] ? m->muxnames[5] : none,
324 m->muxnames[6] ? m->muxnames[6] : none,
325 m->muxnames[7] ? m->muxnames[7] : none);
326
327 return 0;
328}
329
330#define OMAP_MUX_MAX_ARG_CHAR 7
331
332static ssize_t omap_mux_dbg_signal_write(struct file *file,
333 const char __user *user_buf,
334 size_t count, loff_t *ppos)
335{
336 char buf[OMAP_MUX_MAX_ARG_CHAR];
337 struct seq_file *seqf;
338 struct omap_mux *m;
339 unsigned long val;
340 int buf_size, ret;
341
342 if (count > OMAP_MUX_MAX_ARG_CHAR)
343 return -EINVAL;
344
345 memset(buf, 0, sizeof(buf));
346 buf_size = min(count, sizeof(buf) - 1);
347
348 if (copy_from_user(buf, user_buf, buf_size))
349 return -EFAULT;
350
351 ret = strict_strtoul(buf, 0x10, &val);
352 if (ret < 0)
353 return ret;
354
355 if (val > 0xffff)
356 return -EINVAL;
357
358 seqf = file->private_data;
359 m = seqf->private;
360
361 omap_mux_write((u16)val, m->reg_offset);
362 *ppos += count;
363
364 return count;
365}
366
367static int omap_mux_dbg_signal_open(struct inode *inode, struct file *file)
368{
369 return single_open(file, omap_mux_dbg_signal_show, inode->i_private);
370}
371
372static const struct file_operations omap_mux_dbg_signal_fops = {
373 .open = omap_mux_dbg_signal_open,
374 .read = seq_read,
375 .write = omap_mux_dbg_signal_write,
376 .llseek = seq_lseek,
377 .release = single_release,
378};
379
380static struct dentry *mux_dbg_dir;
381
382static void __init omap_mux_dbg_init(void)
383{
384 struct omap_mux_entry *e;
385
386 mux_dbg_dir = debugfs_create_dir("omap_mux", NULL);
387 if (!mux_dbg_dir)
388 return;
389
390 (void)debugfs_create_file("board", S_IRUGO, mux_dbg_dir,
391 NULL, &omap_mux_dbg_board_fops);
392
393 list_for_each_entry(e, &muxmodes, node) {
394 struct omap_mux *m = &e->mux;
395
396 (void)debugfs_create_file(m->muxnames[0], S_IWUGO, mux_dbg_dir,
397 m, &omap_mux_dbg_signal_fops);
398 }
399}
400
401#else
402static inline void omap_mux_dbg_init(void)
403{
404}
405#endif /* CONFIG_DEBUG_FS */
406
15ac7afe
TL
407static void __init omap_mux_free_names(struct omap_mux *m)
408{
409 int i;
410
411 for (i = 0; i < OMAP_MUX_NR_MODES; i++)
412 kfree(m->muxnames[i]);
413
414#ifdef CONFIG_DEBUG_FS
415 for (i = 0; i < OMAP_MUX_NR_SIDES; i++)
416 kfree(m->balls[i]);
417#endif
418
419}
420
421/* Free all data except for GPIO pins unless CONFIG_DEBUG_FS is set */
422static int __init omap_mux_late_init(void)
423{
424 struct omap_mux_entry *e, *tmp;
425
426 list_for_each_entry_safe(e, tmp, &muxmodes, node) {
427 struct omap_mux *m = &e->mux;
428 u16 mode = omap_mux_read(m->reg_offset);
429
430 if (OMAP_MODE_GPIO(mode))
431 continue;
432
433#ifndef CONFIG_DEBUG_FS
434 mutex_lock(&muxmode_mutex);
435 list_del(&e->node);
436 mutex_unlock(&muxmode_mutex);
437 omap_mux_free_names(m);
438 kfree(m);
1dbae815 439#endif
15ac7afe
TL
440
441 }
442
4b715efc
TL
443 omap_mux_dbg_init();
444
15ac7afe
TL
445 return 0;
446}
447late_initcall(omap_mux_late_init);
448
449static void __init omap_mux_package_fixup(struct omap_mux *p,
450 struct omap_mux *superset)
451{
452 while (p->reg_offset != OMAP_MUX_TERMINATOR) {
453 struct omap_mux *s = superset;
454 int found = 0;
455
456 while (s->reg_offset != OMAP_MUX_TERMINATOR) {
457 if (s->reg_offset == p->reg_offset) {
458 *s = *p;
459 found++;
460 break;
461 }
462 s++;
463 }
464 if (!found)
465 printk(KERN_ERR "mux: Unknown entry offset 0x%x\n",
466 p->reg_offset);
467 p++;
468 }
469}
470
471#ifdef CONFIG_DEBUG_FS
472
473static void __init omap_mux_package_init_balls(struct omap_ball *b,
474 struct omap_mux *superset)
475{
476 while (b->reg_offset != OMAP_MUX_TERMINATOR) {
477 struct omap_mux *s = superset;
478 int found = 0;
479
480 while (s->reg_offset != OMAP_MUX_TERMINATOR) {
481 if (s->reg_offset == b->reg_offset) {
482 s->balls[0] = b->balls[0];
483 s->balls[1] = b->balls[1];
484 found++;
485 break;
486 }
487 s++;
488 }
489 if (!found)
490 printk(KERN_ERR "mux: Unknown ball offset 0x%x\n",
491 b->reg_offset);
492 b++;
493 }
494}
495
496#else /* CONFIG_DEBUG_FS */
497
498static inline void omap_mux_package_init_balls(struct omap_ball *b,
499 struct omap_mux *superset)
500{
501}
502
503#endif /* CONFIG_DEBUG_FS */
504
505static int __init omap_mux_setup(char *options)
506{
507 if (!options)
508 return 0;
509
510 omap_mux_options = options;
511
512 return 1;
513}
514__setup("omap_mux=", omap_mux_setup);
515
516/*
517 * Note that the omap_mux=some.signal1=0x1234,some.signal2=0x1234
518 * cmdline options only override the bootloader values.
519 * During development, please enable CONFIG_DEBUG_FS, and use the
520 * signal specific entries under debugfs.
521 */
522static void __init omap_mux_set_cmdline_signals(void)
523{
524 char *options, *next_opt, *token;
525
526 if (!omap_mux_options)
527 return;
528
529 options = kmalloc(strlen(omap_mux_options) + 1, GFP_KERNEL);
530 if (!options)
531 return;
532
533 strcpy(options, omap_mux_options);
534 next_opt = options;
535
536 while ((token = strsep(&next_opt, ",")) != NULL) {
537 char *keyval, *name;
538 unsigned long val;
539
540 keyval = token;
541 name = strsep(&keyval, "=");
542 if (name) {
543 int res;
544
545 res = strict_strtoul(keyval, 0x10, &val);
546 if (res < 0)
547 continue;
548
549 omap_mux_init_signal(name, (u16)val);
550 }
551 }
552
553 kfree(options);
554}
555
15ac7afe
TL
556static int __init omap_mux_copy_names(struct omap_mux *src,
557 struct omap_mux *dst)
558{
559 int i;
560
561 for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
562 if (src->muxnames[i]) {
563 dst->muxnames[i] =
564 kmalloc(strlen(src->muxnames[i]) + 1,
565 GFP_KERNEL);
566 if (!dst->muxnames[i])
567 goto free;
568 strcpy(dst->muxnames[i], src->muxnames[i]);
569 }
570 }
571
572#ifdef CONFIG_DEBUG_FS
573 for (i = 0; i < OMAP_MUX_NR_SIDES; i++) {
574 if (src->balls[i]) {
575 dst->balls[i] =
576 kmalloc(strlen(src->balls[i]) + 1,
577 GFP_KERNEL);
578 if (!dst->balls[i])
579 goto free;
580 strcpy(dst->balls[i], src->balls[i]);
581 }
582 }
583#endif
584
585 return 0;
586
587free:
588 omap_mux_free_names(dst);
589 return -ENOMEM;
590
591}
592
593#endif /* CONFIG_OMAP_MUX */
594
595static u16 omap_mux_get_by_gpio(int gpio)
596{
597 struct omap_mux_entry *e;
598 u16 offset = OMAP_MUX_TERMINATOR;
599
600 list_for_each_entry(e, &muxmodes, node) {
601 struct omap_mux *m = &e->mux;
602 if (m->gpio == gpio) {
603 offset = m->reg_offset;
604 break;
605 }
606 }
607
608 return offset;
609}
610
611/* Needed for dynamic muxing of GPIO pins for off-idle */
612u16 omap_mux_get_gpio(int gpio)
613{
614 u16 offset;
615
616 offset = omap_mux_get_by_gpio(gpio);
617 if (offset == OMAP_MUX_TERMINATOR) {
618 printk(KERN_ERR "mux: Could not get gpio%i\n", gpio);
619 return offset;
620 }
621
622 return omap_mux_read(offset);
623}
624
625/* Needed for dynamic muxing of GPIO pins for off-idle */
626void omap_mux_set_gpio(u16 val, int gpio)
627{
628 u16 offset;
629
630 offset = omap_mux_get_by_gpio(gpio);
631 if (offset == OMAP_MUX_TERMINATOR) {
632 printk(KERN_ERR "mux: Could not set gpio%i\n", gpio);
633 return;
634 }
635
636 omap_mux_write(val, offset);
637}
638
639static struct omap_mux * __init omap_mux_list_add(struct omap_mux *src)
640{
641 struct omap_mux_entry *entry;
642 struct omap_mux *m;
643
644 entry = kzalloc(sizeof(struct omap_mux_entry), GFP_KERNEL);
645 if (!entry)
646 return NULL;
647
648 m = &entry->mux;
649 memcpy(m, src, sizeof(struct omap_mux_entry));
650
651#ifdef CONFIG_OMAP_MUX
652 if (omap_mux_copy_names(src, m)) {
653 kfree(entry);
654 return NULL;
655 }
656#endif
657
658 mutex_lock(&muxmode_mutex);
659 list_add_tail(&entry->node, &muxmodes);
660 mutex_unlock(&muxmode_mutex);
661
662 return m;
663}
664
665/*
666 * Note if CONFIG_OMAP_MUX is not selected, we will only initialize
667 * the GPIO to mux offset mapping that is needed for dynamic muxing
668 * of GPIO pins for off-idle.
669 */
670static void __init omap_mux_init_list(struct omap_mux *superset)
671{
672 while (superset->reg_offset != OMAP_MUX_TERMINATOR) {
673 struct omap_mux *entry;
674
b72c7d54
RL
675#ifdef CONFIG_OMAP_MUX
676 if (!superset->muxnames || !superset->muxnames[0]) {
15ac7afe
TL
677 superset++;
678 continue;
679 }
b72c7d54
RL
680#else
681 /* Skip pins that are not muxed as GPIO by bootloader */
682 if (!OMAP_MODE_GPIO(omap_mux_read(superset->reg_offset))) {
9ecef433
TL
683 superset++;
684 continue;
685 }
686#endif
687
15ac7afe
TL
688 entry = omap_mux_list_add(superset);
689 if (!entry) {
690 printk(KERN_ERR "mux: Could not add entry\n");
691 return;
692 }
693 superset++;
694 }
695}
696
321cfc85
TL
697#ifdef CONFIG_OMAP_MUX
698
699static void omap_mux_init_package(struct omap_mux *superset,
700 struct omap_mux *package_subset,
701 struct omap_ball *package_balls)
702{
703 if (package_subset)
704 omap_mux_package_fixup(package_subset, superset);
705 if (package_balls)
706 omap_mux_package_init_balls(package_balls, superset);
707}
708
709static void omap_mux_init_signals(struct omap_board_mux *board_mux)
710{
711 omap_mux_set_cmdline_signals();
712 omap_mux_write_array(board_mux);
713}
714
715#else
716
717static void omap_mux_init_package(struct omap_mux *superset,
718 struct omap_mux *package_subset,
719 struct omap_ball *package_balls)
720{
721}
722
723static void omap_mux_init_signals(struct omap_board_mux *board_mux)
724{
725}
726
727#endif
728
15ac7afe
TL
729int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
730 struct omap_mux *superset,
731 struct omap_mux *package_subset,
732 struct omap_board_mux *board_mux,
733 struct omap_ball *package_balls)
734{
735 if (mux_base)
736 return -EBUSY;
737
4b715efc 738 mux_phys = mux_pbase;
15ac7afe
TL
739 mux_base = ioremap(mux_pbase, mux_size);
740 if (!mux_base) {
741 printk(KERN_ERR "mux: Could not ioremap\n");
742 return -ENODEV;
743 }
744
d5425be6
TL
745 if (cpu_is_omap24xx())
746 omap_mux_flags = MUXABLE_GPIO_MODE3;
747
321cfc85 748 omap_mux_init_package(superset, package_subset, package_balls);
15ac7afe 749 omap_mux_init_list(superset);
321cfc85 750 omap_mux_init_signals(board_mux);
2cb0c54f 751
15ac7afe
TL
752 return 0;
753}
754
This page took 0.439788 seconds and 5 git commands to generate.