Commit | Line | Data |
---|---|---|
066aa9c1 | 1 | /* |
44da397f | 2 | * omap iommu: omap device registration |
066aa9c1 HD |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia Corporation | |
5 | * | |
6 | * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/platform_device.h> | |
14 | ||
ce491cf8 | 15 | #include <plat/iommu.h> |
f779f923 | 16 | #include <plat/irqs.h> |
066aa9c1 | 17 | |
a76e9a90 FC |
18 | struct iommu_device { |
19 | resource_size_t base; | |
20 | int irq; | |
21 | struct iommu_platform_data pdata; | |
22 | struct resource res[2]; | |
066aa9c1 | 23 | }; |
f779f923 KH |
24 | static struct iommu_device *devices; |
25 | static int num_iommu_devices; | |
066aa9c1 | 26 | |
44da397f | 27 | #ifdef CONFIG_ARCH_OMAP3 |
f779f923 | 28 | static struct iommu_device omap3_devices[] = { |
066aa9c1 | 29 | { |
a76e9a90 FC |
30 | .base = 0x480bd400, |
31 | .irq = 24, | |
32 | .pdata = { | |
33 | .name = "isp", | |
34 | .nr_tlb_entries = 8, | |
35 | .clk_name = "cam_ick", | |
c7f4ab26 GLF |
36 | .da_start = 0x0, |
37 | .da_end = 0xFFFFF000, | |
a76e9a90 | 38 | }, |
066aa9c1 | 39 | }, |
1cd25df4 | 40 | #if defined(CONFIG_OMAP_IOMMU_IVA2) |
066aa9c1 | 41 | { |
a76e9a90 FC |
42 | .base = 0x5d000000, |
43 | .irq = 28, | |
44 | .pdata = { | |
45 | .name = "iva2", | |
46 | .nr_tlb_entries = 32, | |
47 | .clk_name = "iva2_ck", | |
c7f4ab26 GLF |
48 | .da_start = 0x11000000, |
49 | .da_end = 0xFFFFF000, | |
a76e9a90 | 50 | }, |
066aa9c1 | 51 | }, |
5c651ffa | 52 | #endif |
066aa9c1 | 53 | }; |
f779f923 KH |
54 | #define NR_OMAP3_IOMMU_DEVICES ARRAY_SIZE(omap3_devices) |
55 | static struct platform_device *omap3_iommu_pdev[NR_OMAP3_IOMMU_DEVICES]; | |
56 | #else | |
57 | #define omap3_devices NULL | |
58 | #define NR_OMAP3_IOMMU_DEVICES 0 | |
59 | #define omap3_iommu_pdev NULL | |
44da397f KH |
60 | #endif |
61 | ||
f779f923 KH |
62 | #ifdef CONFIG_ARCH_OMAP4 |
63 | static struct iommu_device omap4_devices[] = { | |
64 | { | |
65 | .base = OMAP4_MMU1_BASE, | |
1fd7f467 | 66 | .irq = OMAP44XX_IRQ_DUCATI_MMU, |
f779f923 KH |
67 | .pdata = { |
68 | .name = "ducati", | |
69 | .nr_tlb_entries = 32, | |
70 | .clk_name = "ducati_ick", | |
c7f4ab26 GLF |
71 | .da_start = 0x0, |
72 | .da_end = 0xFFFFF000, | |
f779f923 KH |
73 | }, |
74 | }, | |
75 | #if defined(CONFIG_MPU_TESLA_IOMMU) | |
76 | { | |
77 | .base = OMAP4_MMU2_BASE, | |
78 | .irq = INT_44XX_DSP_MMU, | |
79 | .pdata = { | |
80 | .name = "tesla", | |
81 | .nr_tlb_entries = 32, | |
82 | .clk_name = "tesla_ick", | |
c7f4ab26 GLF |
83 | .da_start = 0x0, |
84 | .da_end = 0xFFFFF000, | |
f779f923 KH |
85 | }, |
86 | }, | |
87 | #endif | |
88 | }; | |
89 | #define NR_OMAP4_IOMMU_DEVICES ARRAY_SIZE(omap4_devices) | |
90 | static struct platform_device *omap4_iommu_pdev[NR_OMAP4_IOMMU_DEVICES]; | |
91 | #else | |
92 | #define omap4_devices NULL | |
93 | #define NR_OMAP4_IOMMU_DEVICES 0 | |
94 | #define omap4_iommu_pdev NULL | |
95 | #endif | |
066aa9c1 | 96 | |
f779f923 | 97 | static struct platform_device **omap_iommu_pdev; |
066aa9c1 | 98 | |
44da397f | 99 | static int __init omap_iommu_init(void) |
066aa9c1 HD |
100 | { |
101 | int i, err; | |
a76e9a90 FC |
102 | struct resource res[] = { |
103 | { .flags = IORESOURCE_MEM }, | |
104 | { .flags = IORESOURCE_IRQ }, | |
105 | }; | |
066aa9c1 | 106 | |
f779f923 KH |
107 | if (cpu_is_omap34xx()) { |
108 | devices = omap3_devices; | |
109 | omap_iommu_pdev = omap3_iommu_pdev; | |
110 | num_iommu_devices = NR_OMAP3_IOMMU_DEVICES; | |
111 | } else if (cpu_is_omap44xx()) { | |
112 | devices = omap4_devices; | |
113 | omap_iommu_pdev = omap4_iommu_pdev; | |
114 | num_iommu_devices = NR_OMAP4_IOMMU_DEVICES; | |
115 | } else | |
116 | return -ENODEV; | |
117 | ||
118 | for (i = 0; i < num_iommu_devices; i++) { | |
066aa9c1 | 119 | struct platform_device *pdev; |
a76e9a90 | 120 | const struct iommu_device *d = &devices[i]; |
066aa9c1 HD |
121 | |
122 | pdev = platform_device_alloc("omap-iommu", i); | |
123 | if (!pdev) { | |
124 | err = -ENOMEM; | |
125 | goto err_out; | |
126 | } | |
127 | ||
a76e9a90 FC |
128 | res[0].start = d->base; |
129 | res[0].end = d->base + MMU_REG_SIZE - 1; | |
130 | res[1].start = res[1].end = d->irq; | |
066aa9c1 HD |
131 | |
132 | err = platform_device_add_resources(pdev, res, | |
133 | ARRAY_SIZE(res)); | |
134 | if (err) | |
135 | goto err_out; | |
a76e9a90 FC |
136 | err = platform_device_add_data(pdev, &d->pdata, |
137 | sizeof(d->pdata)); | |
066aa9c1 HD |
138 | if (err) |
139 | goto err_out; | |
140 | err = platform_device_add(pdev); | |
141 | if (err) | |
142 | goto err_out; | |
44da397f | 143 | omap_iommu_pdev[i] = pdev; |
066aa9c1 HD |
144 | } |
145 | return 0; | |
146 | ||
147 | err_out: | |
148 | while (i--) | |
44da397f | 149 | platform_device_put(omap_iommu_pdev[i]); |
066aa9c1 HD |
150 | return err; |
151 | } | |
44da397f | 152 | module_init(omap_iommu_init); |
066aa9c1 | 153 | |
44da397f | 154 | static void __exit omap_iommu_exit(void) |
066aa9c1 HD |
155 | { |
156 | int i; | |
157 | ||
f779f923 | 158 | for (i = 0; i < num_iommu_devices; i++) |
44da397f | 159 | platform_device_unregister(omap_iommu_pdev[i]); |
066aa9c1 | 160 | } |
44da397f | 161 | module_exit(omap_iommu_exit); |
066aa9c1 HD |
162 | |
163 | MODULE_AUTHOR("Hiroshi DOYU"); | |
44da397f | 164 | MODULE_DESCRIPTION("omap iommu: omap device registration"); |
066aa9c1 | 165 | MODULE_LICENSE("GPL v2"); |