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d660f9a2 SS |
1 | /* |
2 | * OMAP44xx secure APIs file. | |
3 | * | |
4 | * Copyright (C) 2010 Texas Instruments, Inc. | |
5 | * Written by Santosh Shilimkar <santosh.shilimkar@ti.com> | |
6 | * | |
7 | * | |
8 | * This program is free software,you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/linkage.h> | |
14 | ||
15 | /* | |
16 | * This is common routine to manage secure monitor API | |
17 | * used to modify the PL310 secure registers. | |
18 | * 'r0' contains the value to be modified and 'r12' contains | |
19 | * the monitor API number. It uses few CPU registers | |
20 | * internally and hence they need be backed up including | |
21 | * link register "lr". | |
22 | * Function signature : void omap_smc1(u32 fn, u32 arg) | |
23 | */ | |
24 | ||
25 | ENTRY(omap_smc1) | |
26 | stmfd sp!, {r2-r12, lr} | |
27 | mov r12, r0 | |
28 | mov r0, r1 | |
29 | dsb | |
df571c4a | 30 | smc #0 |
d660f9a2 | 31 | ldmfd sp!, {r2-r12, pc} |
f96bdfa0 | 32 | ENDPROC(omap_smc1) |
3f9eaf09 | 33 | |
ba9456ac SS |
34 | /** |
35 | * u32 omap_smc2(u32 id, u32 falg, u32 pargs) | |
36 | * Low level common routine for secure HAL and PPA APIs. | |
37 | * @id: Application ID of HAL APIs | |
38 | * @flag: Flag to indicate the criticality of operation | |
39 | * @pargs: Physical address of parameter list starting | |
40 | * with number of parametrs | |
41 | */ | |
42 | ENTRY(omap_smc2) | |
43 | stmfd sp!, {r4-r12, lr} | |
44 | mov r3, r2 | |
45 | mov r2, r1 | |
46 | mov r1, #0x0 @ Process ID | |
47 | mov r6, #0xff | |
48 | mov r12, #0x00 @ Secure Service ID | |
49 | mov r7, #0 | |
50 | mcr p15, 0, r7, c7, c5, 6 | |
51 | dsb | |
52 | dmb | |
53 | smc #0 | |
54 | ldmfd sp!, {r4-r12, pc} | |
55 | ENDPROC(omap_smc2) | |
56 | ||
3f9eaf09 SS |
57 | ENTRY(omap_modify_auxcoreboot0) |
58 | stmfd sp!, {r1-r12, lr} | |
59 | ldr r12, =0x104 | |
60 | dsb | |
61 | smc #0 | |
62 | ldmfd sp!, {r1-r12, pc} | |
f96bdfa0 | 63 | ENDPROC(omap_modify_auxcoreboot0) |
3f9eaf09 SS |
64 | |
65 | ENTRY(omap_auxcoreboot_addr) | |
66 | stmfd sp!, {r2-r12, lr} | |
67 | ldr r12, =0x105 | |
68 | dsb | |
69 | smc #0 | |
70 | ldmfd sp!, {r2-r12, pc} | |
f96bdfa0 | 71 | ENDPROC(omap_auxcoreboot_addr) |
3f9eaf09 SS |
72 | |
73 | ENTRY(omap_read_auxcoreboot0) | |
74 | stmfd sp!, {r2-r12, lr} | |
75 | ldr r12, =0x103 | |
76 | dsb | |
77 | smc #0 | |
78 | mov r0, r0, lsr #9 | |
79 | ldmfd sp!, {r2-r12, pc} | |
f96bdfa0 | 80 | ENDPROC(omap_read_auxcoreboot0) |