projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| fbc9be10 SS |
1 | /* |
| 2 | * OMAP4 specific common source file. | |
| 3 | * | |
| 4 | * Copyright (C) 2010 Texas Instruments, Inc. | |
| 5 | * Author: | |
| 6 | * Santosh Shilimkar <santosh.shilimkar@ti.com> | |
| 7 | * | |
| 8 | * | |
| 9 | * This program is free software,you can redistribute it and/or modify | |
| 10 | * it under the terms of the GNU General Public License version 2 as | |
| 11 | * published by the Free Software Foundation. | |
| 12 | */ | |
| 13 | ||
| 14 | #include <linux/kernel.h> | |
| 15 | #include <linux/init.h> | |
| 16 | #include <linux/io.h> | |
| 17 | #include <linux/platform_device.h> | |
| 18 | ||
| 19 | #include <asm/hardware/gic.h> | |
| 20 | #include <asm/hardware/cache-l2x0.h> | |
| 21 | ||
| 22 | #include <mach/hardware.h> | |
| 23 | #include <mach/omap4-common.h> | |
| 24 | ||
| 25 | #ifdef CONFIG_CACHE_L2X0 | |
| 26 | void __iomem *l2cache_base; | |
| 27 | #endif | |
| 28 | ||
| 29 | void __iomem *gic_cpu_base_addr; | |
| 30 | void __iomem *gic_dist_base_addr; | |
| 31 | ||
| 32 | ||
| 33 | void __init gic_init_irq(void) | |
| 34 | { | |
| 35 | /* Static mapping, never released */ | |
| 36 | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); | |
| 37 | BUG_ON(!gic_dist_base_addr); | |
| 38 | gic_dist_init(0, gic_dist_base_addr, 29); | |
| 39 | ||
| 40 | /* Static mapping, never released */ | |
| 41 | gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); | |
| 42 | BUG_ON(!gic_cpu_base_addr); | |
| 43 | gic_cpu_init(0, gic_cpu_base_addr); | |
| 44 | } | |
| 45 | ||
| 46 | #ifdef CONFIG_CACHE_L2X0 | |
| 47 | static int __init omap_l2_cache_init(void) | |
| 48 | { | |
| 49 | /* | |
| 50 | * To avoid code running on other OMAPs in | |
| 51 | * multi-omap builds | |
| 52 | */ | |
| 53 | if (!cpu_is_omap44xx()) | |
| 54 | return -ENODEV; | |
| 55 | ||
| 56 | /* Static mapping, never released */ | |
| 57 | l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K); | |
| 58 | BUG_ON(!l2cache_base); | |
| 59 | ||
| 60 | /* Enable PL310 L2 Cache controller */ | |
| 61 | omap_smc1(0x102, 0x1); | |
| 62 | ||
| 63 | /* | |
| 64 | * 32KB way size, 16-way associativity, | |
| 65 | * parity disabled | |
| 66 | */ | |
| 67 | l2x0_init(l2cache_base, 0x0e050000, 0xc0000fff); | |
| 68 | ||
| 69 | return 0; | |
| 70 | } | |
| 71 | early_initcall(omap_l2_cache_init); | |
| 72 | #endif |