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63c85238 PW |
1 | /* |
2 | * omap_hwmod implementation for OMAP2/3/4 | |
3 | * | |
4 | * Copyright (C) 2009 Nokia Corporation | |
5 | * Paul Walmsley | |
6 | * With fixes and testing from Kevin Hilman | |
7 | * | |
8 | * Created in collaboration with (alphabetical order): Benoit Cousson, | |
9 | * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari | |
10 | * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This code manages "OMAP modules" (on-chip devices) and their | |
17 | * integration with Linux device driver and bus code. | |
18 | * | |
19 | * References: | |
20 | * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) | |
21 | * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) | |
22 | * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) | |
23 | * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) | |
24 | * - Open Core Protocol Specification 2.2 | |
25 | * | |
26 | * To do: | |
27 | * - pin mux handling | |
28 | * - handle IO mapping | |
29 | * - bus throughput & module latency measurement code | |
30 | * | |
31 | * XXX add tests at the beginning of each function to ensure the hwmod is | |
32 | * in the appropriate state | |
33 | * XXX error return values should be checked to ensure that they are | |
34 | * appropriate | |
35 | */ | |
36 | #undef DEBUG | |
37 | ||
38 | #include <linux/kernel.h> | |
39 | #include <linux/errno.h> | |
40 | #include <linux/io.h> | |
41 | #include <linux/clk.h> | |
42 | #include <linux/delay.h> | |
43 | #include <linux/err.h> | |
44 | #include <linux/list.h> | |
45 | #include <linux/mutex.h> | |
46 | #include <linux/bootmem.h> | |
47 | ||
6f8b7ff5 | 48 | #include <plat/common.h> |
ce491cf8 TL |
49 | #include <plat/cpu.h> |
50 | #include <plat/clockdomain.h> | |
51 | #include <plat/powerdomain.h> | |
52 | #include <plat/clock.h> | |
53 | #include <plat/omap_hwmod.h> | |
63c85238 PW |
54 | |
55 | #include "cm.h" | |
56 | ||
57 | /* Maximum microseconds to wait for OMAP module to reset */ | |
58 | #define MAX_MODULE_RESET_WAIT 10000 | |
59 | ||
60 | /* Name of the OMAP hwmod for the MPU */ | |
61 | #define MPU_INITIATOR_NAME "mpu_hwmod" | |
62 | ||
63 | /* omap_hwmod_list contains all registered struct omap_hwmods */ | |
64 | static LIST_HEAD(omap_hwmod_list); | |
65 | ||
66 | static DEFINE_MUTEX(omap_hwmod_mutex); | |
67 | ||
68 | /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ | |
69 | static struct omap_hwmod *mpu_oh; | |
70 | ||
71 | /* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */ | |
72 | static u8 inited; | |
73 | ||
74 | ||
75 | /* Private functions */ | |
76 | ||
77 | /** | |
78 | * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy | |
79 | * @oh: struct omap_hwmod * | |
80 | * | |
81 | * Load the current value of the hwmod OCP_SYSCONFIG register into the | |
82 | * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no | |
83 | * OCP_SYSCONFIG register or 0 upon success. | |
84 | */ | |
85 | static int _update_sysc_cache(struct omap_hwmod *oh) | |
86 | { | |
43b40992 PW |
87 | if (!oh->class->sysc) { |
88 | WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); | |
63c85238 PW |
89 | return -EINVAL; |
90 | } | |
91 | ||
92 | /* XXX ensure module interface clock is up */ | |
93 | ||
43b40992 | 94 | oh->_sysc_cache = omap_hwmod_readl(oh, oh->class->sysc->sysc_offs); |
63c85238 | 95 | |
43b40992 | 96 | if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE)) |
883edfdd | 97 | oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; |
63c85238 PW |
98 | |
99 | return 0; | |
100 | } | |
101 | ||
102 | /** | |
103 | * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register | |
104 | * @v: OCP_SYSCONFIG value to write | |
105 | * @oh: struct omap_hwmod * | |
106 | * | |
43b40992 PW |
107 | * Write @v into the module class' OCP_SYSCONFIG register, if it has |
108 | * one. No return value. | |
63c85238 PW |
109 | */ |
110 | static void _write_sysconfig(u32 v, struct omap_hwmod *oh) | |
111 | { | |
43b40992 PW |
112 | if (!oh->class->sysc) { |
113 | WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); | |
63c85238 PW |
114 | return; |
115 | } | |
116 | ||
117 | /* XXX ensure module interface clock is up */ | |
118 | ||
119 | if (oh->_sysc_cache != v) { | |
120 | oh->_sysc_cache = v; | |
43b40992 | 121 | omap_hwmod_writel(v, oh, oh->class->sysc->sysc_offs); |
63c85238 PW |
122 | } |
123 | } | |
124 | ||
125 | /** | |
126 | * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v | |
127 | * @oh: struct omap_hwmod * | |
128 | * @standbymode: MIDLEMODE field bits | |
129 | * @v: pointer to register contents to modify | |
130 | * | |
131 | * Update the master standby mode bits in @v to be @standbymode for | |
132 | * the @oh hwmod. Does not write to the hardware. Returns -EINVAL | |
133 | * upon error or 0 upon success. | |
134 | */ | |
135 | static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode, | |
136 | u32 *v) | |
137 | { | |
358f0e63 TG |
138 | u32 mstandby_mask; |
139 | u8 mstandby_shift; | |
140 | ||
43b40992 PW |
141 | if (!oh->class->sysc || |
142 | !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE)) | |
63c85238 PW |
143 | return -EINVAL; |
144 | ||
43b40992 PW |
145 | if (!oh->class->sysc->sysc_fields) { |
146 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
147 | return -EINVAL; |
148 | } | |
149 | ||
43b40992 | 150 | mstandby_shift = oh->class->sysc->sysc_fields->midle_shift; |
358f0e63 TG |
151 | mstandby_mask = (0x3 << mstandby_shift); |
152 | ||
153 | *v &= ~mstandby_mask; | |
154 | *v |= __ffs(standbymode) << mstandby_shift; | |
63c85238 PW |
155 | |
156 | return 0; | |
157 | } | |
158 | ||
159 | /** | |
160 | * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v | |
161 | * @oh: struct omap_hwmod * | |
162 | * @idlemode: SIDLEMODE field bits | |
163 | * @v: pointer to register contents to modify | |
164 | * | |
165 | * Update the slave idle mode bits in @v to be @idlemode for the @oh | |
166 | * hwmod. Does not write to the hardware. Returns -EINVAL upon error | |
167 | * or 0 upon success. | |
168 | */ | |
169 | static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) | |
170 | { | |
358f0e63 TG |
171 | u32 sidle_mask; |
172 | u8 sidle_shift; | |
173 | ||
43b40992 PW |
174 | if (!oh->class->sysc || |
175 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE)) | |
63c85238 PW |
176 | return -EINVAL; |
177 | ||
43b40992 PW |
178 | if (!oh->class->sysc->sysc_fields) { |
179 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
180 | return -EINVAL; |
181 | } | |
182 | ||
43b40992 | 183 | sidle_shift = oh->class->sysc->sysc_fields->sidle_shift; |
358f0e63 TG |
184 | sidle_mask = (0x3 << sidle_shift); |
185 | ||
186 | *v &= ~sidle_mask; | |
187 | *v |= __ffs(idlemode) << sidle_shift; | |
63c85238 PW |
188 | |
189 | return 0; | |
190 | } | |
191 | ||
192 | /** | |
193 | * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v | |
194 | * @oh: struct omap_hwmod * | |
195 | * @clockact: CLOCKACTIVITY field bits | |
196 | * @v: pointer to register contents to modify | |
197 | * | |
198 | * Update the clockactivity mode bits in @v to be @clockact for the | |
199 | * @oh hwmod. Used for additional powersaving on some modules. Does | |
200 | * not write to the hardware. Returns -EINVAL upon error or 0 upon | |
201 | * success. | |
202 | */ | |
203 | static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) | |
204 | { | |
358f0e63 TG |
205 | u32 clkact_mask; |
206 | u8 clkact_shift; | |
207 | ||
43b40992 PW |
208 | if (!oh->class->sysc || |
209 | !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) | |
63c85238 PW |
210 | return -EINVAL; |
211 | ||
43b40992 PW |
212 | if (!oh->class->sysc->sysc_fields) { |
213 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
214 | return -EINVAL; |
215 | } | |
216 | ||
43b40992 | 217 | clkact_shift = oh->class->sysc->sysc_fields->clkact_shift; |
358f0e63 TG |
218 | clkact_mask = (0x3 << clkact_shift); |
219 | ||
220 | *v &= ~clkact_mask; | |
221 | *v |= clockact << clkact_shift; | |
63c85238 PW |
222 | |
223 | return 0; | |
224 | } | |
225 | ||
226 | /** | |
227 | * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v | |
228 | * @oh: struct omap_hwmod * | |
229 | * @v: pointer to register contents to modify | |
230 | * | |
231 | * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon | |
232 | * error or 0 upon success. | |
233 | */ | |
234 | static int _set_softreset(struct omap_hwmod *oh, u32 *v) | |
235 | { | |
358f0e63 TG |
236 | u32 softrst_mask; |
237 | ||
43b40992 PW |
238 | if (!oh->class->sysc || |
239 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) | |
63c85238 PW |
240 | return -EINVAL; |
241 | ||
43b40992 PW |
242 | if (!oh->class->sysc->sysc_fields) { |
243 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
244 | return -EINVAL; |
245 | } | |
246 | ||
43b40992 | 247 | softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); |
358f0e63 TG |
248 | |
249 | *v |= softrst_mask; | |
63c85238 PW |
250 | |
251 | return 0; | |
252 | } | |
253 | ||
726072e5 PW |
254 | /** |
255 | * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v | |
256 | * @oh: struct omap_hwmod * | |
257 | * @autoidle: desired AUTOIDLE bitfield value (0 or 1) | |
258 | * @v: pointer to register contents to modify | |
259 | * | |
260 | * Update the module autoidle bit in @v to be @autoidle for the @oh | |
261 | * hwmod. The autoidle bit controls whether the module can gate | |
262 | * internal clocks automatically when it isn't doing anything; the | |
263 | * exact function of this bit varies on a per-module basis. This | |
264 | * function does not write to the hardware. Returns -EINVAL upon | |
265 | * error or 0 upon success. | |
266 | */ | |
267 | static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, | |
268 | u32 *v) | |
269 | { | |
358f0e63 TG |
270 | u32 autoidle_mask; |
271 | u8 autoidle_shift; | |
272 | ||
43b40992 PW |
273 | if (!oh->class->sysc || |
274 | !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE)) | |
726072e5 PW |
275 | return -EINVAL; |
276 | ||
43b40992 PW |
277 | if (!oh->class->sysc->sysc_fields) { |
278 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
279 | return -EINVAL; |
280 | } | |
281 | ||
43b40992 | 282 | autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; |
358f0e63 TG |
283 | autoidle_mask = (0x3 << autoidle_shift); |
284 | ||
285 | *v &= ~autoidle_mask; | |
286 | *v |= autoidle << autoidle_shift; | |
726072e5 PW |
287 | |
288 | return 0; | |
289 | } | |
290 | ||
63c85238 PW |
291 | /** |
292 | * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware | |
293 | * @oh: struct omap_hwmod * | |
294 | * | |
295 | * Allow the hardware module @oh to send wakeups. Returns -EINVAL | |
296 | * upon error or 0 upon success. | |
297 | */ | |
298 | static int _enable_wakeup(struct omap_hwmod *oh) | |
299 | { | |
358f0e63 | 300 | u32 v, wakeup_mask; |
63c85238 | 301 | |
43b40992 PW |
302 | if (!oh->class->sysc || |
303 | !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) | |
63c85238 PW |
304 | return -EINVAL; |
305 | ||
43b40992 PW |
306 | if (!oh->class->sysc->sysc_fields) { |
307 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
308 | return -EINVAL; |
309 | } | |
310 | ||
43b40992 | 311 | wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); |
358f0e63 | 312 | |
63c85238 | 313 | v = oh->_sysc_cache; |
358f0e63 | 314 | v |= wakeup_mask; |
63c85238 PW |
315 | _write_sysconfig(v, oh); |
316 | ||
317 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ | |
318 | ||
319 | oh->_int_flags |= _HWMOD_WAKEUP_ENABLED; | |
320 | ||
321 | return 0; | |
322 | } | |
323 | ||
324 | /** | |
325 | * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware | |
326 | * @oh: struct omap_hwmod * | |
327 | * | |
328 | * Prevent the hardware module @oh to send wakeups. Returns -EINVAL | |
329 | * upon error or 0 upon success. | |
330 | */ | |
331 | static int _disable_wakeup(struct omap_hwmod *oh) | |
332 | { | |
358f0e63 | 333 | u32 v, wakeup_mask; |
63c85238 | 334 | |
43b40992 PW |
335 | if (!oh->class->sysc || |
336 | !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) | |
63c85238 PW |
337 | return -EINVAL; |
338 | ||
43b40992 PW |
339 | if (!oh->class->sysc->sysc_fields) { |
340 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
341 | return -EINVAL; |
342 | } | |
343 | ||
43b40992 | 344 | wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); |
358f0e63 | 345 | |
63c85238 | 346 | v = oh->_sysc_cache; |
358f0e63 | 347 | v &= ~wakeup_mask; |
63c85238 PW |
348 | _write_sysconfig(v, oh); |
349 | ||
350 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ | |
351 | ||
352 | oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED; | |
353 | ||
354 | return 0; | |
355 | } | |
356 | ||
357 | /** | |
358 | * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active | |
359 | * @oh: struct omap_hwmod * | |
360 | * | |
361 | * Prevent the hardware module @oh from entering idle while the | |
362 | * hardare module initiator @init_oh is active. Useful when a module | |
363 | * will be accessed by a particular initiator (e.g., if a module will | |
364 | * be accessed by the IVA, there should be a sleepdep between the IVA | |
365 | * initiator and the module). Only applies to modules in smart-idle | |
366 | * mode. Returns -EINVAL upon error or passes along | |
55ed9694 | 367 | * clkdm_add_sleepdep() value upon success. |
63c85238 PW |
368 | */ |
369 | static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) | |
370 | { | |
371 | if (!oh->_clk) | |
372 | return -EINVAL; | |
373 | ||
55ed9694 | 374 | return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm); |
63c85238 PW |
375 | } |
376 | ||
377 | /** | |
378 | * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active | |
379 | * @oh: struct omap_hwmod * | |
380 | * | |
381 | * Allow the hardware module @oh to enter idle while the hardare | |
382 | * module initiator @init_oh is active. Useful when a module will not | |
383 | * be accessed by a particular initiator (e.g., if a module will not | |
384 | * be accessed by the IVA, there should be no sleepdep between the IVA | |
385 | * initiator and the module). Only applies to modules in smart-idle | |
386 | * mode. Returns -EINVAL upon error or passes along | |
55ed9694 | 387 | * clkdm_del_sleepdep() value upon success. |
63c85238 PW |
388 | */ |
389 | static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) | |
390 | { | |
391 | if (!oh->_clk) | |
392 | return -EINVAL; | |
393 | ||
55ed9694 | 394 | return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm); |
63c85238 PW |
395 | } |
396 | ||
397 | /** | |
398 | * _init_main_clk - get a struct clk * for the the hwmod's main functional clk | |
399 | * @oh: struct omap_hwmod * | |
400 | * | |
401 | * Called from _init_clocks(). Populates the @oh _clk (main | |
402 | * functional clock pointer) if a main_clk is present. Returns 0 on | |
403 | * success or -EINVAL on error. | |
404 | */ | |
405 | static int _init_main_clk(struct omap_hwmod *oh) | |
406 | { | |
407 | struct clk *c; | |
408 | int ret = 0; | |
409 | ||
50ebdac2 | 410 | if (!oh->main_clk) |
63c85238 PW |
411 | return 0; |
412 | ||
50ebdac2 PW |
413 | c = omap_clk_get_by_name(oh->main_clk); |
414 | WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get main_clk %s\n", | |
415 | oh->name, oh->main_clk); | |
63c85238 PW |
416 | if (IS_ERR(c)) |
417 | ret = -EINVAL; | |
418 | oh->_clk = c; | |
419 | ||
81d7c6ff | 420 | WARN(!c->clkdm, "omap_hwmod: %s: missing clockdomain for %s.\n", |
50ebdac2 | 421 | oh->main_clk, c->name); |
81d7c6ff | 422 | |
63c85238 PW |
423 | return ret; |
424 | } | |
425 | ||
426 | /** | |
427 | * _init_interface_clk - get a struct clk * for the the hwmod's interface clks | |
428 | * @oh: struct omap_hwmod * | |
429 | * | |
430 | * Called from _init_clocks(). Populates the @oh OCP slave interface | |
431 | * clock pointers. Returns 0 on success or -EINVAL on error. | |
432 | */ | |
433 | static int _init_interface_clks(struct omap_hwmod *oh) | |
434 | { | |
435 | struct omap_hwmod_ocp_if *os; | |
436 | struct clk *c; | |
437 | int i; | |
438 | int ret = 0; | |
439 | ||
440 | if (oh->slaves_cnt == 0) | |
441 | return 0; | |
442 | ||
443 | for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { | |
50ebdac2 | 444 | if (!os->clk) |
63c85238 PW |
445 | continue; |
446 | ||
50ebdac2 | 447 | c = omap_clk_get_by_name(os->clk); |
63c85238 | 448 | WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get " |
50ebdac2 | 449 | "interface_clk %s\n", oh->name, os->clk); |
63c85238 PW |
450 | if (IS_ERR(c)) |
451 | ret = -EINVAL; | |
452 | os->_clk = c; | |
453 | } | |
454 | ||
455 | return ret; | |
456 | } | |
457 | ||
458 | /** | |
459 | * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks | |
460 | * @oh: struct omap_hwmod * | |
461 | * | |
462 | * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk | |
463 | * clock pointers. Returns 0 on success or -EINVAL on error. | |
464 | */ | |
465 | static int _init_opt_clks(struct omap_hwmod *oh) | |
466 | { | |
467 | struct omap_hwmod_opt_clk *oc; | |
468 | struct clk *c; | |
469 | int i; | |
470 | int ret = 0; | |
471 | ||
472 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { | |
50ebdac2 | 473 | c = omap_clk_get_by_name(oc->clk); |
63c85238 | 474 | WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get opt_clk " |
50ebdac2 | 475 | "%s\n", oh->name, oc->clk); |
63c85238 PW |
476 | if (IS_ERR(c)) |
477 | ret = -EINVAL; | |
478 | oc->_clk = c; | |
479 | } | |
480 | ||
481 | return ret; | |
482 | } | |
483 | ||
484 | /** | |
485 | * _enable_clocks - enable hwmod main clock and interface clocks | |
486 | * @oh: struct omap_hwmod * | |
487 | * | |
488 | * Enables all clocks necessary for register reads and writes to succeed | |
489 | * on the hwmod @oh. Returns 0. | |
490 | */ | |
491 | static int _enable_clocks(struct omap_hwmod *oh) | |
492 | { | |
493 | struct omap_hwmod_ocp_if *os; | |
494 | int i; | |
495 | ||
496 | pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); | |
497 | ||
498 | if (oh->_clk && !IS_ERR(oh->_clk)) | |
499 | clk_enable(oh->_clk); | |
500 | ||
501 | if (oh->slaves_cnt > 0) { | |
502 | for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { | |
503 | struct clk *c = os->_clk; | |
504 | ||
505 | if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE)) | |
506 | clk_enable(c); | |
507 | } | |
508 | } | |
509 | ||
510 | /* The opt clocks are controlled by the device driver. */ | |
511 | ||
512 | return 0; | |
513 | } | |
514 | ||
515 | /** | |
516 | * _disable_clocks - disable hwmod main clock and interface clocks | |
517 | * @oh: struct omap_hwmod * | |
518 | * | |
519 | * Disables the hwmod @oh main functional and interface clocks. Returns 0. | |
520 | */ | |
521 | static int _disable_clocks(struct omap_hwmod *oh) | |
522 | { | |
523 | struct omap_hwmod_ocp_if *os; | |
524 | int i; | |
525 | ||
526 | pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); | |
527 | ||
528 | if (oh->_clk && !IS_ERR(oh->_clk)) | |
529 | clk_disable(oh->_clk); | |
530 | ||
531 | if (oh->slaves_cnt > 0) { | |
532 | for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { | |
533 | struct clk *c = os->_clk; | |
534 | ||
535 | if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE)) | |
536 | clk_disable(c); | |
537 | } | |
538 | } | |
539 | ||
540 | /* The opt clocks are controlled by the device driver. */ | |
541 | ||
542 | return 0; | |
543 | } | |
544 | ||
545 | /** | |
546 | * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use | |
547 | * @oh: struct omap_hwmod * | |
548 | * | |
549 | * Returns the array index of the OCP slave port that the MPU | |
550 | * addresses the device on, or -EINVAL upon error or not found. | |
551 | */ | |
552 | static int _find_mpu_port_index(struct omap_hwmod *oh) | |
553 | { | |
554 | struct omap_hwmod_ocp_if *os; | |
555 | int i; | |
556 | int found = 0; | |
557 | ||
558 | if (!oh || oh->slaves_cnt == 0) | |
559 | return -EINVAL; | |
560 | ||
561 | for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { | |
562 | if (os->user & OCP_USER_MPU) { | |
563 | found = 1; | |
564 | break; | |
565 | } | |
566 | } | |
567 | ||
568 | if (found) | |
569 | pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n", | |
570 | oh->name, i); | |
571 | else | |
572 | pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n", | |
573 | oh->name); | |
574 | ||
575 | return (found) ? i : -EINVAL; | |
576 | } | |
577 | ||
578 | /** | |
579 | * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU | |
580 | * @oh: struct omap_hwmod * | |
581 | * | |
582 | * Return the virtual address of the base of the register target of | |
583 | * device @oh, or NULL on error. | |
584 | */ | |
585 | static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index) | |
586 | { | |
587 | struct omap_hwmod_ocp_if *os; | |
588 | struct omap_hwmod_addr_space *mem; | |
589 | int i; | |
590 | int found = 0; | |
986a13f5 | 591 | void __iomem *va_start; |
63c85238 PW |
592 | |
593 | if (!oh || oh->slaves_cnt == 0) | |
594 | return NULL; | |
595 | ||
596 | os = *oh->slaves + index; | |
597 | ||
598 | for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) { | |
599 | if (mem->flags & ADDR_TYPE_RT) { | |
600 | found = 1; | |
601 | break; | |
602 | } | |
603 | } | |
604 | ||
986a13f5 TL |
605 | if (found) { |
606 | va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); | |
607 | if (!va_start) { | |
608 | pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name); | |
609 | return NULL; | |
610 | } | |
63c85238 | 611 | pr_debug("omap_hwmod: %s: MPU register target at va %p\n", |
986a13f5 TL |
612 | oh->name, va_start); |
613 | } else { | |
63c85238 PW |
614 | pr_debug("omap_hwmod: %s: no MPU register target found\n", |
615 | oh->name); | |
986a13f5 | 616 | } |
63c85238 | 617 | |
986a13f5 | 618 | return (found) ? va_start : NULL; |
63c85238 PW |
619 | } |
620 | ||
621 | /** | |
622 | * _sysc_enable - try to bring a module out of idle via OCP_SYSCONFIG | |
623 | * @oh: struct omap_hwmod * | |
624 | * | |
625 | * If module is marked as SWSUP_SIDLE, force the module out of slave | |
626 | * idle; otherwise, configure it for smart-idle. If module is marked | |
627 | * as SWSUP_MSUSPEND, force the module out of master standby; | |
628 | * otherwise, configure it for smart-standby. No return value. | |
629 | */ | |
630 | static void _sysc_enable(struct omap_hwmod *oh) | |
631 | { | |
43b40992 | 632 | u8 idlemode, sf; |
63c85238 PW |
633 | u32 v; |
634 | ||
43b40992 | 635 | if (!oh->class->sysc) |
63c85238 PW |
636 | return; |
637 | ||
638 | v = oh->_sysc_cache; | |
43b40992 | 639 | sf = oh->class->sysc->sysc_flags; |
63c85238 | 640 | |
43b40992 | 641 | if (sf & SYSC_HAS_SIDLEMODE) { |
63c85238 PW |
642 | idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? |
643 | HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; | |
644 | _set_slave_idlemode(oh, idlemode, &v); | |
645 | } | |
646 | ||
43b40992 | 647 | if (sf & SYSC_HAS_MIDLEMODE) { |
63c85238 PW |
648 | idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? |
649 | HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; | |
650 | _set_master_standbymode(oh, idlemode, &v); | |
651 | } | |
652 | ||
43b40992 | 653 | if (sf & SYSC_HAS_AUTOIDLE) { |
726072e5 PW |
654 | idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ? |
655 | 0 : 1; | |
656 | _set_module_autoidle(oh, idlemode, &v); | |
657 | } | |
658 | ||
659 | /* XXX OCP ENAWAKEUP bit? */ | |
63c85238 | 660 | |
a16b1f7f PW |
661 | /* |
662 | * XXX The clock framework should handle this, by | |
663 | * calling into this code. But this must wait until the | |
664 | * clock structures are tagged with omap_hwmod entries | |
665 | */ | |
43b40992 PW |
666 | if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) && |
667 | (sf & SYSC_HAS_CLOCKACTIVITY)) | |
668 | _set_clockactivity(oh, oh->class->sysc->clockact, &v); | |
63c85238 PW |
669 | |
670 | _write_sysconfig(v, oh); | |
671 | } | |
672 | ||
673 | /** | |
674 | * _sysc_idle - try to put a module into idle via OCP_SYSCONFIG | |
675 | * @oh: struct omap_hwmod * | |
676 | * | |
677 | * If module is marked as SWSUP_SIDLE, force the module into slave | |
678 | * idle; otherwise, configure it for smart-idle. If module is marked | |
679 | * as SWSUP_MSUSPEND, force the module into master standby; otherwise, | |
680 | * configure it for smart-standby. No return value. | |
681 | */ | |
682 | static void _sysc_idle(struct omap_hwmod *oh) | |
683 | { | |
43b40992 | 684 | u8 idlemode, sf; |
63c85238 PW |
685 | u32 v; |
686 | ||
43b40992 | 687 | if (!oh->class->sysc) |
63c85238 PW |
688 | return; |
689 | ||
690 | v = oh->_sysc_cache; | |
43b40992 | 691 | sf = oh->class->sysc->sysc_flags; |
63c85238 | 692 | |
43b40992 | 693 | if (sf & SYSC_HAS_SIDLEMODE) { |
63c85238 PW |
694 | idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? |
695 | HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; | |
696 | _set_slave_idlemode(oh, idlemode, &v); | |
697 | } | |
698 | ||
43b40992 | 699 | if (sf & SYSC_HAS_MIDLEMODE) { |
63c85238 PW |
700 | idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? |
701 | HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; | |
702 | _set_master_standbymode(oh, idlemode, &v); | |
703 | } | |
704 | ||
705 | _write_sysconfig(v, oh); | |
706 | } | |
707 | ||
708 | /** | |
709 | * _sysc_shutdown - force a module into idle via OCP_SYSCONFIG | |
710 | * @oh: struct omap_hwmod * | |
711 | * | |
712 | * Force the module into slave idle and master suspend. No return | |
713 | * value. | |
714 | */ | |
715 | static void _sysc_shutdown(struct omap_hwmod *oh) | |
716 | { | |
717 | u32 v; | |
43b40992 | 718 | u8 sf; |
63c85238 | 719 | |
43b40992 | 720 | if (!oh->class->sysc) |
63c85238 PW |
721 | return; |
722 | ||
723 | v = oh->_sysc_cache; | |
43b40992 | 724 | sf = oh->class->sysc->sysc_flags; |
63c85238 | 725 | |
43b40992 | 726 | if (sf & SYSC_HAS_SIDLEMODE) |
63c85238 PW |
727 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); |
728 | ||
43b40992 | 729 | if (sf & SYSC_HAS_MIDLEMODE) |
63c85238 PW |
730 | _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); |
731 | ||
43b40992 | 732 | if (sf & SYSC_HAS_AUTOIDLE) |
726072e5 | 733 | _set_module_autoidle(oh, 1, &v); |
63c85238 PW |
734 | |
735 | _write_sysconfig(v, oh); | |
736 | } | |
737 | ||
738 | /** | |
739 | * _lookup - find an omap_hwmod by name | |
740 | * @name: find an omap_hwmod by name | |
741 | * | |
742 | * Return a pointer to an omap_hwmod by name, or NULL if not found. | |
743 | * Caller must hold omap_hwmod_mutex. | |
744 | */ | |
745 | static struct omap_hwmod *_lookup(const char *name) | |
746 | { | |
747 | struct omap_hwmod *oh, *temp_oh; | |
748 | ||
749 | oh = NULL; | |
750 | ||
751 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { | |
752 | if (!strcmp(name, temp_oh->name)) { | |
753 | oh = temp_oh; | |
754 | break; | |
755 | } | |
756 | } | |
757 | ||
758 | return oh; | |
759 | } | |
760 | ||
761 | /** | |
762 | * _init_clocks - clk_get() all clocks associated with this hwmod | |
763 | * @oh: struct omap_hwmod * | |
764 | * | |
765 | * Called by omap_hwmod_late_init() (after omap2_clk_init()). | |
766 | * Resolves all clock names embedded in the hwmod. Must be called | |
767 | * with omap_hwmod_mutex held. Returns -EINVAL if the omap_hwmod | |
768 | * has not yet been registered or if the clocks have already been | |
769 | * initialized, 0 on success, or a non-zero error on failure. | |
770 | */ | |
771 | static int _init_clocks(struct omap_hwmod *oh) | |
772 | { | |
773 | int ret = 0; | |
774 | ||
775 | if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED)) | |
776 | return -EINVAL; | |
777 | ||
778 | pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name); | |
779 | ||
780 | ret |= _init_main_clk(oh); | |
781 | ret |= _init_interface_clks(oh); | |
782 | ret |= _init_opt_clks(oh); | |
783 | ||
784 | oh->_state = _HWMOD_STATE_CLKS_INITED; | |
785 | ||
786 | return ret; | |
787 | } | |
788 | ||
789 | /** | |
790 | * _wait_target_ready - wait for a module to leave slave idle | |
791 | * @oh: struct omap_hwmod * | |
792 | * | |
793 | * Wait for a module @oh to leave slave idle. Returns 0 if the module | |
794 | * does not have an IDLEST bit or if the module successfully leaves | |
795 | * slave idle; otherwise, pass along the return value of the | |
796 | * appropriate *_cm_wait_module_ready() function. | |
797 | */ | |
798 | static int _wait_target_ready(struct omap_hwmod *oh) | |
799 | { | |
800 | struct omap_hwmod_ocp_if *os; | |
801 | int ret; | |
802 | ||
803 | if (!oh) | |
804 | return -EINVAL; | |
805 | ||
806 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) | |
807 | return 0; | |
808 | ||
809 | os = *oh->slaves + oh->_mpu_port_index; | |
810 | ||
811 | if (!(os->flags & OCPIF_HAS_IDLEST)) | |
812 | return 0; | |
813 | ||
814 | /* XXX check module SIDLEMODE */ | |
815 | ||
816 | /* XXX check clock enable states */ | |
817 | ||
818 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { | |
819 | ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, | |
820 | oh->prcm.omap2.idlest_reg_id, | |
821 | oh->prcm.omap2.idlest_idle_bit); | |
822 | #if 0 | |
823 | } else if (cpu_is_omap44xx()) { | |
824 | ret = omap4_cm_wait_module_ready(oh->prcm.omap4.module_offs, | |
825 | oh->prcm.omap4.device_offs); | |
826 | #endif | |
827 | } else { | |
828 | BUG(); | |
829 | }; | |
830 | ||
831 | return ret; | |
832 | } | |
833 | ||
834 | /** | |
835 | * _reset - reset an omap_hwmod | |
836 | * @oh: struct omap_hwmod * | |
837 | * | |
838 | * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be | |
839 | * enabled for this to work. Must be called with omap_hwmod_mutex | |
840 | * held. Returns -EINVAL if the hwmod cannot be reset this way or if | |
841 | * the hwmod is in the wrong state, -ETIMEDOUT if the module did not | |
842 | * reset in time, or 0 upon success. | |
843 | */ | |
844 | static int _reset(struct omap_hwmod *oh) | |
845 | { | |
846 | u32 r, v; | |
6f8b7ff5 | 847 | int c = 0; |
63c85238 | 848 | |
43b40992 PW |
849 | if (!oh->class->sysc || |
850 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET) || | |
851 | (oh->class->sysc->sysc_flags & SYSS_MISSING)) | |
63c85238 PW |
852 | return -EINVAL; |
853 | ||
854 | /* clocks must be on for this operation */ | |
855 | if (oh->_state != _HWMOD_STATE_ENABLED) { | |
856 | WARN(1, "omap_hwmod: %s: reset can only be entered from " | |
857 | "enabled state\n", oh->name); | |
858 | return -EINVAL; | |
859 | } | |
860 | ||
861 | pr_debug("omap_hwmod: %s: resetting\n", oh->name); | |
862 | ||
863 | v = oh->_sysc_cache; | |
864 | r = _set_softreset(oh, &v); | |
865 | if (r) | |
866 | return r; | |
867 | _write_sysconfig(v, oh); | |
868 | ||
43b40992 | 869 | omap_test_timeout((omap_hwmod_readl(oh, oh->class->sysc->syss_offs) & |
6f8b7ff5 PW |
870 | SYSS_RESETDONE_MASK), |
871 | MAX_MODULE_RESET_WAIT, c); | |
63c85238 PW |
872 | |
873 | if (c == MAX_MODULE_RESET_WAIT) | |
874 | WARN(1, "omap_hwmod: %s: failed to reset in %d usec\n", | |
875 | oh->name, MAX_MODULE_RESET_WAIT); | |
876 | else | |
02bfc030 | 877 | pr_debug("omap_hwmod: %s: reset in %d usec\n", oh->name, c); |
63c85238 PW |
878 | |
879 | /* | |
880 | * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from | |
881 | * _wait_target_ready() or _reset() | |
882 | */ | |
883 | ||
884 | return (c == MAX_MODULE_RESET_WAIT) ? -ETIMEDOUT : 0; | |
885 | } | |
886 | ||
887 | /** | |
888 | * _enable - enable an omap_hwmod | |
889 | * @oh: struct omap_hwmod * | |
890 | * | |
891 | * Enables an omap_hwmod @oh such that the MPU can access the hwmod's | |
892 | * register target. Must be called with omap_hwmod_mutex held. | |
893 | * Returns -EINVAL if the hwmod is in the wrong state or passes along | |
894 | * the return value of _wait_target_ready(). | |
895 | */ | |
896 | static int _enable(struct omap_hwmod *oh) | |
897 | { | |
898 | int r; | |
899 | ||
900 | if (oh->_state != _HWMOD_STATE_INITIALIZED && | |
901 | oh->_state != _HWMOD_STATE_IDLE && | |
902 | oh->_state != _HWMOD_STATE_DISABLED) { | |
903 | WARN(1, "omap_hwmod: %s: enabled state can only be entered " | |
904 | "from initialized, idle, or disabled state\n", oh->name); | |
905 | return -EINVAL; | |
906 | } | |
907 | ||
908 | pr_debug("omap_hwmod: %s: enabling\n", oh->name); | |
909 | ||
910 | /* XXX mux balls */ | |
911 | ||
912 | _add_initiator_dep(oh, mpu_oh); | |
913 | _enable_clocks(oh); | |
914 | ||
43b40992 | 915 | if (oh->class->sysc) { |
63c85238 PW |
916 | if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) |
917 | _update_sysc_cache(oh); | |
918 | _sysc_enable(oh); | |
919 | } | |
920 | ||
921 | r = _wait_target_ready(oh); | |
922 | if (!r) | |
923 | oh->_state = _HWMOD_STATE_ENABLED; | |
924 | ||
925 | return r; | |
926 | } | |
927 | ||
928 | /** | |
929 | * _idle - idle an omap_hwmod | |
930 | * @oh: struct omap_hwmod * | |
931 | * | |
932 | * Idles an omap_hwmod @oh. This should be called once the hwmod has | |
933 | * no further work. Returns -EINVAL if the hwmod is in the wrong | |
934 | * state or returns 0. | |
935 | */ | |
936 | static int _idle(struct omap_hwmod *oh) | |
937 | { | |
938 | if (oh->_state != _HWMOD_STATE_ENABLED) { | |
939 | WARN(1, "omap_hwmod: %s: idle state can only be entered from " | |
940 | "enabled state\n", oh->name); | |
941 | return -EINVAL; | |
942 | } | |
943 | ||
944 | pr_debug("omap_hwmod: %s: idling\n", oh->name); | |
945 | ||
43b40992 | 946 | if (oh->class->sysc) |
63c85238 PW |
947 | _sysc_idle(oh); |
948 | _del_initiator_dep(oh, mpu_oh); | |
949 | _disable_clocks(oh); | |
950 | ||
951 | oh->_state = _HWMOD_STATE_IDLE; | |
952 | ||
953 | return 0; | |
954 | } | |
955 | ||
956 | /** | |
957 | * _shutdown - shutdown an omap_hwmod | |
958 | * @oh: struct omap_hwmod * | |
959 | * | |
960 | * Shut down an omap_hwmod @oh. This should be called when the driver | |
961 | * used for the hwmod is removed or unloaded or if the driver is not | |
962 | * used by the system. Returns -EINVAL if the hwmod is in the wrong | |
963 | * state or returns 0. | |
964 | */ | |
965 | static int _shutdown(struct omap_hwmod *oh) | |
966 | { | |
967 | if (oh->_state != _HWMOD_STATE_IDLE && | |
968 | oh->_state != _HWMOD_STATE_ENABLED) { | |
969 | WARN(1, "omap_hwmod: %s: disabled state can only be entered " | |
970 | "from idle, or enabled state\n", oh->name); | |
971 | return -EINVAL; | |
972 | } | |
973 | ||
974 | pr_debug("omap_hwmod: %s: disabling\n", oh->name); | |
975 | ||
43b40992 | 976 | if (oh->class->sysc) |
63c85238 PW |
977 | _sysc_shutdown(oh); |
978 | _del_initiator_dep(oh, mpu_oh); | |
979 | /* XXX what about the other system initiators here? DMA, tesla, d2d */ | |
980 | _disable_clocks(oh); | |
981 | /* XXX Should this code also force-disable the optional clocks? */ | |
982 | ||
983 | /* XXX mux any associated balls to safe mode */ | |
984 | ||
985 | oh->_state = _HWMOD_STATE_DISABLED; | |
986 | ||
987 | return 0; | |
988 | } | |
989 | ||
63c85238 PW |
990 | /** |
991 | * _setup - do initial configuration of omap_hwmod | |
992 | * @oh: struct omap_hwmod * | |
993 | * | |
994 | * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh | |
995 | * OCP_SYSCONFIG register. Must be called with omap_hwmod_mutex | |
996 | * held. Returns -EINVAL if the hwmod is in the wrong state or returns | |
997 | * 0. | |
998 | */ | |
999 | static int _setup(struct omap_hwmod *oh) | |
1000 | { | |
1001 | struct omap_hwmod_ocp_if *os; | |
1002 | int i; | |
1003 | ||
1004 | if (!oh) | |
1005 | return -EINVAL; | |
1006 | ||
1007 | /* Set iclk autoidle mode */ | |
1008 | if (oh->slaves_cnt > 0) { | |
1009 | for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) { | |
1010 | struct clk *c = os->_clk; | |
1011 | ||
1012 | if (!c || IS_ERR(c)) | |
1013 | continue; | |
1014 | ||
1015 | if (os->flags & OCPIF_SWSUP_IDLE) { | |
1016 | /* XXX omap_iclk_deny_idle(c); */ | |
1017 | } else { | |
1018 | /* XXX omap_iclk_allow_idle(c); */ | |
1019 | clk_enable(c); | |
1020 | } | |
1021 | } | |
1022 | } | |
1023 | ||
1024 | oh->_state = _HWMOD_STATE_INITIALIZED; | |
1025 | ||
1026 | _enable(oh); | |
1027 | ||
b835d014 PW |
1028 | if (!(oh->flags & HWMOD_INIT_NO_RESET)) { |
1029 | /* | |
1030 | * XXX Do the OCP_SYSCONFIG bits need to be | |
1031 | * reprogrammed after a reset? If not, then this can | |
1032 | * be removed. If they do, then probably the | |
1033 | * _enable() function should be split to avoid the | |
1034 | * rewrite of the OCP_SYSCONFIG register. | |
1035 | */ | |
43b40992 | 1036 | if (oh->class->sysc) { |
b835d014 PW |
1037 | _update_sysc_cache(oh); |
1038 | _sysc_enable(oh); | |
1039 | } | |
1040 | } | |
63c85238 PW |
1041 | |
1042 | if (!(oh->flags & HWMOD_INIT_NO_IDLE)) | |
1043 | _idle(oh); | |
1044 | ||
1045 | return 0; | |
1046 | } | |
1047 | ||
1048 | ||
1049 | ||
1050 | /* Public functions */ | |
1051 | ||
1052 | u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs) | |
1053 | { | |
1054 | return __raw_readl(oh->_rt_va + reg_offs); | |
1055 | } | |
1056 | ||
1057 | void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs) | |
1058 | { | |
1059 | __raw_writel(v, oh->_rt_va + reg_offs); | |
1060 | } | |
1061 | ||
46273e6f KH |
1062 | int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode) |
1063 | { | |
1064 | u32 v; | |
1065 | int retval = 0; | |
1066 | ||
1067 | if (!oh) | |
1068 | return -EINVAL; | |
1069 | ||
1070 | v = oh->_sysc_cache; | |
1071 | ||
1072 | retval = _set_slave_idlemode(oh, idlemode, &v); | |
1073 | if (!retval) | |
1074 | _write_sysconfig(v, oh); | |
1075 | ||
1076 | return retval; | |
1077 | } | |
1078 | ||
63c85238 PW |
1079 | /** |
1080 | * omap_hwmod_register - register a struct omap_hwmod | |
1081 | * @oh: struct omap_hwmod * | |
1082 | * | |
43b40992 PW |
1083 | * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod |
1084 | * already has been registered by the same name; -EINVAL if the | |
1085 | * omap_hwmod is in the wrong state, if @oh is NULL, if the | |
1086 | * omap_hwmod's class field is NULL; if the omap_hwmod is missing a | |
1087 | * name, or if the omap_hwmod's class is missing a name; or 0 upon | |
1088 | * success. | |
63c85238 PW |
1089 | * |
1090 | * XXX The data should be copied into bootmem, so the original data | |
1091 | * should be marked __initdata and freed after init. This would allow | |
1092 | * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note | |
1093 | * that the copy process would be relatively complex due to the large number | |
1094 | * of substructures. | |
1095 | */ | |
1096 | int omap_hwmod_register(struct omap_hwmod *oh) | |
1097 | { | |
1098 | int ret, ms_id; | |
1099 | ||
43b40992 PW |
1100 | if (!oh || !oh->name || !oh->class || !oh->class->name || |
1101 | (oh->_state != _HWMOD_STATE_UNKNOWN)) | |
63c85238 PW |
1102 | return -EINVAL; |
1103 | ||
1104 | mutex_lock(&omap_hwmod_mutex); | |
1105 | ||
1106 | pr_debug("omap_hwmod: %s: registering\n", oh->name); | |
1107 | ||
1108 | if (_lookup(oh->name)) { | |
1109 | ret = -EEXIST; | |
1110 | goto ohr_unlock; | |
1111 | } | |
1112 | ||
1113 | ms_id = _find_mpu_port_index(oh); | |
1114 | if (!IS_ERR_VALUE(ms_id)) { | |
1115 | oh->_mpu_port_index = ms_id; | |
1116 | oh->_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); | |
1117 | } else { | |
1118 | oh->_int_flags |= _HWMOD_NO_MPU_PORT; | |
1119 | } | |
1120 | ||
1121 | list_add_tail(&oh->node, &omap_hwmod_list); | |
1122 | ||
1123 | oh->_state = _HWMOD_STATE_REGISTERED; | |
1124 | ||
1125 | ret = 0; | |
1126 | ||
1127 | ohr_unlock: | |
1128 | mutex_unlock(&omap_hwmod_mutex); | |
1129 | return ret; | |
1130 | } | |
1131 | ||
1132 | /** | |
1133 | * omap_hwmod_lookup - look up a registered omap_hwmod by name | |
1134 | * @name: name of the omap_hwmod to look up | |
1135 | * | |
1136 | * Given a @name of an omap_hwmod, return a pointer to the registered | |
1137 | * struct omap_hwmod *, or NULL upon error. | |
1138 | */ | |
1139 | struct omap_hwmod *omap_hwmod_lookup(const char *name) | |
1140 | { | |
1141 | struct omap_hwmod *oh; | |
1142 | ||
1143 | if (!name) | |
1144 | return NULL; | |
1145 | ||
1146 | mutex_lock(&omap_hwmod_mutex); | |
1147 | oh = _lookup(name); | |
1148 | mutex_unlock(&omap_hwmod_mutex); | |
1149 | ||
1150 | return oh; | |
1151 | } | |
1152 | ||
1153 | /** | |
1154 | * omap_hwmod_for_each - call function for each registered omap_hwmod | |
1155 | * @fn: pointer to a callback function | |
1156 | * | |
1157 | * Call @fn for each registered omap_hwmod, passing @data to each | |
1158 | * function. @fn must return 0 for success or any other value for | |
1159 | * failure. If @fn returns non-zero, the iteration across omap_hwmods | |
1160 | * will stop and the non-zero return value will be passed to the | |
1161 | * caller of omap_hwmod_for_each(). @fn is called with | |
1162 | * omap_hwmod_for_each() held. | |
1163 | */ | |
1164 | int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh)) | |
1165 | { | |
1166 | struct omap_hwmod *temp_oh; | |
1167 | int ret; | |
1168 | ||
1169 | if (!fn) | |
1170 | return -EINVAL; | |
1171 | ||
1172 | mutex_lock(&omap_hwmod_mutex); | |
1173 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { | |
1174 | ret = (*fn)(temp_oh); | |
1175 | if (ret) | |
1176 | break; | |
1177 | } | |
1178 | mutex_unlock(&omap_hwmod_mutex); | |
1179 | ||
1180 | return ret; | |
1181 | } | |
1182 | ||
1183 | ||
1184 | /** | |
1185 | * omap_hwmod_init - init omap_hwmod code and register hwmods | |
1186 | * @ohs: pointer to an array of omap_hwmods to register | |
1187 | * | |
1188 | * Intended to be called early in boot before the clock framework is | |
1189 | * initialized. If @ohs is not null, will register all omap_hwmods | |
1190 | * listed in @ohs that are valid for this chip. Returns -EINVAL if | |
1191 | * omap_hwmod_init() has already been called or 0 otherwise. | |
1192 | */ | |
1193 | int omap_hwmod_init(struct omap_hwmod **ohs) | |
1194 | { | |
1195 | struct omap_hwmod *oh; | |
1196 | int r; | |
1197 | ||
1198 | if (inited) | |
1199 | return -EINVAL; | |
1200 | ||
1201 | inited = 1; | |
1202 | ||
1203 | if (!ohs) | |
1204 | return 0; | |
1205 | ||
1206 | oh = *ohs; | |
1207 | while (oh) { | |
1208 | if (omap_chip_is(oh->omap_chip)) { | |
1209 | r = omap_hwmod_register(oh); | |
1210 | WARN(r, "omap_hwmod: %s: omap_hwmod_register returned " | |
1211 | "%d\n", oh->name, r); | |
1212 | } | |
1213 | oh = *++ohs; | |
1214 | } | |
1215 | ||
1216 | return 0; | |
1217 | } | |
1218 | ||
1219 | /** | |
1220 | * omap_hwmod_late_init - do some post-clock framework initialization | |
1221 | * | |
1222 | * Must be called after omap2_clk_init(). Resolves the struct clk names | |
1223 | * to struct clk pointers for each registered omap_hwmod. Also calls | |
1224 | * _setup() on each hwmod. Returns 0. | |
1225 | */ | |
1226 | int omap_hwmod_late_init(void) | |
1227 | { | |
1228 | int r; | |
1229 | ||
1230 | /* XXX check return value */ | |
1231 | r = omap_hwmod_for_each(_init_clocks); | |
1232 | WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n"); | |
1233 | ||
1234 | mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME); | |
1235 | WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n", | |
1236 | MPU_INITIATOR_NAME); | |
1237 | ||
1238 | omap_hwmod_for_each(_setup); | |
1239 | ||
1240 | return 0; | |
1241 | } | |
1242 | ||
1243 | /** | |
1244 | * omap_hwmod_unregister - unregister an omap_hwmod | |
1245 | * @oh: struct omap_hwmod * | |
1246 | * | |
1247 | * Unregisters a previously-registered omap_hwmod @oh. There's probably | |
1248 | * no use case for this, so it is likely to be removed in a later version. | |
1249 | * | |
1250 | * XXX Free all of the bootmem-allocated structures here when that is | |
1251 | * implemented. Make it clear that core code is the only code that is | |
1252 | * expected to unregister modules. | |
1253 | */ | |
1254 | int omap_hwmod_unregister(struct omap_hwmod *oh) | |
1255 | { | |
1256 | if (!oh) | |
1257 | return -EINVAL; | |
1258 | ||
1259 | pr_debug("omap_hwmod: %s: unregistering\n", oh->name); | |
1260 | ||
1261 | mutex_lock(&omap_hwmod_mutex); | |
986a13f5 | 1262 | iounmap(oh->_rt_va); |
63c85238 PW |
1263 | list_del(&oh->node); |
1264 | mutex_unlock(&omap_hwmod_mutex); | |
1265 | ||
1266 | return 0; | |
1267 | } | |
1268 | ||
1269 | /** | |
1270 | * omap_hwmod_enable - enable an omap_hwmod | |
1271 | * @oh: struct omap_hwmod * | |
1272 | * | |
1273 | * Enable an omap_hwomd @oh. Intended to be called by omap_device_enable(). | |
1274 | * Returns -EINVAL on error or passes along the return value from _enable(). | |
1275 | */ | |
1276 | int omap_hwmod_enable(struct omap_hwmod *oh) | |
1277 | { | |
1278 | int r; | |
1279 | ||
1280 | if (!oh) | |
1281 | return -EINVAL; | |
1282 | ||
1283 | mutex_lock(&omap_hwmod_mutex); | |
1284 | r = _enable(oh); | |
1285 | mutex_unlock(&omap_hwmod_mutex); | |
1286 | ||
1287 | return r; | |
1288 | } | |
1289 | ||
1290 | /** | |
1291 | * omap_hwmod_idle - idle an omap_hwmod | |
1292 | * @oh: struct omap_hwmod * | |
1293 | * | |
1294 | * Idle an omap_hwomd @oh. Intended to be called by omap_device_idle(). | |
1295 | * Returns -EINVAL on error or passes along the return value from _idle(). | |
1296 | */ | |
1297 | int omap_hwmod_idle(struct omap_hwmod *oh) | |
1298 | { | |
1299 | if (!oh) | |
1300 | return -EINVAL; | |
1301 | ||
1302 | mutex_lock(&omap_hwmod_mutex); | |
1303 | _idle(oh); | |
1304 | mutex_unlock(&omap_hwmod_mutex); | |
1305 | ||
1306 | return 0; | |
1307 | } | |
1308 | ||
1309 | /** | |
1310 | * omap_hwmod_shutdown - shutdown an omap_hwmod | |
1311 | * @oh: struct omap_hwmod * | |
1312 | * | |
1313 | * Shutdown an omap_hwomd @oh. Intended to be called by | |
1314 | * omap_device_shutdown(). Returns -EINVAL on error or passes along | |
1315 | * the return value from _shutdown(). | |
1316 | */ | |
1317 | int omap_hwmod_shutdown(struct omap_hwmod *oh) | |
1318 | { | |
1319 | if (!oh) | |
1320 | return -EINVAL; | |
1321 | ||
1322 | mutex_lock(&omap_hwmod_mutex); | |
1323 | _shutdown(oh); | |
1324 | mutex_unlock(&omap_hwmod_mutex); | |
1325 | ||
1326 | return 0; | |
1327 | } | |
1328 | ||
1329 | /** | |
1330 | * omap_hwmod_enable_clocks - enable main_clk, all interface clocks | |
1331 | * @oh: struct omap_hwmod *oh | |
1332 | * | |
1333 | * Intended to be called by the omap_device code. | |
1334 | */ | |
1335 | int omap_hwmod_enable_clocks(struct omap_hwmod *oh) | |
1336 | { | |
1337 | mutex_lock(&omap_hwmod_mutex); | |
1338 | _enable_clocks(oh); | |
1339 | mutex_unlock(&omap_hwmod_mutex); | |
1340 | ||
1341 | return 0; | |
1342 | } | |
1343 | ||
1344 | /** | |
1345 | * omap_hwmod_disable_clocks - disable main_clk, all interface clocks | |
1346 | * @oh: struct omap_hwmod *oh | |
1347 | * | |
1348 | * Intended to be called by the omap_device code. | |
1349 | */ | |
1350 | int omap_hwmod_disable_clocks(struct omap_hwmod *oh) | |
1351 | { | |
1352 | mutex_lock(&omap_hwmod_mutex); | |
1353 | _disable_clocks(oh); | |
1354 | mutex_unlock(&omap_hwmod_mutex); | |
1355 | ||
1356 | return 0; | |
1357 | } | |
1358 | ||
1359 | /** | |
1360 | * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete | |
1361 | * @oh: struct omap_hwmod *oh | |
1362 | * | |
1363 | * Intended to be called by drivers and core code when all posted | |
1364 | * writes to a device must complete before continuing further | |
1365 | * execution (for example, after clearing some device IRQSTATUS | |
1366 | * register bits) | |
1367 | * | |
1368 | * XXX what about targets with multiple OCP threads? | |
1369 | */ | |
1370 | void omap_hwmod_ocp_barrier(struct omap_hwmod *oh) | |
1371 | { | |
1372 | BUG_ON(!oh); | |
1373 | ||
43b40992 | 1374 | if (!oh->class->sysc || !oh->class->sysc->sysc_flags) { |
63c85238 PW |
1375 | WARN(1, "omap_device: %s: OCP barrier impossible due to " |
1376 | "device configuration\n", oh->name); | |
1377 | return; | |
1378 | } | |
1379 | ||
1380 | /* | |
1381 | * Forces posted writes to complete on the OCP thread handling | |
1382 | * register writes | |
1383 | */ | |
43b40992 | 1384 | omap_hwmod_readl(oh, oh->class->sysc->sysc_offs); |
63c85238 PW |
1385 | } |
1386 | ||
1387 | /** | |
1388 | * omap_hwmod_reset - reset the hwmod | |
1389 | * @oh: struct omap_hwmod * | |
1390 | * | |
1391 | * Under some conditions, a driver may wish to reset the entire device. | |
1392 | * Called from omap_device code. Returns -EINVAL on error or passes along | |
1393 | * the return value from _reset()/_enable(). | |
1394 | */ | |
1395 | int omap_hwmod_reset(struct omap_hwmod *oh) | |
1396 | { | |
1397 | int r; | |
1398 | ||
1399 | if (!oh || !(oh->_state & _HWMOD_STATE_ENABLED)) | |
1400 | return -EINVAL; | |
1401 | ||
1402 | mutex_lock(&omap_hwmod_mutex); | |
1403 | r = _reset(oh); | |
1404 | if (!r) | |
1405 | r = _enable(oh); | |
1406 | mutex_unlock(&omap_hwmod_mutex); | |
1407 | ||
1408 | return r; | |
1409 | } | |
1410 | ||
1411 | /** | |
1412 | * omap_hwmod_count_resources - count number of struct resources needed by hwmod | |
1413 | * @oh: struct omap_hwmod * | |
1414 | * @res: pointer to the first element of an array of struct resource to fill | |
1415 | * | |
1416 | * Count the number of struct resource array elements necessary to | |
1417 | * contain omap_hwmod @oh resources. Intended to be called by code | |
1418 | * that registers omap_devices. Intended to be used to determine the | |
1419 | * size of a dynamically-allocated struct resource array, before | |
1420 | * calling omap_hwmod_fill_resources(). Returns the number of struct | |
1421 | * resource array elements needed. | |
1422 | * | |
1423 | * XXX This code is not optimized. It could attempt to merge adjacent | |
1424 | * resource IDs. | |
1425 | * | |
1426 | */ | |
1427 | int omap_hwmod_count_resources(struct omap_hwmod *oh) | |
1428 | { | |
1429 | int ret, i; | |
1430 | ||
1431 | ret = oh->mpu_irqs_cnt + oh->sdma_chs_cnt; | |
1432 | ||
1433 | for (i = 0; i < oh->slaves_cnt; i++) | |
1434 | ret += (*oh->slaves + i)->addr_cnt; | |
1435 | ||
1436 | return ret; | |
1437 | } | |
1438 | ||
1439 | /** | |
1440 | * omap_hwmod_fill_resources - fill struct resource array with hwmod data | |
1441 | * @oh: struct omap_hwmod * | |
1442 | * @res: pointer to the first element of an array of struct resource to fill | |
1443 | * | |
1444 | * Fill the struct resource array @res with resource data from the | |
1445 | * omap_hwmod @oh. Intended to be called by code that registers | |
1446 | * omap_devices. See also omap_hwmod_count_resources(). Returns the | |
1447 | * number of array elements filled. | |
1448 | */ | |
1449 | int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) | |
1450 | { | |
1451 | int i, j; | |
1452 | int r = 0; | |
1453 | ||
1454 | /* For each IRQ, DMA, memory area, fill in array.*/ | |
1455 | ||
1456 | for (i = 0; i < oh->mpu_irqs_cnt; i++) { | |
718bfd76 PW |
1457 | (res + r)->name = (oh->mpu_irqs + i)->name; |
1458 | (res + r)->start = (oh->mpu_irqs + i)->irq; | |
1459 | (res + r)->end = (oh->mpu_irqs + i)->irq; | |
63c85238 PW |
1460 | (res + r)->flags = IORESOURCE_IRQ; |
1461 | r++; | |
1462 | } | |
1463 | ||
1464 | for (i = 0; i < oh->sdma_chs_cnt; i++) { | |
1465 | (res + r)->name = (oh->sdma_chs + i)->name; | |
1466 | (res + r)->start = (oh->sdma_chs + i)->dma_ch; | |
1467 | (res + r)->end = (oh->sdma_chs + i)->dma_ch; | |
1468 | (res + r)->flags = IORESOURCE_DMA; | |
1469 | r++; | |
1470 | } | |
1471 | ||
1472 | for (i = 0; i < oh->slaves_cnt; i++) { | |
1473 | struct omap_hwmod_ocp_if *os; | |
1474 | ||
1475 | os = *oh->slaves + i; | |
1476 | ||
1477 | for (j = 0; j < os->addr_cnt; j++) { | |
1478 | (res + r)->start = (os->addr + j)->pa_start; | |
1479 | (res + r)->end = (os->addr + j)->pa_end; | |
1480 | (res + r)->flags = IORESOURCE_MEM; | |
1481 | r++; | |
1482 | } | |
1483 | } | |
1484 | ||
1485 | return r; | |
1486 | } | |
1487 | ||
1488 | /** | |
1489 | * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain | |
1490 | * @oh: struct omap_hwmod * | |
1491 | * | |
1492 | * Return the powerdomain pointer associated with the OMAP module | |
1493 | * @oh's main clock. If @oh does not have a main clk, return the | |
1494 | * powerdomain associated with the interface clock associated with the | |
1495 | * module's MPU port. (XXX Perhaps this should use the SDMA port | |
1496 | * instead?) Returns NULL on error, or a struct powerdomain * on | |
1497 | * success. | |
1498 | */ | |
1499 | struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) | |
1500 | { | |
1501 | struct clk *c; | |
1502 | ||
1503 | if (!oh) | |
1504 | return NULL; | |
1505 | ||
1506 | if (oh->_clk) { | |
1507 | c = oh->_clk; | |
1508 | } else { | |
1509 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) | |
1510 | return NULL; | |
1511 | c = oh->slaves[oh->_mpu_port_index]->_clk; | |
1512 | } | |
1513 | ||
d5647c18 TG |
1514 | if (!c->clkdm) |
1515 | return NULL; | |
1516 | ||
63c85238 PW |
1517 | return c->clkdm->pwrdm.ptr; |
1518 | ||
1519 | } | |
1520 | ||
1521 | /** | |
1522 | * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh | |
1523 | * @oh: struct omap_hwmod * | |
1524 | * @init_oh: struct omap_hwmod * (initiator) | |
1525 | * | |
1526 | * Add a sleep dependency between the initiator @init_oh and @oh. | |
1527 | * Intended to be called by DSP/Bridge code via platform_data for the | |
1528 | * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge | |
1529 | * code needs to add/del initiator dependencies dynamically | |
1530 | * before/after accessing a device. Returns the return value from | |
1531 | * _add_initiator_dep(). | |
1532 | * | |
1533 | * XXX Keep a usecount in the clockdomain code | |
1534 | */ | |
1535 | int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, | |
1536 | struct omap_hwmod *init_oh) | |
1537 | { | |
1538 | return _add_initiator_dep(oh, init_oh); | |
1539 | } | |
1540 | ||
1541 | /* | |
1542 | * XXX what about functions for drivers to save/restore ocp_sysconfig | |
1543 | * for context save/restore operations? | |
1544 | */ | |
1545 | ||
1546 | /** | |
1547 | * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh | |
1548 | * @oh: struct omap_hwmod * | |
1549 | * @init_oh: struct omap_hwmod * (initiator) | |
1550 | * | |
1551 | * Remove a sleep dependency between the initiator @init_oh and @oh. | |
1552 | * Intended to be called by DSP/Bridge code via platform_data for the | |
1553 | * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge | |
1554 | * code needs to add/del initiator dependencies dynamically | |
1555 | * before/after accessing a device. Returns the return value from | |
1556 | * _del_initiator_dep(). | |
1557 | * | |
1558 | * XXX Keep a usecount in the clockdomain code | |
1559 | */ | |
1560 | int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, | |
1561 | struct omap_hwmod *init_oh) | |
1562 | { | |
1563 | return _del_initiator_dep(oh, init_oh); | |
1564 | } | |
1565 | ||
63c85238 PW |
1566 | /** |
1567 | * omap_hwmod_enable_wakeup - allow device to wake up the system | |
1568 | * @oh: struct omap_hwmod * | |
1569 | * | |
1570 | * Sets the module OCP socket ENAWAKEUP bit to allow the module to | |
1571 | * send wakeups to the PRCM. Eventually this should sets PRCM wakeup | |
1572 | * registers to cause the PRCM to receive wakeup events from the | |
1573 | * module. Does not set any wakeup routing registers beyond this | |
1574 | * point - if the module is to wake up any other module or subsystem, | |
1575 | * that must be set separately. Called by omap_device code. Returns | |
1576 | * -EINVAL on error or 0 upon success. | |
1577 | */ | |
1578 | int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) | |
1579 | { | |
43b40992 PW |
1580 | if (!oh->class->sysc || |
1581 | !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) | |
63c85238 PW |
1582 | return -EINVAL; |
1583 | ||
1584 | mutex_lock(&omap_hwmod_mutex); | |
1585 | _enable_wakeup(oh); | |
1586 | mutex_unlock(&omap_hwmod_mutex); | |
1587 | ||
1588 | return 0; | |
1589 | } | |
1590 | ||
1591 | /** | |
1592 | * omap_hwmod_disable_wakeup - prevent device from waking the system | |
1593 | * @oh: struct omap_hwmod * | |
1594 | * | |
1595 | * Clears the module OCP socket ENAWAKEUP bit to prevent the module | |
1596 | * from sending wakeups to the PRCM. Eventually this should clear | |
1597 | * PRCM wakeup registers to cause the PRCM to ignore wakeup events | |
1598 | * from the module. Does not set any wakeup routing registers beyond | |
1599 | * this point - if the module is to wake up any other module or | |
1600 | * subsystem, that must be set separately. Called by omap_device | |
1601 | * code. Returns -EINVAL on error or 0 upon success. | |
1602 | */ | |
1603 | int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) | |
1604 | { | |
43b40992 PW |
1605 | if (!oh->class->sysc || |
1606 | !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) | |
63c85238 PW |
1607 | return -EINVAL; |
1608 | ||
1609 | mutex_lock(&omap_hwmod_mutex); | |
1610 | _disable_wakeup(oh); | |
1611 | mutex_unlock(&omap_hwmod_mutex); | |
1612 | ||
1613 | return 0; | |
1614 | } | |
43b40992 PW |
1615 | |
1616 | /** | |
1617 | * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname | |
1618 | * @classname: struct omap_hwmod_class name to search for | |
1619 | * @fn: callback function pointer to call for each hwmod in class @classname | |
1620 | * @user: arbitrary context data to pass to the callback function | |
1621 | * | |
1622 | * For each omap_hwmod of class @classname, call @fn. Takes | |
1623 | * omap_hwmod_mutex to prevent the hwmod list from changing during the | |
1624 | * iteration. If the callback function returns something other than | |
1625 | * zero, the iterator is terminated, and the callback function's return | |
1626 | * value is passed back to the caller. Returns 0 upon success, -EINVAL | |
1627 | * if @classname or @fn are NULL, or passes back the error code from @fn. | |
1628 | */ | |
1629 | int omap_hwmod_for_each_by_class(const char *classname, | |
1630 | int (*fn)(struct omap_hwmod *oh, | |
1631 | void *user), | |
1632 | void *user) | |
1633 | { | |
1634 | struct omap_hwmod *temp_oh; | |
1635 | int ret = 0; | |
1636 | ||
1637 | if (!classname || !fn) | |
1638 | return -EINVAL; | |
1639 | ||
1640 | pr_debug("omap_hwmod: %s: looking for modules of class %s\n", | |
1641 | __func__, classname); | |
1642 | ||
1643 | mutex_lock(&omap_hwmod_mutex); | |
1644 | ||
1645 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { | |
1646 | if (!strcmp(temp_oh->class->name, classname)) { | |
1647 | pr_debug("omap_hwmod: %s: %s: calling callback fn\n", | |
1648 | __func__, temp_oh->name); | |
1649 | ret = (*fn)(temp_oh, user); | |
1650 | if (ret) | |
1651 | break; | |
1652 | } | |
1653 | } | |
1654 | ||
1655 | mutex_unlock(&omap_hwmod_mutex); | |
1656 | ||
1657 | if (ret) | |
1658 | pr_debug("omap_hwmod: %s: iterator terminated early: %d\n", | |
1659 | __func__, ret); | |
1660 | ||
1661 | return ret; | |
1662 | } | |
1663 |