Merge branch 'x86-debug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / arm / mach-omap2 / omap_hwmod.c
CommitLineData
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1/*
2 * omap_hwmod implementation for OMAP2/3/4
3 *
550c8092 4 * Copyright (C) 2009-2011 Nokia Corporation
30e105c0 5 * Copyright (C) 2011-2012 Texas Instruments, Inc.
63c85238 6 *
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7 * Paul Walmsley, Benoît Cousson, Kevin Hilman
8 *
9 * Created in collaboration with (alphabetical order): Thara Gopinath,
10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11 * Sawant, Santosh Shilimkar, Richard Woodruff
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12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
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17 * Introduction
18 * ------------
19 * One way to view an OMAP SoC is as a collection of largely unrelated
20 * IP blocks connected by interconnects. The IP blocks include
21 * devices such as ARM processors, audio serial interfaces, UARTs,
22 * etc. Some of these devices, like the DSP, are created by TI;
23 * others, like the SGX, largely originate from external vendors. In
24 * TI's documentation, on-chip devices are referred to as "OMAP
25 * modules." Some of these IP blocks are identical across several
26 * OMAP versions. Others are revised frequently.
63c85238 27 *
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28 * These OMAP modules are tied together by various interconnects.
29 * Most of the address and data flow between modules is via OCP-based
30 * interconnects such as the L3 and L4 buses; but there are other
31 * interconnects that distribute the hardware clock tree, handle idle
32 * and reset signaling, supply power, and connect the modules to
33 * various pads or balls on the OMAP package.
34 *
35 * OMAP hwmod provides a consistent way to describe the on-chip
36 * hardware blocks and their integration into the rest of the chip.
37 * This description can be automatically generated from the TI
38 * hardware database. OMAP hwmod provides a standard, consistent API
39 * to reset, enable, idle, and disable these hardware blocks. And
40 * hwmod provides a way for other core code, such as the Linux device
41 * code or the OMAP power management and address space mapping code,
42 * to query the hardware database.
43 *
44 * Using hwmod
45 * -----------
46 * Drivers won't call hwmod functions directly. That is done by the
47 * omap_device code, and in rare occasions, by custom integration code
48 * in arch/arm/ *omap*. The omap_device code includes functions to
49 * build a struct platform_device using omap_hwmod data, and that is
50 * currently how hwmod data is communicated to drivers and to the
51 * Linux driver model. Most drivers will call omap_hwmod functions only
52 * indirectly, via pm_runtime*() functions.
53 *
54 * From a layering perspective, here is where the OMAP hwmod code
55 * fits into the kernel software stack:
56 *
57 * +-------------------------------+
58 * | Device driver code |
59 * | (e.g., drivers/) |
60 * +-------------------------------+
61 * | Linux driver model |
62 * | (platform_device / |
63 * | platform_driver data/code) |
64 * +-------------------------------+
65 * | OMAP core-driver integration |
66 * |(arch/arm/mach-omap2/devices.c)|
67 * +-------------------------------+
68 * | omap_device code |
69 * | (../plat-omap/omap_device.c) |
70 * +-------------------------------+
71 * ----> | omap_hwmod code/data | <-----
72 * | (../mach-omap2/omap_hwmod*) |
73 * +-------------------------------+
74 * | OMAP clock/PRCM/register fns |
75 * | (__raw_{read,write}l, clk*) |
76 * +-------------------------------+
77 *
78 * Device drivers should not contain any OMAP-specific code or data in
79 * them. They should only contain code to operate the IP block that
80 * the driver is responsible for. This is because these IP blocks can
81 * also appear in other SoCs, either from TI (such as DaVinci) or from
82 * other manufacturers; and drivers should be reusable across other
83 * platforms.
84 *
85 * The OMAP hwmod code also will attempt to reset and idle all on-chip
86 * devices upon boot. The goal here is for the kernel to be
87 * completely self-reliant and independent from bootloaders. This is
88 * to ensure a repeatable configuration, both to ensure consistent
89 * runtime behavior, and to make it easier for others to reproduce
90 * bugs.
91 *
92 * OMAP module activity states
93 * ---------------------------
94 * The hwmod code considers modules to be in one of several activity
95 * states. IP blocks start out in an UNKNOWN state, then once they
96 * are registered via the hwmod code, proceed to the REGISTERED state.
97 * Once their clock names are resolved to clock pointers, the module
98 * enters the CLKS_INITED state; and finally, once the module has been
99 * reset and the integration registers programmed, the INITIALIZED state
100 * is entered. The hwmod code will then place the module into either
101 * the IDLE state to save power, or in the case of a critical system
102 * module, the ENABLED state.
103 *
104 * OMAP core integration code can then call omap_hwmod*() functions
105 * directly to move the module between the IDLE, ENABLED, and DISABLED
106 * states, as needed. This is done during both the PM idle loop, and
107 * in the OMAP core integration code's implementation of the PM runtime
108 * functions.
109 *
110 * References
111 * ----------
112 * This is a partial list.
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113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117 * - Open Core Protocol Specification 2.2
118 *
119 * To do:
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120 * - handle IO mapping
121 * - bus throughput & module latency measurement code
122 *
123 * XXX add tests at the beginning of each function to ensure the hwmod is
124 * in the appropriate state
125 * XXX error return values should be checked to ensure that they are
126 * appropriate
127 */
128#undef DEBUG
129
130#include <linux/kernel.h>
131#include <linux/errno.h>
132#include <linux/io.h>
133#include <linux/clk.h>
134#include <linux/delay.h>
135#include <linux/err.h>
136#include <linux/list.h>
137#include <linux/mutex.h>
dc6d1cda 138#include <linux/spinlock.h>
abc2d545 139#include <linux/slab.h>
2221b5cd 140#include <linux/bootmem.h>
63c85238 141
4e65331c 142#include "common.h"
ce491cf8 143#include <plat/cpu.h>
1540f214 144#include "clockdomain.h"
72e06d08 145#include "powerdomain.h"
ce491cf8
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146#include <plat/clock.h>
147#include <plat/omap_hwmod.h>
5365efbe 148#include <plat/prcm.h>
63c85238 149
59fb659b 150#include "cm2xxx_3xxx.h"
d0f0631d 151#include "cminst44xx.h"
59fb659b 152#include "prm2xxx_3xxx.h"
d198b514 153#include "prm44xx.h"
eaac329d 154#include "prminst44xx.h"
8d9af88f 155#include "mux.h"
63c85238 156
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157/* Maximum microseconds to wait for OMAP module to softreset */
158#define MAX_MODULE_SOFTRESET_WAIT 10000
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159
160/* Name of the OMAP hwmod for the MPU */
5c2c0296 161#define MPU_INITIATOR_NAME "mpu"
63c85238 162
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163/*
164 * Number of struct omap_hwmod_link records per struct
165 * omap_hwmod_ocp_if record (master->slave and slave->master)
166 */
167#define LINKS_PER_OCP_IF 2
168
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169/* omap_hwmod_list contains all registered struct omap_hwmods */
170static LIST_HEAD(omap_hwmod_list);
171
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172/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
173static struct omap_hwmod *mpu_oh;
174
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175/*
176 * linkspace: ptr to a buffer that struct omap_hwmod_link records are
177 * allocated from - used to reduce the number of small memory
178 * allocations, which has a significant impact on performance
179 */
180static struct omap_hwmod_link *linkspace;
181
182/*
183 * free_ls, max_ls: array indexes into linkspace; representing the
184 * next free struct omap_hwmod_link index, and the maximum number of
185 * struct omap_hwmod_link records allocated (respectively)
186 */
187static unsigned short free_ls, max_ls, ls_supp;
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188
189/* Private functions */
190
5d95dde7 191/**
11cd4b94 192 * _fetch_next_ocp_if - return the next OCP interface in a list
2221b5cd 193 * @p: ptr to a ptr to the list_head inside the ocp_if to return
11cd4b94
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194 * @i: pointer to the index of the element pointed to by @p in the list
195 *
196 * Return a pointer to the struct omap_hwmod_ocp_if record
197 * containing the struct list_head pointed to by @p, and increment
198 * @p such that a future call to this routine will return the next
199 * record.
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200 */
201static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
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202 int *i)
203{
204 struct omap_hwmod_ocp_if *oi;
205
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206 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
207 *p = (*p)->next;
2221b5cd 208
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209 *i = *i + 1;
210
211 return oi;
212}
213
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214/**
215 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
216 * @oh: struct omap_hwmod *
217 *
218 * Load the current value of the hwmod OCP_SYSCONFIG register into the
219 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
220 * OCP_SYSCONFIG register or 0 upon success.
221 */
222static int _update_sysc_cache(struct omap_hwmod *oh)
223{
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224 if (!oh->class->sysc) {
225 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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226 return -EINVAL;
227 }
228
229 /* XXX ensure module interface clock is up */
230
cc7a1d2a 231 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238 232
43b40992 233 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
883edfdd 234 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
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235
236 return 0;
237}
238
239/**
240 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
241 * @v: OCP_SYSCONFIG value to write
242 * @oh: struct omap_hwmod *
243 *
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244 * Write @v into the module class' OCP_SYSCONFIG register, if it has
245 * one. No return value.
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246 */
247static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
248{
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249 if (!oh->class->sysc) {
250 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
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251 return;
252 }
253
254 /* XXX ensure module interface clock is up */
255
233cbe5b
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256 /* Module might have lost context, always update cache and register */
257 oh->_sysc_cache = v;
258 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
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259}
260
261/**
262 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
263 * @oh: struct omap_hwmod *
264 * @standbymode: MIDLEMODE field bits
265 * @v: pointer to register contents to modify
266 *
267 * Update the master standby mode bits in @v to be @standbymode for
268 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
269 * upon error or 0 upon success.
270 */
271static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
272 u32 *v)
273{
358f0e63
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274 u32 mstandby_mask;
275 u8 mstandby_shift;
276
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277 if (!oh->class->sysc ||
278 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
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279 return -EINVAL;
280
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281 if (!oh->class->sysc->sysc_fields) {
282 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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283 return -EINVAL;
284 }
285
43b40992 286 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
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287 mstandby_mask = (0x3 << mstandby_shift);
288
289 *v &= ~mstandby_mask;
290 *v |= __ffs(standbymode) << mstandby_shift;
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291
292 return 0;
293}
294
295/**
296 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
297 * @oh: struct omap_hwmod *
298 * @idlemode: SIDLEMODE field bits
299 * @v: pointer to register contents to modify
300 *
301 * Update the slave idle mode bits in @v to be @idlemode for the @oh
302 * hwmod. Does not write to the hardware. Returns -EINVAL upon error
303 * or 0 upon success.
304 */
305static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
306{
358f0e63
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307 u32 sidle_mask;
308 u8 sidle_shift;
309
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310 if (!oh->class->sysc ||
311 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
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312 return -EINVAL;
313
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314 if (!oh->class->sysc->sysc_fields) {
315 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
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316 return -EINVAL;
317 }
318
43b40992 319 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
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320 sidle_mask = (0x3 << sidle_shift);
321
322 *v &= ~sidle_mask;
323 *v |= __ffs(idlemode) << sidle_shift;
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324
325 return 0;
326}
327
328/**
329 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
330 * @oh: struct omap_hwmod *
331 * @clockact: CLOCKACTIVITY field bits
332 * @v: pointer to register contents to modify
333 *
334 * Update the clockactivity mode bits in @v to be @clockact for the
335 * @oh hwmod. Used for additional powersaving on some modules. Does
336 * not write to the hardware. Returns -EINVAL upon error or 0 upon
337 * success.
338 */
339static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
340{
358f0e63
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341 u32 clkact_mask;
342 u8 clkact_shift;
343
43b40992
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344 if (!oh->class->sysc ||
345 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
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346 return -EINVAL;
347
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348 if (!oh->class->sysc->sysc_fields) {
349 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
350 return -EINVAL;
351 }
352
43b40992 353 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
358f0e63
TG
354 clkact_mask = (0x3 << clkact_shift);
355
356 *v &= ~clkact_mask;
357 *v |= clockact << clkact_shift;
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358
359 return 0;
360}
361
362/**
363 * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
364 * @oh: struct omap_hwmod *
365 * @v: pointer to register contents to modify
366 *
367 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
368 * error or 0 upon success.
369 */
370static int _set_softreset(struct omap_hwmod *oh, u32 *v)
371{
358f0e63
TG
372 u32 softrst_mask;
373
43b40992
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374 if (!oh->class->sysc ||
375 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
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376 return -EINVAL;
377
43b40992
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378 if (!oh->class->sysc->sysc_fields) {
379 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
380 return -EINVAL;
381 }
382
43b40992 383 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
358f0e63
TG
384
385 *v |= softrst_mask;
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386
387 return 0;
388}
389
726072e5
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390/**
391 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
392 * @oh: struct omap_hwmod *
393 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
394 * @v: pointer to register contents to modify
395 *
396 * Update the module autoidle bit in @v to be @autoidle for the @oh
397 * hwmod. The autoidle bit controls whether the module can gate
398 * internal clocks automatically when it isn't doing anything; the
399 * exact function of this bit varies on a per-module basis. This
400 * function does not write to the hardware. Returns -EINVAL upon
401 * error or 0 upon success.
402 */
403static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
404 u32 *v)
405{
358f0e63
TG
406 u32 autoidle_mask;
407 u8 autoidle_shift;
408
43b40992
PW
409 if (!oh->class->sysc ||
410 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
726072e5
PW
411 return -EINVAL;
412
43b40992
PW
413 if (!oh->class->sysc->sysc_fields) {
414 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
415 return -EINVAL;
416 }
417
43b40992 418 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
8985b63d 419 autoidle_mask = (0x1 << autoidle_shift);
358f0e63
TG
420
421 *v &= ~autoidle_mask;
422 *v |= autoidle << autoidle_shift;
726072e5
PW
423
424 return 0;
425}
426
eceec009
G
427/**
428 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
429 * @oh: struct omap_hwmod *
430 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
431 *
432 * Set or clear the I/O pad wakeup flag in the mux entries for the
433 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
434 * in memory. If the hwmod is currently idled, and the new idle
435 * values don't match the previous ones, this function will also
436 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
437 * currently idled, this function won't touch the hardware: the new
438 * mux settings are written to the SCM PADCTRL registers when the
439 * hwmod is idled. No return value.
440 */
441static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
442{
443 struct omap_device_pad *pad;
444 bool change = false;
445 u16 prev_idle;
446 int j;
447
448 if (!oh->mux || !oh->mux->enabled)
449 return;
450
451 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
452 pad = oh->mux->pads_dynamic[j];
453
454 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
455 continue;
456
457 prev_idle = pad->idle;
458
459 if (set_wake)
460 pad->idle |= OMAP_WAKEUP_EN;
461 else
462 pad->idle &= ~OMAP_WAKEUP_EN;
463
464 if (prev_idle != pad->idle)
465 change = true;
466 }
467
468 if (change && oh->_state == _HWMOD_STATE_IDLE)
469 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
470}
471
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472/**
473 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
474 * @oh: struct omap_hwmod *
475 *
476 * Allow the hardware module @oh to send wakeups. Returns -EINVAL
477 * upon error or 0 upon success.
478 */
5a7ddcbd 479static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 480{
43b40992 481 if (!oh->class->sysc ||
86009eb3 482 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
483 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
484 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
485 return -EINVAL;
486
43b40992
PW
487 if (!oh->class->sysc->sysc_fields) {
488 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
489 return -EINVAL;
490 }
491
1fe74113
BC
492 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
493 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
63c85238 494
86009eb3
BC
495 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
496 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
724019b0
BC
497 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
498 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
86009eb3 499
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500 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
501
502 oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
503
504 return 0;
505}
506
507/**
508 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
509 * @oh: struct omap_hwmod *
510 *
511 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
512 * upon error or 0 upon success.
513 */
5a7ddcbd 514static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
63c85238 515{
43b40992 516 if (!oh->class->sysc ||
86009eb3 517 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
724019b0
BC
518 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
519 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
63c85238
PW
520 return -EINVAL;
521
43b40992
PW
522 if (!oh->class->sysc->sysc_fields) {
523 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
358f0e63
TG
524 return -EINVAL;
525 }
526
1fe74113
BC
527 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
528 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
63c85238 529
86009eb3
BC
530 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
531 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
724019b0 532 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
561038f0 533 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
86009eb3 534
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PW
535 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
536
537 oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
538
539 return 0;
540}
541
542/**
543 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
544 * @oh: struct omap_hwmod *
545 *
546 * Prevent the hardware module @oh from entering idle while the
547 * hardare module initiator @init_oh is active. Useful when a module
548 * will be accessed by a particular initiator (e.g., if a module will
549 * be accessed by the IVA, there should be a sleepdep between the IVA
550 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
551 * mode. If the clockdomain is marked as not needing autodeps, return
552 * 0 without doing anything. Otherwise, returns -EINVAL upon error or
553 * passes along clkdm_add_sleepdep() value upon success.
63c85238
PW
554 */
555static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
556{
557 if (!oh->_clk)
558 return -EINVAL;
559
570b54c7
PW
560 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
561 return 0;
562
55ed9694 563 return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
564}
565
566/**
567 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
568 * @oh: struct omap_hwmod *
569 *
570 * Allow the hardware module @oh to enter idle while the hardare
571 * module initiator @init_oh is active. Useful when a module will not
572 * be accessed by a particular initiator (e.g., if a module will not
573 * be accessed by the IVA, there should be no sleepdep between the IVA
574 * initiator and the module). Only applies to modules in smart-idle
570b54c7
PW
575 * mode. If the clockdomain is marked as not needing autodeps, return
576 * 0 without doing anything. Returns -EINVAL upon error or passes
577 * along clkdm_del_sleepdep() value upon success.
63c85238
PW
578 */
579static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
580{
581 if (!oh->_clk)
582 return -EINVAL;
583
570b54c7
PW
584 if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
585 return 0;
586
55ed9694 587 return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
63c85238
PW
588}
589
590/**
591 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
592 * @oh: struct omap_hwmod *
593 *
594 * Called from _init_clocks(). Populates the @oh _clk (main
595 * functional clock pointer) if a main_clk is present. Returns 0 on
596 * success or -EINVAL on error.
597 */
598static int _init_main_clk(struct omap_hwmod *oh)
599{
63c85238
PW
600 int ret = 0;
601
50ebdac2 602 if (!oh->main_clk)
63c85238
PW
603 return 0;
604
63403384 605 oh->_clk = omap_clk_get_by_name(oh->main_clk);
dc75925d 606 if (!oh->_clk) {
20383d82
BC
607 pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
608 oh->name, oh->main_clk);
63403384 609 return -EINVAL;
dc75925d 610 }
63c85238 611
63403384
BC
612 if (!oh->_clk->clkdm)
613 pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
614 oh->main_clk, oh->_clk->name);
81d7c6ff 615
63c85238
PW
616 return ret;
617}
618
619/**
887adeac 620 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
63c85238
PW
621 * @oh: struct omap_hwmod *
622 *
623 * Called from _init_clocks(). Populates the @oh OCP slave interface
624 * clock pointers. Returns 0 on success or -EINVAL on error.
625 */
626static int _init_interface_clks(struct omap_hwmod *oh)
627{
5d95dde7 628 struct omap_hwmod_ocp_if *os;
11cd4b94 629 struct list_head *p;
63c85238 630 struct clk *c;
5d95dde7 631 int i = 0;
63c85238
PW
632 int ret = 0;
633
11cd4b94 634 p = oh->slave_ports.next;
2221b5cd 635
5d95dde7 636 while (i < oh->slaves_cnt) {
11cd4b94 637 os = _fetch_next_ocp_if(&p, &i);
50ebdac2 638 if (!os->clk)
63c85238
PW
639 continue;
640
50ebdac2 641 c = omap_clk_get_by_name(os->clk);
dc75925d 642 if (!c) {
20383d82
BC
643 pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
644 oh->name, os->clk);
63c85238 645 ret = -EINVAL;
dc75925d 646 }
63c85238
PW
647 os->_clk = c;
648 }
649
650 return ret;
651}
652
653/**
654 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
655 * @oh: struct omap_hwmod *
656 *
657 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
658 * clock pointers. Returns 0 on success or -EINVAL on error.
659 */
660static int _init_opt_clks(struct omap_hwmod *oh)
661{
662 struct omap_hwmod_opt_clk *oc;
663 struct clk *c;
664 int i;
665 int ret = 0;
666
667 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
50ebdac2 668 c = omap_clk_get_by_name(oc->clk);
dc75925d 669 if (!c) {
20383d82
BC
670 pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
671 oh->name, oc->clk);
63c85238 672 ret = -EINVAL;
dc75925d 673 }
63c85238
PW
674 oc->_clk = c;
675 }
676
677 return ret;
678}
679
680/**
681 * _enable_clocks - enable hwmod main clock and interface clocks
682 * @oh: struct omap_hwmod *
683 *
684 * Enables all clocks necessary for register reads and writes to succeed
685 * on the hwmod @oh. Returns 0.
686 */
687static int _enable_clocks(struct omap_hwmod *oh)
688{
5d95dde7 689 struct omap_hwmod_ocp_if *os;
11cd4b94 690 struct list_head *p;
5d95dde7 691 int i = 0;
63c85238
PW
692
693 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
694
4d3ae5a9 695 if (oh->_clk)
63c85238
PW
696 clk_enable(oh->_clk);
697
11cd4b94 698 p = oh->slave_ports.next;
2221b5cd 699
5d95dde7 700 while (i < oh->slaves_cnt) {
11cd4b94 701 os = _fetch_next_ocp_if(&p, &i);
63c85238 702
5d95dde7
PW
703 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
704 clk_enable(os->_clk);
63c85238
PW
705 }
706
707 /* The opt clocks are controlled by the device driver. */
708
709 return 0;
710}
711
712/**
713 * _disable_clocks - disable hwmod main clock and interface clocks
714 * @oh: struct omap_hwmod *
715 *
716 * Disables the hwmod @oh main functional and interface clocks. Returns 0.
717 */
718static int _disable_clocks(struct omap_hwmod *oh)
719{
5d95dde7 720 struct omap_hwmod_ocp_if *os;
11cd4b94 721 struct list_head *p;
5d95dde7 722 int i = 0;
63c85238
PW
723
724 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
725
4d3ae5a9 726 if (oh->_clk)
63c85238
PW
727 clk_disable(oh->_clk);
728
11cd4b94 729 p = oh->slave_ports.next;
2221b5cd 730
5d95dde7 731 while (i < oh->slaves_cnt) {
11cd4b94 732 os = _fetch_next_ocp_if(&p, &i);
63c85238 733
5d95dde7
PW
734 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
735 clk_disable(os->_clk);
63c85238
PW
736 }
737
738 /* The opt clocks are controlled by the device driver. */
739
740 return 0;
741}
742
96835af9
BC
743static void _enable_optional_clocks(struct omap_hwmod *oh)
744{
745 struct omap_hwmod_opt_clk *oc;
746 int i;
747
748 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
749
750 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
751 if (oc->_clk) {
752 pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
753 oc->_clk->name);
754 clk_enable(oc->_clk);
755 }
756}
757
758static void _disable_optional_clocks(struct omap_hwmod *oh)
759{
760 struct omap_hwmod_opt_clk *oc;
761 int i;
762
763 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
764
765 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
766 if (oc->_clk) {
767 pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
768 oc->_clk->name);
769 clk_disable(oc->_clk);
770 }
771}
772
45c38252
BC
773/**
774 * _enable_module - enable CLKCTRL modulemode on OMAP4
775 * @oh: struct omap_hwmod *
776 *
777 * Enables the PRCM module mode related to the hwmod @oh.
778 * No return value.
779 */
780static void _enable_module(struct omap_hwmod *oh)
781{
782 /* The module mode does not exist prior OMAP4 */
783 if (cpu_is_omap24xx() || cpu_is_omap34xx())
784 return;
785
786 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
787 return;
788
789 pr_debug("omap_hwmod: %s: _enable_module: %d\n",
790 oh->name, oh->prcm.omap4.modulemode);
791
792 omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
793 oh->clkdm->prcm_partition,
794 oh->clkdm->cm_inst,
795 oh->clkdm->clkdm_offs,
796 oh->prcm.omap4.clkctrl_offs);
797}
798
799/**
bfc141e3
BC
800 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
801 * @oh: struct omap_hwmod *
802 *
803 * Wait for a module @oh to enter slave idle. Returns 0 if the module
804 * does not have an IDLEST bit or if the module successfully enters
805 * slave idle; otherwise, pass along the return value of the
806 * appropriate *_cm*_wait_module_idle() function.
807 */
808static int _omap4_wait_target_disable(struct omap_hwmod *oh)
809{
810 if (!cpu_is_omap44xx())
811 return 0;
812
813 if (!oh)
814 return -EINVAL;
815
816 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
817 return 0;
818
819 if (oh->flags & HWMOD_NO_IDLEST)
820 return 0;
821
822 return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
823 oh->clkdm->cm_inst,
824 oh->clkdm->clkdm_offs,
825 oh->prcm.omap4.clkctrl_offs);
826}
827
212738a4
PW
828/**
829 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
830 * @oh: struct omap_hwmod *oh
831 *
832 * Count and return the number of MPU IRQs associated with the hwmod
833 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
834 * NULL.
835 */
836static int _count_mpu_irqs(struct omap_hwmod *oh)
837{
838 struct omap_hwmod_irq_info *ohii;
839 int i = 0;
840
841 if (!oh || !oh->mpu_irqs)
842 return 0;
843
844 do {
845 ohii = &oh->mpu_irqs[i++];
846 } while (ohii->irq != -1);
847
cc1b0765 848 return i-1;
212738a4
PW
849}
850
bc614958
PW
851/**
852 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
853 * @oh: struct omap_hwmod *oh
854 *
855 * Count and return the number of SDMA request lines associated with
856 * the hwmod @oh. Used to allocate struct resource data. Returns 0
857 * if @oh is NULL.
858 */
859static int _count_sdma_reqs(struct omap_hwmod *oh)
860{
861 struct omap_hwmod_dma_info *ohdi;
862 int i = 0;
863
864 if (!oh || !oh->sdma_reqs)
865 return 0;
866
867 do {
868 ohdi = &oh->sdma_reqs[i++];
869 } while (ohdi->dma_req != -1);
870
cc1b0765 871 return i-1;
bc614958
PW
872}
873
78183f3f
PW
874/**
875 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
876 * @oh: struct omap_hwmod *oh
877 *
878 * Count and return the number of address space ranges associated with
879 * the hwmod @oh. Used to allocate struct resource data. Returns 0
880 * if @oh is NULL.
881 */
882static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
883{
884 struct omap_hwmod_addr_space *mem;
885 int i = 0;
886
887 if (!os || !os->addr)
888 return 0;
889
890 do {
891 mem = &os->addr[i++];
892 } while (mem->pa_start != mem->pa_end);
893
cc1b0765 894 return i-1;
78183f3f
PW
895}
896
5e8370f1
PW
897/**
898 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
899 * @oh: struct omap_hwmod * to operate on
900 * @name: pointer to the name of the MPU interrupt number to fetch (optional)
901 * @irq: pointer to an unsigned int to store the MPU IRQ number to
902 *
903 * Retrieve a MPU hardware IRQ line number named by @name associated
904 * with the IP block pointed to by @oh. The IRQ number will be filled
905 * into the address pointed to by @dma. When @name is non-null, the
906 * IRQ line number associated with the named entry will be returned.
907 * If @name is null, the first matching entry will be returned. Data
908 * order is not meaningful in hwmod data, so callers are strongly
909 * encouraged to use a non-null @name whenever possible to avoid
910 * unpredictable effects if hwmod data is later added that causes data
911 * ordering to change. Returns 0 upon success or a negative error
912 * code upon error.
913 */
914static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
915 unsigned int *irq)
916{
917 int i;
918 bool found = false;
919
920 if (!oh->mpu_irqs)
921 return -ENOENT;
922
923 i = 0;
924 while (oh->mpu_irqs[i].irq != -1) {
925 if (name == oh->mpu_irqs[i].name ||
926 !strcmp(name, oh->mpu_irqs[i].name)) {
927 found = true;
928 break;
929 }
930 i++;
931 }
932
933 if (!found)
934 return -ENOENT;
935
936 *irq = oh->mpu_irqs[i].irq;
937
938 return 0;
939}
940
941/**
942 * _get_sdma_req_by_name - fetch SDMA request line ID by name
943 * @oh: struct omap_hwmod * to operate on
944 * @name: pointer to the name of the SDMA request line to fetch (optional)
945 * @dma: pointer to an unsigned int to store the request line ID to
946 *
947 * Retrieve an SDMA request line ID named by @name on the IP block
948 * pointed to by @oh. The ID will be filled into the address pointed
949 * to by @dma. When @name is non-null, the request line ID associated
950 * with the named entry will be returned. If @name is null, the first
951 * matching entry will be returned. Data order is not meaningful in
952 * hwmod data, so callers are strongly encouraged to use a non-null
953 * @name whenever possible to avoid unpredictable effects if hwmod
954 * data is later added that causes data ordering to change. Returns 0
955 * upon success or a negative error code upon error.
956 */
957static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
958 unsigned int *dma)
959{
960 int i;
961 bool found = false;
962
963 if (!oh->sdma_reqs)
964 return -ENOENT;
965
966 i = 0;
967 while (oh->sdma_reqs[i].dma_req != -1) {
968 if (name == oh->sdma_reqs[i].name ||
969 !strcmp(name, oh->sdma_reqs[i].name)) {
970 found = true;
971 break;
972 }
973 i++;
974 }
975
976 if (!found)
977 return -ENOENT;
978
979 *dma = oh->sdma_reqs[i].dma_req;
980
981 return 0;
982}
983
984/**
985 * _get_addr_space_by_name - fetch address space start & end by name
986 * @oh: struct omap_hwmod * to operate on
987 * @name: pointer to the name of the address space to fetch (optional)
988 * @pa_start: pointer to a u32 to store the starting address to
989 * @pa_end: pointer to a u32 to store the ending address to
990 *
991 * Retrieve address space start and end addresses for the IP block
992 * pointed to by @oh. The data will be filled into the addresses
993 * pointed to by @pa_start and @pa_end. When @name is non-null, the
994 * address space data associated with the named entry will be
995 * returned. If @name is null, the first matching entry will be
996 * returned. Data order is not meaningful in hwmod data, so callers
997 * are strongly encouraged to use a non-null @name whenever possible
998 * to avoid unpredictable effects if hwmod data is later added that
999 * causes data ordering to change. Returns 0 upon success or a
1000 * negative error code upon error.
1001 */
1002static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1003 u32 *pa_start, u32 *pa_end)
1004{
1005 int i, j;
1006 struct omap_hwmod_ocp_if *os;
2221b5cd 1007 struct list_head *p = NULL;
5e8370f1
PW
1008 bool found = false;
1009
11cd4b94 1010 p = oh->slave_ports.next;
2221b5cd 1011
5d95dde7
PW
1012 i = 0;
1013 while (i < oh->slaves_cnt) {
11cd4b94 1014 os = _fetch_next_ocp_if(&p, &i);
5e8370f1
PW
1015
1016 if (!os->addr)
1017 return -ENOENT;
1018
1019 j = 0;
1020 while (os->addr[j].pa_start != os->addr[j].pa_end) {
1021 if (name == os->addr[j].name ||
1022 !strcmp(name, os->addr[j].name)) {
1023 found = true;
1024 break;
1025 }
1026 j++;
1027 }
1028
1029 if (found)
1030 break;
1031 }
1032
1033 if (!found)
1034 return -ENOENT;
1035
1036 *pa_start = os->addr[j].pa_start;
1037 *pa_end = os->addr[j].pa_end;
1038
1039 return 0;
1040}
1041
63c85238 1042/**
24dbc213 1043 * _save_mpu_port_index - find and save the index to @oh's MPU port
63c85238
PW
1044 * @oh: struct omap_hwmod *
1045 *
24dbc213
PW
1046 * Determines the array index of the OCP slave port that the MPU uses
1047 * to address the device, and saves it into the struct omap_hwmod.
1048 * Intended to be called during hwmod registration only. No return
1049 * value.
63c85238 1050 */
24dbc213 1051static void __init _save_mpu_port_index(struct omap_hwmod *oh)
63c85238 1052{
24dbc213 1053 struct omap_hwmod_ocp_if *os = NULL;
11cd4b94 1054 struct list_head *p;
5d95dde7 1055 int i = 0;
63c85238 1056
5d95dde7 1057 if (!oh)
24dbc213
PW
1058 return;
1059
1060 oh->_int_flags |= _HWMOD_NO_MPU_PORT;
63c85238 1061
11cd4b94 1062 p = oh->slave_ports.next;
2221b5cd 1063
5d95dde7 1064 while (i < oh->slaves_cnt) {
11cd4b94 1065 os = _fetch_next_ocp_if(&p, &i);
63c85238 1066 if (os->user & OCP_USER_MPU) {
2221b5cd 1067 oh->_mpu_port = os;
24dbc213 1068 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
63c85238
PW
1069 break;
1070 }
1071 }
1072
24dbc213 1073 return;
63c85238
PW
1074}
1075
2d6141ba
PW
1076/**
1077 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1078 * @oh: struct omap_hwmod *
1079 *
1080 * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1081 * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1082 * communicate with the IP block. This interface need not be directly
1083 * connected to the MPU (and almost certainly is not), but is directly
1084 * connected to the IP block represented by @oh. Returns a pointer
1085 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1086 * error or if there does not appear to be a path from the MPU to this
1087 * IP block.
1088 */
1089static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1090{
1091 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1092 return NULL;
1093
11cd4b94 1094 return oh->_mpu_port;
2d6141ba
PW
1095};
1096
63c85238 1097/**
c9aafd23 1098 * _find_mpu_rt_addr_space - return MPU register target address space for @oh
63c85238
PW
1099 * @oh: struct omap_hwmod *
1100 *
c9aafd23
PW
1101 * Returns a pointer to the struct omap_hwmod_addr_space record representing
1102 * the register target MPU address space; or returns NULL upon error.
63c85238 1103 */
c9aafd23 1104static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
63c85238
PW
1105{
1106 struct omap_hwmod_ocp_if *os;
1107 struct omap_hwmod_addr_space *mem;
c9aafd23 1108 int found = 0, i = 0;
63c85238 1109
2d6141ba 1110 os = _find_mpu_rt_port(oh);
24dbc213 1111 if (!os || !os->addr)
78183f3f
PW
1112 return NULL;
1113
1114 do {
1115 mem = &os->addr[i++];
1116 if (mem->flags & ADDR_TYPE_RT)
63c85238 1117 found = 1;
78183f3f 1118 } while (!found && mem->pa_start != mem->pa_end);
63c85238 1119
c9aafd23 1120 return (found) ? mem : NULL;
63c85238
PW
1121}
1122
1123/**
74ff3a68 1124 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
63c85238
PW
1125 * @oh: struct omap_hwmod *
1126 *
006c7f18
PW
1127 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1128 * by @oh is set to indicate to the PRCM that the IP block is active.
1129 * Usually this means placing the module into smart-idle mode and
1130 * smart-standby, but if there is a bug in the automatic idle handling
1131 * for the IP block, it may need to be placed into the force-idle or
1132 * no-idle variants of these modes. No return value.
63c85238 1133 */
74ff3a68 1134static void _enable_sysc(struct omap_hwmod *oh)
63c85238 1135{
43b40992 1136 u8 idlemode, sf;
63c85238 1137 u32 v;
006c7f18 1138 bool clkdm_act;
63c85238 1139
43b40992 1140 if (!oh->class->sysc)
63c85238
PW
1141 return;
1142
1143 v = oh->_sysc_cache;
43b40992 1144 sf = oh->class->sysc->sysc_flags;
63c85238 1145
43b40992 1146 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1147 clkdm_act = ((oh->clkdm &&
1148 oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
1149 (oh->_clk && oh->_clk->clkdm &&
1150 oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
1151 if (clkdm_act && !(oh->class->sysc->idlemodes &
1152 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1153 idlemode = HWMOD_IDLEMODE_FORCE;
1154 else
1155 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1156 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
63c85238
PW
1157 _set_slave_idlemode(oh, idlemode, &v);
1158 }
1159
43b40992 1160 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1161 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1162 idlemode = HWMOD_IDLEMODE_NO;
1163 } else {
1164 if (sf & SYSC_HAS_ENAWAKEUP)
1165 _enable_wakeup(oh, &v);
1166 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1167 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1168 else
1169 idlemode = HWMOD_IDLEMODE_SMART;
1170 }
63c85238
PW
1171 _set_master_standbymode(oh, idlemode, &v);
1172 }
1173
a16b1f7f
PW
1174 /*
1175 * XXX The clock framework should handle this, by
1176 * calling into this code. But this must wait until the
1177 * clock structures are tagged with omap_hwmod entries
1178 */
43b40992
PW
1179 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1180 (sf & SYSC_HAS_CLOCKACTIVITY))
1181 _set_clockactivity(oh, oh->class->sysc->clockact, &v);
63c85238 1182
9980ce53
RN
1183 /* If slave is in SMARTIDLE, also enable wakeup */
1184 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
5a7ddcbd
KH
1185 _enable_wakeup(oh, &v);
1186
1187 _write_sysconfig(v, oh);
78f26e87
HH
1188
1189 /*
1190 * Set the autoidle bit only after setting the smartidle bit
1191 * Setting this will not have any impact on the other modules.
1192 */
1193 if (sf & SYSC_HAS_AUTOIDLE) {
1194 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1195 0 : 1;
1196 _set_module_autoidle(oh, idlemode, &v);
1197 _write_sysconfig(v, oh);
1198 }
63c85238
PW
1199}
1200
1201/**
74ff3a68 1202 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
63c85238
PW
1203 * @oh: struct omap_hwmod *
1204 *
1205 * If module is marked as SWSUP_SIDLE, force the module into slave
1206 * idle; otherwise, configure it for smart-idle. If module is marked
1207 * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1208 * configure it for smart-standby. No return value.
1209 */
74ff3a68 1210static void _idle_sysc(struct omap_hwmod *oh)
63c85238 1211{
43b40992 1212 u8 idlemode, sf;
63c85238
PW
1213 u32 v;
1214
43b40992 1215 if (!oh->class->sysc)
63c85238
PW
1216 return;
1217
1218 v = oh->_sysc_cache;
43b40992 1219 sf = oh->class->sysc->sysc_flags;
63c85238 1220
43b40992 1221 if (sf & SYSC_HAS_SIDLEMODE) {
006c7f18
PW
1222 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1223 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1224 !(oh->class->sysc->idlemodes &
1225 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1226 idlemode = HWMOD_IDLEMODE_FORCE;
1227 else
1228 idlemode = HWMOD_IDLEMODE_SMART;
63c85238
PW
1229 _set_slave_idlemode(oh, idlemode, &v);
1230 }
1231
43b40992 1232 if (sf & SYSC_HAS_MIDLEMODE) {
724019b0
BC
1233 if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1234 idlemode = HWMOD_IDLEMODE_FORCE;
1235 } else {
1236 if (sf & SYSC_HAS_ENAWAKEUP)
1237 _enable_wakeup(oh, &v);
1238 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1239 idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1240 else
1241 idlemode = HWMOD_IDLEMODE_SMART;
1242 }
63c85238
PW
1243 _set_master_standbymode(oh, idlemode, &v);
1244 }
1245
86009eb3
BC
1246 /* If slave is in SMARTIDLE, also enable wakeup */
1247 if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1248 _enable_wakeup(oh, &v);
1249
63c85238
PW
1250 _write_sysconfig(v, oh);
1251}
1252
1253/**
74ff3a68 1254 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
63c85238
PW
1255 * @oh: struct omap_hwmod *
1256 *
1257 * Force the module into slave idle and master suspend. No return
1258 * value.
1259 */
74ff3a68 1260static void _shutdown_sysc(struct omap_hwmod *oh)
63c85238
PW
1261{
1262 u32 v;
43b40992 1263 u8 sf;
63c85238 1264
43b40992 1265 if (!oh->class->sysc)
63c85238
PW
1266 return;
1267
1268 v = oh->_sysc_cache;
43b40992 1269 sf = oh->class->sysc->sysc_flags;
63c85238 1270
43b40992 1271 if (sf & SYSC_HAS_SIDLEMODE)
63c85238
PW
1272 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1273
43b40992 1274 if (sf & SYSC_HAS_MIDLEMODE)
63c85238
PW
1275 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1276
43b40992 1277 if (sf & SYSC_HAS_AUTOIDLE)
726072e5 1278 _set_module_autoidle(oh, 1, &v);
63c85238
PW
1279
1280 _write_sysconfig(v, oh);
1281}
1282
1283/**
1284 * _lookup - find an omap_hwmod by name
1285 * @name: find an omap_hwmod by name
1286 *
1287 * Return a pointer to an omap_hwmod by name, or NULL if not found.
63c85238
PW
1288 */
1289static struct omap_hwmod *_lookup(const char *name)
1290{
1291 struct omap_hwmod *oh, *temp_oh;
1292
1293 oh = NULL;
1294
1295 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1296 if (!strcmp(name, temp_oh->name)) {
1297 oh = temp_oh;
1298 break;
1299 }
1300 }
1301
1302 return oh;
1303}
6ae76997
BC
1304/**
1305 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1306 * @oh: struct omap_hwmod *
1307 *
1308 * Convert a clockdomain name stored in a struct omap_hwmod into a
1309 * clockdomain pointer, and save it into the struct omap_hwmod.
1310 * return -EINVAL if clkdm_name does not exist or if the lookup failed.
1311 */
1312static int _init_clkdm(struct omap_hwmod *oh)
1313{
1314 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1315 return 0;
1316
1317 if (!oh->clkdm_name) {
1318 pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
1319 return -EINVAL;
1320 }
1321
1322 oh->clkdm = clkdm_lookup(oh->clkdm_name);
1323 if (!oh->clkdm) {
1324 pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1325 oh->name, oh->clkdm_name);
1326 return -EINVAL;
1327 }
1328
1329 pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1330 oh->name, oh->clkdm_name);
1331
1332 return 0;
1333}
63c85238
PW
1334
1335/**
6ae76997
BC
1336 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1337 * well the clockdomain.
63c85238 1338 * @oh: struct omap_hwmod *
97d60162 1339 * @data: not used; pass NULL
63c85238 1340 *
a2debdbd 1341 * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
48d54f3f
PW
1342 * Resolves all clock names embedded in the hwmod. Returns 0 on
1343 * success, or a negative error code on failure.
63c85238 1344 */
97d60162 1345static int _init_clocks(struct omap_hwmod *oh, void *data)
63c85238
PW
1346{
1347 int ret = 0;
1348
48d54f3f
PW
1349 if (oh->_state != _HWMOD_STATE_REGISTERED)
1350 return 0;
63c85238
PW
1351
1352 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1353
1354 ret |= _init_main_clk(oh);
1355 ret |= _init_interface_clks(oh);
1356 ret |= _init_opt_clks(oh);
6ae76997 1357 ret |= _init_clkdm(oh);
63c85238 1358
f5c1f84b
BC
1359 if (!ret)
1360 oh->_state = _HWMOD_STATE_CLKS_INITED;
6652271a
BC
1361 else
1362 pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
63c85238 1363
09c35f2f 1364 return ret;
63c85238
PW
1365}
1366
1367/**
1368 * _wait_target_ready - wait for a module to leave slave idle
1369 * @oh: struct omap_hwmod *
1370 *
1371 * Wait for a module @oh to leave slave idle. Returns 0 if the module
1372 * does not have an IDLEST bit or if the module successfully leaves
1373 * slave idle; otherwise, pass along the return value of the
d0f0631d 1374 * appropriate *_cm*_wait_module_ready() function.
63c85238
PW
1375 */
1376static int _wait_target_ready(struct omap_hwmod *oh)
1377{
1378 struct omap_hwmod_ocp_if *os;
1379 int ret;
1380
1381 if (!oh)
1382 return -EINVAL;
1383
2d6141ba 1384 if (oh->flags & HWMOD_NO_IDLEST)
63c85238
PW
1385 return 0;
1386
2d6141ba
PW
1387 os = _find_mpu_rt_port(oh);
1388 if (!os)
63c85238
PW
1389 return 0;
1390
1391 /* XXX check module SIDLEMODE */
1392
1393 /* XXX check clock enable states */
1394
1395 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1396 ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
1397 oh->prcm.omap2.idlest_reg_id,
1398 oh->prcm.omap2.idlest_idle_bit);
63c85238 1399 } else if (cpu_is_omap44xx()) {
d0f0631d
BC
1400 if (!oh->clkdm)
1401 return -EINVAL;
1402
1403 ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
1404 oh->clkdm->cm_inst,
1405 oh->clkdm->clkdm_offs,
1406 oh->prcm.omap4.clkctrl_offs);
63c85238
PW
1407 } else {
1408 BUG();
1409 };
1410
1411 return ret;
1412}
1413
5365efbe 1414/**
cc1226e7 1415 * _lookup_hardreset - fill register bit info for this hwmod/reset line
5365efbe
BC
1416 * @oh: struct omap_hwmod *
1417 * @name: name of the reset line in the context of this hwmod
cc1226e7 1418 * @ohri: struct omap_hwmod_rst_info * that this function will fill in
5365efbe
BC
1419 *
1420 * Return the bit position of the reset line that match the
1421 * input name. Return -ENOENT if not found.
1422 */
cc1226e7 1423static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1424 struct omap_hwmod_rst_info *ohri)
5365efbe
BC
1425{
1426 int i;
1427
1428 for (i = 0; i < oh->rst_lines_cnt; i++) {
1429 const char *rst_line = oh->rst_lines[i].name;
1430 if (!strcmp(rst_line, name)) {
cc1226e7 1431 ohri->rst_shift = oh->rst_lines[i].rst_shift;
1432 ohri->st_shift = oh->rst_lines[i].st_shift;
1433 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1434 oh->name, __func__, rst_line, ohri->rst_shift,
1435 ohri->st_shift);
5365efbe 1436
cc1226e7 1437 return 0;
5365efbe
BC
1438 }
1439 }
1440
1441 return -ENOENT;
1442}
1443
1444/**
1445 * _assert_hardreset - assert the HW reset line of submodules
1446 * contained in the hwmod module.
1447 * @oh: struct omap_hwmod *
1448 * @name: name of the reset line to lookup and assert
1449 *
1450 * Some IP like dsp, ipu or iva contain processor that require
1451 * an HW reset line to be assert / deassert in order to enable fully
1452 * the IP.
1453 */
1454static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1455{
cc1226e7 1456 struct omap_hwmod_rst_info ohri;
1457 u8 ret;
5365efbe
BC
1458
1459 if (!oh)
1460 return -EINVAL;
1461
cc1226e7 1462 ret = _lookup_hardreset(oh, name, &ohri);
1463 if (IS_ERR_VALUE(ret))
1464 return ret;
5365efbe
BC
1465
1466 if (cpu_is_omap24xx() || cpu_is_omap34xx())
1467 return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
cc1226e7 1468 ohri.rst_shift);
5365efbe 1469 else if (cpu_is_omap44xx())
eaac329d
BC
1470 return omap4_prminst_assert_hardreset(ohri.rst_shift,
1471 oh->clkdm->pwrdm.ptr->prcm_partition,
1472 oh->clkdm->pwrdm.ptr->prcm_offs,
1473 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1474 else
1475 return -EINVAL;
1476}
1477
1478/**
1479 * _deassert_hardreset - deassert the HW reset line of submodules contained
1480 * in the hwmod module.
1481 * @oh: struct omap_hwmod *
1482 * @name: name of the reset line to look up and deassert
1483 *
1484 * Some IP like dsp, ipu or iva contain processor that require
1485 * an HW reset line to be assert / deassert in order to enable fully
1486 * the IP.
1487 */
1488static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1489{
cc1226e7 1490 struct omap_hwmod_rst_info ohri;
1491 int ret;
5365efbe
BC
1492
1493 if (!oh)
1494 return -EINVAL;
1495
cc1226e7 1496 ret = _lookup_hardreset(oh, name, &ohri);
1497 if (IS_ERR_VALUE(ret))
1498 return ret;
5365efbe 1499
cc1226e7 1500 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1501 ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1502 ohri.rst_shift,
1503 ohri.st_shift);
1504 } else if (cpu_is_omap44xx()) {
1505 if (ohri.st_shift)
1506 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
1507 oh->name, name);
eaac329d
BC
1508 ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
1509 oh->clkdm->pwrdm.ptr->prcm_partition,
1510 oh->clkdm->pwrdm.ptr->prcm_offs,
1511 oh->prcm.omap4.rstctrl_offs);
cc1226e7 1512 } else {
5365efbe 1513 return -EINVAL;
cc1226e7 1514 }
5365efbe 1515
cc1226e7 1516 if (ret == -EBUSY)
5365efbe
BC
1517 pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1518
cc1226e7 1519 return ret;
5365efbe
BC
1520}
1521
1522/**
1523 * _read_hardreset - read the HW reset line state of submodules
1524 * contained in the hwmod module
1525 * @oh: struct omap_hwmod *
1526 * @name: name of the reset line to look up and read
1527 *
1528 * Return the state of the reset line.
1529 */
1530static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1531{
cc1226e7 1532 struct omap_hwmod_rst_info ohri;
1533 u8 ret;
5365efbe
BC
1534
1535 if (!oh)
1536 return -EINVAL;
1537
cc1226e7 1538 ret = _lookup_hardreset(oh, name, &ohri);
1539 if (IS_ERR_VALUE(ret))
1540 return ret;
5365efbe
BC
1541
1542 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1543 return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
cc1226e7 1544 ohri.st_shift);
5365efbe 1545 } else if (cpu_is_omap44xx()) {
eaac329d
BC
1546 return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
1547 oh->clkdm->pwrdm.ptr->prcm_partition,
1548 oh->clkdm->pwrdm.ptr->prcm_offs,
1549 oh->prcm.omap4.rstctrl_offs);
5365efbe
BC
1550 } else {
1551 return -EINVAL;
1552 }
1553}
1554
747834ab
PW
1555/**
1556 * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
1557 * @oh: struct omap_hwmod *
1558 *
1559 * If any hardreset line associated with @oh is asserted, then return true.
1560 * Otherwise, if @oh has no hardreset lines associated with it, or if
1561 * no hardreset lines associated with @oh are asserted, then return false.
1562 * This function is used to avoid executing some parts of the IP block
1563 * enable/disable sequence if a hardreset line is set.
1564 */
1565static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1566{
1567 int i;
1568
1569 if (oh->rst_lines_cnt == 0)
1570 return false;
1571
1572 for (i = 0; i < oh->rst_lines_cnt; i++)
1573 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1574 return true;
1575
1576 return false;
1577}
1578
1579/**
1580 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1581 * @oh: struct omap_hwmod *
1582 *
1583 * Disable the PRCM module mode related to the hwmod @oh.
1584 * Return EINVAL if the modulemode is not supported and 0 in case of success.
1585 */
1586static int _omap4_disable_module(struct omap_hwmod *oh)
1587{
1588 int v;
1589
1590 /* The module mode does not exist prior OMAP4 */
1591 if (!cpu_is_omap44xx())
1592 return -EINVAL;
1593
1594 if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1595 return -EINVAL;
1596
1597 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1598
1599 omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1600 oh->clkdm->cm_inst,
1601 oh->clkdm->clkdm_offs,
1602 oh->prcm.omap4.clkctrl_offs);
1603
1604 if (_are_any_hardreset_lines_asserted(oh))
1605 return 0;
1606
1607 v = _omap4_wait_target_disable(oh);
1608 if (v)
1609 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1610 oh->name);
1611
1612 return 0;
1613}
1614
63c85238 1615/**
bd36179e 1616 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
63c85238
PW
1617 * @oh: struct omap_hwmod *
1618 *
1619 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
30e105c0
PW
1620 * enabled for this to work. Returns -ENOENT if the hwmod cannot be
1621 * reset this way, -EINVAL if the hwmod is in the wrong state,
1622 * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
2cb06814
BC
1623 *
1624 * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
bd36179e 1625 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
2cb06814
BC
1626 * use the SYSCONFIG softreset bit to provide the status.
1627 *
bd36179e
PW
1628 * Note that some IP like McBSP do have reset control but don't have
1629 * reset status.
63c85238 1630 */
bd36179e 1631static int _ocp_softreset(struct omap_hwmod *oh)
63c85238 1632{
387ca5bf 1633 u32 v, softrst_mask;
6f8b7ff5 1634 int c = 0;
96835af9 1635 int ret = 0;
63c85238 1636
43b40992 1637 if (!oh->class->sysc ||
2cb06814 1638 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
30e105c0 1639 return -ENOENT;
63c85238
PW
1640
1641 /* clocks must be on for this operation */
1642 if (oh->_state != _HWMOD_STATE_ENABLED) {
76e5589e
BC
1643 pr_warning("omap_hwmod: %s: reset can only be entered from "
1644 "enabled state\n", oh->name);
63c85238
PW
1645 return -EINVAL;
1646 }
1647
96835af9
BC
1648 /* For some modules, all optionnal clocks need to be enabled as well */
1649 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1650 _enable_optional_clocks(oh);
1651
bd36179e 1652 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
63c85238
PW
1653
1654 v = oh->_sysc_cache;
96835af9
BC
1655 ret = _set_softreset(oh, &v);
1656 if (ret)
1657 goto dis_opt_clks;
63c85238
PW
1658 _write_sysconfig(v, oh);
1659
d99de7f5
FGL
1660 if (oh->class->sysc->srst_udelay)
1661 udelay(oh->class->sysc->srst_udelay);
1662
2cb06814 1663 if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
cc7a1d2a 1664 omap_test_timeout((omap_hwmod_read(oh,
2cb06814
BC
1665 oh->class->sysc->syss_offs)
1666 & SYSS_RESETDONE_MASK),
1667 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf
RN
1668 else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
1669 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
cc7a1d2a 1670 omap_test_timeout(!(omap_hwmod_read(oh,
2cb06814 1671 oh->class->sysc->sysc_offs)
387ca5bf 1672 & softrst_mask),
2cb06814 1673 MAX_MODULE_SOFTRESET_WAIT, c);
387ca5bf 1674 }
63c85238 1675
5365efbe 1676 if (c == MAX_MODULE_SOFTRESET_WAIT)
76e5589e
BC
1677 pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1678 oh->name, MAX_MODULE_SOFTRESET_WAIT);
63c85238 1679 else
5365efbe 1680 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
63c85238
PW
1681
1682 /*
1683 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1684 * _wait_target_ready() or _reset()
1685 */
1686
96835af9
BC
1687 ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1688
1689dis_opt_clks:
1690 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1691 _disable_optional_clocks(oh);
1692
1693 return ret;
63c85238
PW
1694}
1695
bd36179e
PW
1696/**
1697 * _reset - reset an omap_hwmod
1698 * @oh: struct omap_hwmod *
1699 *
30e105c0
PW
1700 * Resets an omap_hwmod @oh. If the module has a custom reset
1701 * function pointer defined, then call it to reset the IP block, and
1702 * pass along its return value to the caller. Otherwise, if the IP
1703 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1704 * associated with it, call a function to reset the IP block via that
1705 * method, and pass along the return value to the caller. Finally, if
1706 * the IP block has some hardreset lines associated with it, assert
1707 * all of those, but do _not_ deassert them. (This is because driver
1708 * authors have expressed an apparent requirement to control the
1709 * deassertion of the hardreset lines themselves.)
1710 *
1711 * The default software reset mechanism for most OMAP IP blocks is
1712 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
1713 * hwmods cannot be reset via this method. Some are not targets and
1714 * therefore have no OCP header registers to access. Others (like the
1715 * IVA) have idiosyncratic reset sequences. So for these relatively
1716 * rare cases, custom reset code can be supplied in the struct
1717 * omap_hwmod_class .reset function pointer. Passes along the return
1718 * value from either _ocp_softreset() or the custom reset function -
1719 * these must return -EINVAL if the hwmod cannot be reset this way or
1720 * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
1721 * not reset in time, or 0 upon success.
bd36179e
PW
1722 */
1723static int _reset(struct omap_hwmod *oh)
1724{
30e105c0 1725 int i, r;
bd36179e
PW
1726
1727 pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1728
30e105c0
PW
1729 if (oh->class->reset) {
1730 r = oh->class->reset(oh);
1731 } else {
1732 if (oh->rst_lines_cnt > 0) {
1733 for (i = 0; i < oh->rst_lines_cnt; i++)
1734 _assert_hardreset(oh, oh->rst_lines[i].name);
1735 return 0;
1736 } else {
1737 r = _ocp_softreset(oh);
1738 if (r == -ENOENT)
1739 r = 0;
1740 }
1741 }
1742
9c8b0ec7 1743 /*
30e105c0
PW
1744 * OCP_SYSCONFIG bits need to be reprogrammed after a
1745 * softreset. The _enable() function should be split to avoid
1746 * the rewrite of the OCP_SYSCONFIG register.
9c8b0ec7 1747 */
2800852a
RN
1748 if (oh->class->sysc) {
1749 _update_sysc_cache(oh);
1750 _enable_sysc(oh);
1751 }
1752
30e105c0 1753 return r;
bd36179e
PW
1754}
1755
63c85238 1756/**
dc6d1cda 1757 * _enable - enable an omap_hwmod
63c85238
PW
1758 * @oh: struct omap_hwmod *
1759 *
1760 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
dc6d1cda
PW
1761 * register target. Returns -EINVAL if the hwmod is in the wrong
1762 * state or passes along the return value of _wait_target_ready().
63c85238 1763 */
dc6d1cda 1764static int _enable(struct omap_hwmod *oh)
63c85238 1765{
747834ab 1766 int r;
665d0013 1767 int hwsup = 0;
63c85238 1768
34617e2a
BC
1769 pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1770
aacf0941 1771 /*
64813c3f
PW
1772 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
1773 * state at init. Now that someone is really trying to enable
1774 * them, just ensure that the hwmod mux is set.
aacf0941
RN
1775 */
1776 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
1777 /*
1778 * If the caller has mux data populated, do the mux'ing
1779 * which wouldn't have been done as part of the _enable()
1780 * done during setup.
1781 */
1782 if (oh->mux)
1783 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1784
1785 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
1786 return 0;
1787 }
1788
63c85238
PW
1789 if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1790 oh->_state != _HWMOD_STATE_IDLE &&
1791 oh->_state != _HWMOD_STATE_DISABLED) {
4f8a428d
RK
1792 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
1793 oh->name);
63c85238
PW
1794 return -EINVAL;
1795 }
1796
31f62866 1797 /*
747834ab
PW
1798 * If an IP block contains HW reset lines and any of them are
1799 * asserted, we let integration code associated with that
1800 * block handle the enable. We've received very little
1801 * information on what those driver authors need, and until
1802 * detailed information is provided and the driver code is
1803 * posted to the public lists, this is probably the best we
1804 * can do.
31f62866 1805 */
747834ab
PW
1806 if (_are_any_hardreset_lines_asserted(oh))
1807 return 0;
63c85238 1808
665d0013
RN
1809 /* Mux pins for device runtime if populated */
1810 if (oh->mux && (!oh->mux->enabled ||
1811 ((oh->_state == _HWMOD_STATE_IDLE) &&
1812 oh->mux->pads_dynamic)))
1813 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1814
1815 _add_initiator_dep(oh, mpu_oh);
34617e2a 1816
665d0013
RN
1817 if (oh->clkdm) {
1818 /*
1819 * A clockdomain must be in SW_SUP before enabling
1820 * completely the module. The clockdomain can be set
1821 * in HW_AUTO only when the module become ready.
1822 */
1823 hwsup = clkdm_in_hwsup(oh->clkdm);
1824 r = clkdm_hwmod_enable(oh->clkdm, oh);
1825 if (r) {
1826 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1827 oh->name, oh->clkdm->name, r);
1828 return r;
1829 }
34617e2a 1830 }
665d0013
RN
1831
1832 _enable_clocks(oh);
45c38252 1833 _enable_module(oh);
34617e2a 1834
665d0013
RN
1835 r = _wait_target_ready(oh);
1836 if (!r) {
1837 /*
1838 * Set the clockdomain to HW_AUTO only if the target is ready,
1839 * assuming that the previous state was HW_AUTO
1840 */
1841 if (oh->clkdm && hwsup)
1842 clkdm_allow_idle(oh->clkdm);
1843
1844 oh->_state = _HWMOD_STATE_ENABLED;
1845
1846 /* Access the sysconfig only if the target is ready */
1847 if (oh->class->sysc) {
1848 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1849 _update_sysc_cache(oh);
1850 _enable_sysc(oh);
1851 }
1852 } else {
1853 _disable_clocks(oh);
1854 pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1855 oh->name, r);
34617e2a 1856
665d0013
RN
1857 if (oh->clkdm)
1858 clkdm_hwmod_disable(oh->clkdm, oh);
9a23dfe1
BC
1859 }
1860
63c85238
PW
1861 return r;
1862}
1863
1864/**
dc6d1cda 1865 * _idle - idle an omap_hwmod
63c85238
PW
1866 * @oh: struct omap_hwmod *
1867 *
1868 * Idles an omap_hwmod @oh. This should be called once the hwmod has
dc6d1cda
PW
1869 * no further work. Returns -EINVAL if the hwmod is in the wrong
1870 * state or returns 0.
63c85238 1871 */
dc6d1cda 1872static int _idle(struct omap_hwmod *oh)
63c85238 1873{
34617e2a
BC
1874 pr_debug("omap_hwmod: %s: idling\n", oh->name);
1875
63c85238 1876 if (oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1877 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
1878 oh->name);
63c85238
PW
1879 return -EINVAL;
1880 }
1881
747834ab
PW
1882 if (_are_any_hardreset_lines_asserted(oh))
1883 return 0;
1884
43b40992 1885 if (oh->class->sysc)
74ff3a68 1886 _idle_sysc(oh);
63c85238 1887 _del_initiator_dep(oh, mpu_oh);
bfc141e3
BC
1888
1889 _omap4_disable_module(oh);
1890
45c38252
BC
1891 /*
1892 * The module must be in idle mode before disabling any parents
1893 * clocks. Otherwise, the parent clock might be disabled before
1894 * the module transition is done, and thus will prevent the
1895 * transition to complete properly.
1896 */
1897 _disable_clocks(oh);
665d0013
RN
1898 if (oh->clkdm)
1899 clkdm_hwmod_disable(oh->clkdm, oh);
63c85238 1900
8d9af88f 1901 /* Mux pins for device idle if populated */
029268e4 1902 if (oh->mux && oh->mux->pads_dynamic)
8d9af88f
TL
1903 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1904
63c85238
PW
1905 oh->_state = _HWMOD_STATE_IDLE;
1906
1907 return 0;
1908}
1909
9599217a
KVA
1910/**
1911 * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
1912 * @oh: struct omap_hwmod *
1913 * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
1914 *
1915 * Sets the IP block's OCP autoidle bit in hardware, and updates our
1916 * local copy. Intended to be used by drivers that require
1917 * direct manipulation of the AUTOIDLE bits.
1918 * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
1919 * along the return value from _set_module_autoidle().
1920 *
1921 * Any users of this function should be scrutinized carefully.
1922 */
1923int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
1924{
1925 u32 v;
1926 int retval = 0;
1927 unsigned long flags;
1928
1929 if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
1930 return -EINVAL;
1931
1932 spin_lock_irqsave(&oh->_lock, flags);
1933
1934 v = oh->_sysc_cache;
1935
1936 retval = _set_module_autoidle(oh, autoidle, &v);
1937
1938 if (!retval)
1939 _write_sysconfig(v, oh);
1940
1941 spin_unlock_irqrestore(&oh->_lock, flags);
1942
1943 return retval;
1944}
1945
63c85238
PW
1946/**
1947 * _shutdown - shutdown an omap_hwmod
1948 * @oh: struct omap_hwmod *
1949 *
1950 * Shut down an omap_hwmod @oh. This should be called when the driver
1951 * used for the hwmod is removed or unloaded or if the driver is not
1952 * used by the system. Returns -EINVAL if the hwmod is in the wrong
1953 * state or returns 0.
1954 */
1955static int _shutdown(struct omap_hwmod *oh)
1956{
9c8b0ec7 1957 int ret, i;
e4dc8f50
PW
1958 u8 prev_state;
1959
63c85238
PW
1960 if (oh->_state != _HWMOD_STATE_IDLE &&
1961 oh->_state != _HWMOD_STATE_ENABLED) {
4f8a428d
RK
1962 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
1963 oh->name);
63c85238
PW
1964 return -EINVAL;
1965 }
1966
747834ab
PW
1967 if (_are_any_hardreset_lines_asserted(oh))
1968 return 0;
1969
63c85238
PW
1970 pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1971
e4dc8f50
PW
1972 if (oh->class->pre_shutdown) {
1973 prev_state = oh->_state;
1974 if (oh->_state == _HWMOD_STATE_IDLE)
dc6d1cda 1975 _enable(oh);
e4dc8f50
PW
1976 ret = oh->class->pre_shutdown(oh);
1977 if (ret) {
1978 if (prev_state == _HWMOD_STATE_IDLE)
dc6d1cda 1979 _idle(oh);
e4dc8f50
PW
1980 return ret;
1981 }
1982 }
1983
6481c73c
MV
1984 if (oh->class->sysc) {
1985 if (oh->_state == _HWMOD_STATE_IDLE)
1986 _enable(oh);
74ff3a68 1987 _shutdown_sysc(oh);
6481c73c 1988 }
5365efbe 1989
3827f949
BC
1990 /* clocks and deps are already disabled in idle */
1991 if (oh->_state == _HWMOD_STATE_ENABLED) {
1992 _del_initiator_dep(oh, mpu_oh);
1993 /* XXX what about the other system initiators here? dma, dsp */
bfc141e3 1994 _omap4_disable_module(oh);
45c38252 1995 _disable_clocks(oh);
665d0013
RN
1996 if (oh->clkdm)
1997 clkdm_hwmod_disable(oh->clkdm, oh);
3827f949 1998 }
63c85238
PW
1999 /* XXX Should this code also force-disable the optional clocks? */
2000
9c8b0ec7
PW
2001 for (i = 0; i < oh->rst_lines_cnt; i++)
2002 _assert_hardreset(oh, oh->rst_lines[i].name);
31f62866 2003
8d9af88f
TL
2004 /* Mux pins to safe mode or use populated off mode values */
2005 if (oh->mux)
2006 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
63c85238
PW
2007
2008 oh->_state = _HWMOD_STATE_DISABLED;
2009
2010 return 0;
2011}
2012
381d033a
PW
2013/**
2014 * _init_mpu_rt_base - populate the virtual address for a hwmod
2015 * @oh: struct omap_hwmod * to locate the virtual address
2016 *
2017 * Cache the virtual address used by the MPU to access this IP block's
2018 * registers. This address is needed early so the OCP registers that
2019 * are part of the device's address space can be ioremapped properly.
2020 * No return value.
2021 */
2022static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2023{
c9aafd23
PW
2024 struct omap_hwmod_addr_space *mem;
2025 void __iomem *va_start;
2026
2027 if (!oh)
2028 return;
2029
2221b5cd
PW
2030 _save_mpu_port_index(oh);
2031
381d033a
PW
2032 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2033 return;
2034
c9aafd23
PW
2035 mem = _find_mpu_rt_addr_space(oh);
2036 if (!mem) {
2037 pr_debug("omap_hwmod: %s: no MPU register target found\n",
2038 oh->name);
2039 return;
2040 }
2041
2042 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2043 if (!va_start) {
2044 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2045 return;
2046 }
2047
2048 pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2049 oh->name, va_start);
2050
2051 oh->_mpu_rt_va = va_start;
381d033a
PW
2052}
2053
2054/**
2055 * _init - initialize internal data for the hwmod @oh
2056 * @oh: struct omap_hwmod *
2057 * @n: (unused)
2058 *
2059 * Look up the clocks and the address space used by the MPU to access
2060 * registers belonging to the hwmod @oh. @oh must already be
2061 * registered at this point. This is the first of two phases for
2062 * hwmod initialization. Code called here does not touch any hardware
2063 * registers, it simply prepares internal data structures. Returns 0
2064 * upon success or if the hwmod isn't registered, or -EINVAL upon
2065 * failure.
2066 */
2067static int __init _init(struct omap_hwmod *oh, void *data)
2068{
2069 int r;
2070
2071 if (oh->_state != _HWMOD_STATE_REGISTERED)
2072 return 0;
2073
2074 _init_mpu_rt_base(oh, NULL);
2075
2076 r = _init_clocks(oh, NULL);
2077 if (IS_ERR_VALUE(r)) {
2078 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2079 return -EINVAL;
2080 }
2081
2082 oh->_state = _HWMOD_STATE_INITIALIZED;
2083
2084 return 0;
2085}
2086
63c85238 2087/**
64813c3f 2088 * _setup_iclk_autoidle - configure an IP block's interface clocks
63c85238
PW
2089 * @oh: struct omap_hwmod *
2090 *
64813c3f
PW
2091 * Set up the module's interface clocks. XXX This function is still mostly
2092 * a stub; implementing this properly requires iclk autoidle usecounting in
2093 * the clock code. No return value.
63c85238 2094 */
64813c3f 2095static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
63c85238 2096{
5d95dde7 2097 struct omap_hwmod_ocp_if *os;
11cd4b94 2098 struct list_head *p;
5d95dde7 2099 int i = 0;
381d033a 2100 if (oh->_state != _HWMOD_STATE_INITIALIZED)
64813c3f 2101 return;
48d54f3f 2102
11cd4b94 2103 p = oh->slave_ports.next;
63c85238 2104
5d95dde7 2105 while (i < oh->slaves_cnt) {
11cd4b94 2106 os = _fetch_next_ocp_if(&p, &i);
5d95dde7 2107 if (!os->_clk)
64813c3f 2108 continue;
63c85238 2109
64813c3f
PW
2110 if (os->flags & OCPIF_SWSUP_IDLE) {
2111 /* XXX omap_iclk_deny_idle(c); */
2112 } else {
2113 /* XXX omap_iclk_allow_idle(c); */
5d95dde7 2114 clk_enable(os->_clk);
63c85238
PW
2115 }
2116 }
2117
64813c3f
PW
2118 return;
2119}
2120
2121/**
2122 * _setup_reset - reset an IP block during the setup process
2123 * @oh: struct omap_hwmod *
2124 *
2125 * Reset the IP block corresponding to the hwmod @oh during the setup
2126 * process. The IP block is first enabled so it can be successfully
2127 * reset. Returns 0 upon success or a negative error code upon
2128 * failure.
2129 */
2130static int __init _setup_reset(struct omap_hwmod *oh)
2131{
2132 int r;
2133
2134 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2135 return -EINVAL;
63c85238 2136
747834ab
PW
2137 if (oh->rst_lines_cnt == 0) {
2138 r = _enable(oh);
2139 if (r) {
2140 pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2141 oh->name, oh->_state);
2142 return -EINVAL;
2143 }
9a23dfe1 2144 }
63c85238 2145
2800852a 2146 if (!(oh->flags & HWMOD_INIT_NO_RESET))
64813c3f
PW
2147 r = _reset(oh);
2148
2149 return r;
2150}
2151
2152/**
2153 * _setup_postsetup - transition to the appropriate state after _setup
2154 * @oh: struct omap_hwmod *
2155 *
2156 * Place an IP block represented by @oh into a "post-setup" state --
2157 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
2158 * this function is called at the end of _setup().) The postsetup
2159 * state for an IP block can be changed by calling
2160 * omap_hwmod_enter_postsetup_state() early in the boot process,
2161 * before one of the omap_hwmod_setup*() functions are called for the
2162 * IP block.
2163 *
2164 * The IP block stays in this state until a PM runtime-based driver is
2165 * loaded for that IP block. A post-setup state of IDLE is
2166 * appropriate for almost all IP blocks with runtime PM-enabled
2167 * drivers, since those drivers are able to enable the IP block. A
2168 * post-setup state of ENABLED is appropriate for kernels with PM
2169 * runtime disabled. The DISABLED state is appropriate for unusual IP
2170 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2171 * included, since the WDTIMER starts running on reset and will reset
2172 * the MPU if left active.
2173 *
2174 * This post-setup mechanism is deprecated. Once all of the OMAP
2175 * drivers have been converted to use PM runtime, and all of the IP
2176 * block data and interconnect data is available to the hwmod code, it
2177 * should be possible to replace this mechanism with a "lazy reset"
2178 * arrangement. In a "lazy reset" setup, each IP block is enabled
2179 * when the driver first probes, then all remaining IP blocks without
2180 * drivers are either shut down or enabled after the drivers have
2181 * loaded. However, this cannot take place until the above
2182 * preconditions have been met, since otherwise the late reset code
2183 * has no way of knowing which IP blocks are in use by drivers, and
2184 * which ones are unused.
2185 *
2186 * No return value.
2187 */
2188static void __init _setup_postsetup(struct omap_hwmod *oh)
2189{
2190 u8 postsetup_state;
2191
2192 if (oh->rst_lines_cnt > 0)
2193 return;
76e5589e 2194
2092e5cc
PW
2195 postsetup_state = oh->_postsetup_state;
2196 if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2197 postsetup_state = _HWMOD_STATE_ENABLED;
2198
2199 /*
2200 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2201 * it should be set by the core code as a runtime flag during startup
2202 */
2203 if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
aacf0941
RN
2204 (postsetup_state == _HWMOD_STATE_IDLE)) {
2205 oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2092e5cc 2206 postsetup_state = _HWMOD_STATE_ENABLED;
aacf0941 2207 }
2092e5cc
PW
2208
2209 if (postsetup_state == _HWMOD_STATE_IDLE)
dc6d1cda 2210 _idle(oh);
2092e5cc
PW
2211 else if (postsetup_state == _HWMOD_STATE_DISABLED)
2212 _shutdown(oh);
2213 else if (postsetup_state != _HWMOD_STATE_ENABLED)
2214 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2215 oh->name, postsetup_state);
63c85238 2216
64813c3f
PW
2217 return;
2218}
2219
2220/**
2221 * _setup - prepare IP block hardware for use
2222 * @oh: struct omap_hwmod *
2223 * @n: (unused, pass NULL)
2224 *
2225 * Configure the IP block represented by @oh. This may include
2226 * enabling the IP block, resetting it, and placing it into a
2227 * post-setup state, depending on the type of IP block and applicable
2228 * flags. IP blocks are reset to prevent any previous configuration
2229 * by the bootloader or previous operating system from interfering
2230 * with power management or other parts of the system. The reset can
2231 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
2232 * two phases for hwmod initialization. Code called here generally
2233 * affects the IP block hardware, or system integration hardware
2234 * associated with the IP block. Returns 0.
2235 */
2236static int __init _setup(struct omap_hwmod *oh, void *data)
2237{
2238 if (oh->_state != _HWMOD_STATE_INITIALIZED)
2239 return 0;
2240
2241 _setup_iclk_autoidle(oh);
2242
2243 if (!_setup_reset(oh))
2244 _setup_postsetup(oh);
2245
63c85238
PW
2246 return 0;
2247}
2248
63c85238 2249/**
0102b627 2250 * _register - register a struct omap_hwmod
63c85238
PW
2251 * @oh: struct omap_hwmod *
2252 *
43b40992
PW
2253 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
2254 * already has been registered by the same name; -EINVAL if the
2255 * omap_hwmod is in the wrong state, if @oh is NULL, if the
2256 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2257 * name, or if the omap_hwmod's class is missing a name; or 0 upon
2258 * success.
63c85238
PW
2259 *
2260 * XXX The data should be copied into bootmem, so the original data
2261 * should be marked __initdata and freed after init. This would allow
2262 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
2263 * that the copy process would be relatively complex due to the large number
2264 * of substructures.
2265 */
01592df9 2266static int __init _register(struct omap_hwmod *oh)
63c85238 2267{
43b40992
PW
2268 if (!oh || !oh->name || !oh->class || !oh->class->name ||
2269 (oh->_state != _HWMOD_STATE_UNKNOWN))
63c85238
PW
2270 return -EINVAL;
2271
63c85238
PW
2272 pr_debug("omap_hwmod: %s: registering\n", oh->name);
2273
ce35b244
BC
2274 if (_lookup(oh->name))
2275 return -EEXIST;
63c85238 2276
63c85238
PW
2277 list_add_tail(&oh->node, &omap_hwmod_list);
2278
2221b5cd
PW
2279 INIT_LIST_HEAD(&oh->master_ports);
2280 INIT_LIST_HEAD(&oh->slave_ports);
dc6d1cda 2281 spin_lock_init(&oh->_lock);
2092e5cc 2282
63c85238
PW
2283 oh->_state = _HWMOD_STATE_REGISTERED;
2284
569edd70
PW
2285 /*
2286 * XXX Rather than doing a strcmp(), this should test a flag
2287 * set in the hwmod data, inserted by the autogenerator code.
2288 */
2289 if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2290 mpu_oh = oh;
63c85238 2291
569edd70 2292 return 0;
63c85238
PW
2293}
2294
2221b5cd
PW
2295/**
2296 * _alloc_links - return allocated memory for hwmod links
2297 * @ml: pointer to a struct omap_hwmod_link * for the master link
2298 * @sl: pointer to a struct omap_hwmod_link * for the slave link
2299 *
2300 * Return pointers to two struct omap_hwmod_link records, via the
2301 * addresses pointed to by @ml and @sl. Will first attempt to return
2302 * memory allocated as part of a large initial block, but if that has
2303 * been exhausted, will allocate memory itself. Since ideally this
2304 * second allocation path will never occur, the number of these
2305 * 'supplemental' allocations will be logged when debugging is
2306 * enabled. Returns 0.
2307 */
2308static int __init _alloc_links(struct omap_hwmod_link **ml,
2309 struct omap_hwmod_link **sl)
2310{
2311 unsigned int sz;
2312
2313 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2314 *ml = &linkspace[free_ls++];
2315 *sl = &linkspace[free_ls++];
2316 return 0;
2317 }
2318
2319 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2320
2321 *sl = NULL;
2322 *ml = alloc_bootmem(sz);
2323
2324 memset(*ml, 0, sz);
2325
2326 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2327
2328 ls_supp++;
2329 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2330 ls_supp * LINKS_PER_OCP_IF);
2331
2332 return 0;
2333};
2334
2335/**
2336 * _add_link - add an interconnect between two IP blocks
2337 * @oi: pointer to a struct omap_hwmod_ocp_if record
2338 *
2339 * Add struct omap_hwmod_link records connecting the master IP block
2340 * specified in @oi->master to @oi, and connecting the slave IP block
2341 * specified in @oi->slave to @oi. This code is assumed to run before
2342 * preemption or SMP has been enabled, thus avoiding the need for
2343 * locking in this code. Changes to this assumption will require
2344 * additional locking. Returns 0.
2345 */
2346static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2347{
2348 struct omap_hwmod_link *ml, *sl;
2349
2350 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2351 oi->slave->name);
2352
2353 _alloc_links(&ml, &sl);
2354
2355 ml->ocp_if = oi;
2356 INIT_LIST_HEAD(&ml->node);
2357 list_add(&ml->node, &oi->master->master_ports);
2358 oi->master->masters_cnt++;
2359
2360 sl->ocp_if = oi;
2361 INIT_LIST_HEAD(&sl->node);
2362 list_add(&sl->node, &oi->slave->slave_ports);
2363 oi->slave->slaves_cnt++;
2364
2365 return 0;
2366}
2367
2368/**
2369 * _register_link - register a struct omap_hwmod_ocp_if
2370 * @oi: struct omap_hwmod_ocp_if *
2371 *
2372 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
2373 * has already been registered; -EINVAL if @oi is NULL or if the
2374 * record pointed to by @oi is missing required fields; or 0 upon
2375 * success.
2376 *
2377 * XXX The data should be copied into bootmem, so the original data
2378 * should be marked __initdata and freed after init. This would allow
2379 * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2380 */
2381static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2382{
2383 if (!oi || !oi->master || !oi->slave || !oi->user)
2384 return -EINVAL;
2385
2386 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2387 return -EEXIST;
2388
2389 pr_debug("omap_hwmod: registering link from %s to %s\n",
2390 oi->master->name, oi->slave->name);
2391
2392 /*
2393 * Register the connected hwmods, if they haven't been
2394 * registered already
2395 */
2396 if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2397 _register(oi->master);
2398
2399 if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2400 _register(oi->slave);
2401
2402 _add_link(oi);
2403
2404 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2405
2406 return 0;
2407}
2408
2409/**
2410 * _alloc_linkspace - allocate large block of hwmod links
2411 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2412 *
2413 * Allocate a large block of struct omap_hwmod_link records. This
2414 * improves boot time significantly by avoiding the need to allocate
2415 * individual records one by one. If the number of records to
2416 * allocate in the block hasn't been manually specified, this function
2417 * will count the number of struct omap_hwmod_ocp_if records in @ois
2418 * and use that to determine the allocation size. For SoC families
2419 * that require multiple list registrations, such as OMAP3xxx, this
2420 * estimation process isn't optimal, so manual estimation is advised
2421 * in those cases. Returns -EEXIST if the allocation has already occurred
2422 * or 0 upon success.
2423 */
2424static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2425{
2426 unsigned int i = 0;
2427 unsigned int sz;
2428
2429 if (linkspace) {
2430 WARN(1, "linkspace already allocated\n");
2431 return -EEXIST;
2432 }
2433
2434 if (max_ls == 0)
2435 while (ois[i++])
2436 max_ls += LINKS_PER_OCP_IF;
2437
2438 sz = sizeof(struct omap_hwmod_link) * max_ls;
2439
2440 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2441 __func__, sz, max_ls);
2442
2443 linkspace = alloc_bootmem(sz);
2444
2445 memset(linkspace, 0, sz);
2446
2447 return 0;
2448}
0102b627
BC
2449
2450/* Public functions */
2451
2452u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
2453{
2454 if (oh->flags & HWMOD_16BIT_REG)
2455 return __raw_readw(oh->_mpu_rt_va + reg_offs);
2456 else
2457 return __raw_readl(oh->_mpu_rt_va + reg_offs);
2458}
2459
2460void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
2461{
2462 if (oh->flags & HWMOD_16BIT_REG)
2463 __raw_writew(v, oh->_mpu_rt_va + reg_offs);
2464 else
2465 __raw_writel(v, oh->_mpu_rt_va + reg_offs);
2466}
2467
6d3c55fd
A
2468/**
2469 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
2470 * @oh: struct omap_hwmod *
2471 *
2472 * This is a public function exposed to drivers. Some drivers may need to do
2473 * some settings before and after resetting the device. Those drivers after
2474 * doing the necessary settings could use this function to start a reset by
2475 * setting the SYSCONFIG.SOFTRESET bit.
2476 */
2477int omap_hwmod_softreset(struct omap_hwmod *oh)
2478{
3c55c1ba
PW
2479 u32 v;
2480 int ret;
2481
2482 if (!oh || !(oh->_sysc_cache))
6d3c55fd
A
2483 return -EINVAL;
2484
3c55c1ba
PW
2485 v = oh->_sysc_cache;
2486 ret = _set_softreset(oh, &v);
2487 if (ret)
2488 goto error;
2489 _write_sysconfig(v, oh);
2490
2491error:
2492 return ret;
6d3c55fd
A
2493}
2494
0102b627
BC
2495/**
2496 * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
2497 * @oh: struct omap_hwmod *
2498 * @idlemode: SIDLEMODE field bits (shifted to bit 0)
2499 *
2500 * Sets the IP block's OCP slave idlemode in hardware, and updates our
2501 * local copy. Intended to be used by drivers that have some erratum
2502 * that requires direct manipulation of the SIDLEMODE bits. Returns
2503 * -EINVAL if @oh is null, or passes along the return value from
2504 * _set_slave_idlemode().
2505 *
2506 * XXX Does this function have any current users? If not, we should
2507 * remove it; it is better to let the rest of the hwmod code handle this.
2508 * Any users of this function should be scrutinized carefully.
2509 */
2510int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
2511{
2512 u32 v;
2513 int retval = 0;
2514
2515 if (!oh)
2516 return -EINVAL;
2517
2518 v = oh->_sysc_cache;
2519
2520 retval = _set_slave_idlemode(oh, idlemode, &v);
2521 if (!retval)
2522 _write_sysconfig(v, oh);
2523
2524 return retval;
2525}
2526
63c85238
PW
2527/**
2528 * omap_hwmod_lookup - look up a registered omap_hwmod by name
2529 * @name: name of the omap_hwmod to look up
2530 *
2531 * Given a @name of an omap_hwmod, return a pointer to the registered
2532 * struct omap_hwmod *, or NULL upon error.
2533 */
2534struct omap_hwmod *omap_hwmod_lookup(const char *name)
2535{
2536 struct omap_hwmod *oh;
2537
2538 if (!name)
2539 return NULL;
2540
63c85238 2541 oh = _lookup(name);
63c85238
PW
2542
2543 return oh;
2544}
2545
2546/**
2547 * omap_hwmod_for_each - call function for each registered omap_hwmod
2548 * @fn: pointer to a callback function
97d60162 2549 * @data: void * data to pass to callback function
63c85238
PW
2550 *
2551 * Call @fn for each registered omap_hwmod, passing @data to each
2552 * function. @fn must return 0 for success or any other value for
2553 * failure. If @fn returns non-zero, the iteration across omap_hwmods
2554 * will stop and the non-zero return value will be passed to the
2555 * caller of omap_hwmod_for_each(). @fn is called with
2556 * omap_hwmod_for_each() held.
2557 */
97d60162
PW
2558int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
2559 void *data)
63c85238
PW
2560{
2561 struct omap_hwmod *temp_oh;
30ebad9d 2562 int ret = 0;
63c85238
PW
2563
2564 if (!fn)
2565 return -EINVAL;
2566
63c85238 2567 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
97d60162 2568 ret = (*fn)(temp_oh, data);
63c85238
PW
2569 if (ret)
2570 break;
2571 }
63c85238
PW
2572
2573 return ret;
2574}
2575
2221b5cd
PW
2576/**
2577 * omap_hwmod_register_links - register an array of hwmod links
2578 * @ois: pointer to an array of omap_hwmod_ocp_if to register
2579 *
2580 * Intended to be called early in boot before the clock framework is
2581 * initialized. If @ois is not null, will register all omap_hwmods
2582 * listed in @ois that are valid for this chip. Returns 0.
2583 */
2584int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
2585{
2586 int r, i;
2587
2588 if (!ois)
2589 return 0;
2590
2221b5cd
PW
2591 if (!linkspace) {
2592 if (_alloc_linkspace(ois)) {
2593 pr_err("omap_hwmod: could not allocate link space\n");
2594 return -ENOMEM;
2595 }
2596 }
2597
2598 i = 0;
2599 do {
2600 r = _register_link(ois[i]);
2601 WARN(r && r != -EEXIST,
2602 "omap_hwmod: _register_link(%s -> %s) returned %d\n",
2603 ois[i]->master->name, ois[i]->slave->name, r);
2604 } while (ois[++i]);
2605
2606 return 0;
2607}
2608
381d033a
PW
2609/**
2610 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
2611 * @oh: pointer to the hwmod currently being set up (usually not the MPU)
2612 *
2613 * If the hwmod data corresponding to the MPU subsystem IP block
2614 * hasn't been initialized and set up yet, do so now. This must be
2615 * done first since sleep dependencies may be added from other hwmods
2616 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
2617 * return value.
63c85238 2618 */
381d033a 2619static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
e7c7d760 2620{
381d033a
PW
2621 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
2622 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
2623 __func__, MPU_INITIATOR_NAME);
2624 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
2625 omap_hwmod_setup_one(MPU_INITIATOR_NAME);
e7c7d760
TL
2626}
2627
63c85238 2628/**
a2debdbd
PW
2629 * omap_hwmod_setup_one - set up a single hwmod
2630 * @oh_name: const char * name of the already-registered hwmod to set up
2631 *
381d033a
PW
2632 * Initialize and set up a single hwmod. Intended to be used for a
2633 * small number of early devices, such as the timer IP blocks used for
2634 * the scheduler clock. Must be called after omap2_clk_init().
2635 * Resolves the struct clk names to struct clk pointers for each
2636 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
2637 * -EINVAL upon error or 0 upon success.
a2debdbd
PW
2638 */
2639int __init omap_hwmod_setup_one(const char *oh_name)
63c85238
PW
2640{
2641 struct omap_hwmod *oh;
63c85238 2642
a2debdbd
PW
2643 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
2644
a2debdbd
PW
2645 oh = _lookup(oh_name);
2646 if (!oh) {
2647 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
2648 return -EINVAL;
2649 }
63c85238 2650
381d033a 2651 _ensure_mpu_hwmod_is_setup(oh);
63c85238 2652
381d033a 2653 _init(oh, NULL);
a2debdbd
PW
2654 _setup(oh, NULL);
2655
63c85238
PW
2656 return 0;
2657}
2658
2659/**
381d033a 2660 * omap_hwmod_setup_all - set up all registered IP blocks
63c85238 2661 *
381d033a
PW
2662 * Initialize and set up all IP blocks registered with the hwmod code.
2663 * Must be called after omap2_clk_init(). Resolves the struct clk
2664 * names to struct clk pointers for each registered omap_hwmod. Also
2665 * calls _setup() on each hwmod. Returns 0 upon success.
63c85238 2666 */
550c8092 2667static int __init omap_hwmod_setup_all(void)
63c85238 2668{
381d033a 2669 _ensure_mpu_hwmod_is_setup(NULL);
63c85238 2670
381d033a 2671 omap_hwmod_for_each(_init, NULL);
2092e5cc 2672 omap_hwmod_for_each(_setup, NULL);
63c85238
PW
2673
2674 return 0;
2675}
550c8092 2676core_initcall(omap_hwmod_setup_all);
63c85238 2677
63c85238
PW
2678/**
2679 * omap_hwmod_enable - enable an omap_hwmod
2680 * @oh: struct omap_hwmod *
2681 *
74ff3a68 2682 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
63c85238
PW
2683 * Returns -EINVAL on error or passes along the return value from _enable().
2684 */
2685int omap_hwmod_enable(struct omap_hwmod *oh)
2686{
2687 int r;
dc6d1cda 2688 unsigned long flags;
63c85238
PW
2689
2690 if (!oh)
2691 return -EINVAL;
2692
dc6d1cda
PW
2693 spin_lock_irqsave(&oh->_lock, flags);
2694 r = _enable(oh);
2695 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2696
2697 return r;
2698}
2699
2700/**
2701 * omap_hwmod_idle - idle an omap_hwmod
2702 * @oh: struct omap_hwmod *
2703 *
74ff3a68 2704 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
63c85238
PW
2705 * Returns -EINVAL on error or passes along the return value from _idle().
2706 */
2707int omap_hwmod_idle(struct omap_hwmod *oh)
2708{
dc6d1cda
PW
2709 unsigned long flags;
2710
63c85238
PW
2711 if (!oh)
2712 return -EINVAL;
2713
dc6d1cda
PW
2714 spin_lock_irqsave(&oh->_lock, flags);
2715 _idle(oh);
2716 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2717
2718 return 0;
2719}
2720
2721/**
2722 * omap_hwmod_shutdown - shutdown an omap_hwmod
2723 * @oh: struct omap_hwmod *
2724 *
74ff3a68 2725 * Shutdown an omap_hwmod @oh. Intended to be called by
63c85238
PW
2726 * omap_device_shutdown(). Returns -EINVAL on error or passes along
2727 * the return value from _shutdown().
2728 */
2729int omap_hwmod_shutdown(struct omap_hwmod *oh)
2730{
dc6d1cda
PW
2731 unsigned long flags;
2732
63c85238
PW
2733 if (!oh)
2734 return -EINVAL;
2735
dc6d1cda 2736 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2737 _shutdown(oh);
dc6d1cda 2738 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2739
2740 return 0;
2741}
2742
2743/**
2744 * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
2745 * @oh: struct omap_hwmod *oh
2746 *
2747 * Intended to be called by the omap_device code.
2748 */
2749int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
2750{
dc6d1cda
PW
2751 unsigned long flags;
2752
2753 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2754 _enable_clocks(oh);
dc6d1cda 2755 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2756
2757 return 0;
2758}
2759
2760/**
2761 * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
2762 * @oh: struct omap_hwmod *oh
2763 *
2764 * Intended to be called by the omap_device code.
2765 */
2766int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
2767{
dc6d1cda
PW
2768 unsigned long flags;
2769
2770 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2771 _disable_clocks(oh);
dc6d1cda 2772 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2773
2774 return 0;
2775}
2776
2777/**
2778 * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
2779 * @oh: struct omap_hwmod *oh
2780 *
2781 * Intended to be called by drivers and core code when all posted
2782 * writes to a device must complete before continuing further
2783 * execution (for example, after clearing some device IRQSTATUS
2784 * register bits)
2785 *
2786 * XXX what about targets with multiple OCP threads?
2787 */
2788void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
2789{
2790 BUG_ON(!oh);
2791
43b40992 2792 if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
4f8a428d
RK
2793 WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
2794 oh->name);
63c85238
PW
2795 return;
2796 }
2797
2798 /*
2799 * Forces posted writes to complete on the OCP thread handling
2800 * register writes
2801 */
cc7a1d2a 2802 omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
63c85238
PW
2803}
2804
2805/**
2806 * omap_hwmod_reset - reset the hwmod
2807 * @oh: struct omap_hwmod *
2808 *
2809 * Under some conditions, a driver may wish to reset the entire device.
2810 * Called from omap_device code. Returns -EINVAL on error or passes along
9b579114 2811 * the return value from _reset().
63c85238
PW
2812 */
2813int omap_hwmod_reset(struct omap_hwmod *oh)
2814{
2815 int r;
dc6d1cda 2816 unsigned long flags;
63c85238 2817
9b579114 2818 if (!oh)
63c85238
PW
2819 return -EINVAL;
2820
dc6d1cda 2821 spin_lock_irqsave(&oh->_lock, flags);
63c85238 2822 r = _reset(oh);
dc6d1cda 2823 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
2824
2825 return r;
2826}
2827
5e8370f1
PW
2828/*
2829 * IP block data retrieval functions
2830 */
2831
63c85238
PW
2832/**
2833 * omap_hwmod_count_resources - count number of struct resources needed by hwmod
2834 * @oh: struct omap_hwmod *
2835 * @res: pointer to the first element of an array of struct resource to fill
2836 *
2837 * Count the number of struct resource array elements necessary to
2838 * contain omap_hwmod @oh resources. Intended to be called by code
2839 * that registers omap_devices. Intended to be used to determine the
2840 * size of a dynamically-allocated struct resource array, before
2841 * calling omap_hwmod_fill_resources(). Returns the number of struct
2842 * resource array elements needed.
2843 *
2844 * XXX This code is not optimized. It could attempt to merge adjacent
2845 * resource IDs.
2846 *
2847 */
2848int omap_hwmod_count_resources(struct omap_hwmod *oh)
2849{
5d95dde7 2850 struct omap_hwmod_ocp_if *os;
11cd4b94 2851 struct list_head *p;
5d95dde7
PW
2852 int ret;
2853 int i = 0;
63c85238 2854
bc614958 2855 ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
63c85238 2856
11cd4b94 2857 p = oh->slave_ports.next;
2221b5cd 2858
5d95dde7 2859 while (i < oh->slaves_cnt) {
11cd4b94 2860 os = _fetch_next_ocp_if(&p, &i);
5d95dde7
PW
2861 ret += _count_ocp_if_addr_spaces(os);
2862 }
63c85238
PW
2863
2864 return ret;
2865}
2866
2867/**
2868 * omap_hwmod_fill_resources - fill struct resource array with hwmod data
2869 * @oh: struct omap_hwmod *
2870 * @res: pointer to the first element of an array of struct resource to fill
2871 *
2872 * Fill the struct resource array @res with resource data from the
2873 * omap_hwmod @oh. Intended to be called by code that registers
2874 * omap_devices. See also omap_hwmod_count_resources(). Returns the
2875 * number of array elements filled.
2876 */
2877int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
2878{
5d95dde7 2879 struct omap_hwmod_ocp_if *os;
11cd4b94 2880 struct list_head *p;
5d95dde7 2881 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
63c85238
PW
2882 int r = 0;
2883
2884 /* For each IRQ, DMA, memory area, fill in array.*/
2885
212738a4
PW
2886 mpu_irqs_cnt = _count_mpu_irqs(oh);
2887 for (i = 0; i < mpu_irqs_cnt; i++) {
718bfd76
PW
2888 (res + r)->name = (oh->mpu_irqs + i)->name;
2889 (res + r)->start = (oh->mpu_irqs + i)->irq;
2890 (res + r)->end = (oh->mpu_irqs + i)->irq;
63c85238
PW
2891 (res + r)->flags = IORESOURCE_IRQ;
2892 r++;
2893 }
2894
bc614958
PW
2895 sdma_reqs_cnt = _count_sdma_reqs(oh);
2896 for (i = 0; i < sdma_reqs_cnt; i++) {
9ee9fff9
BC
2897 (res + r)->name = (oh->sdma_reqs + i)->name;
2898 (res + r)->start = (oh->sdma_reqs + i)->dma_req;
2899 (res + r)->end = (oh->sdma_reqs + i)->dma_req;
63c85238
PW
2900 (res + r)->flags = IORESOURCE_DMA;
2901 r++;
2902 }
2903
11cd4b94 2904 p = oh->slave_ports.next;
2221b5cd 2905
5d95dde7
PW
2906 i = 0;
2907 while (i < oh->slaves_cnt) {
11cd4b94 2908 os = _fetch_next_ocp_if(&p, &i);
78183f3f 2909 addr_cnt = _count_ocp_if_addr_spaces(os);
63c85238 2910
78183f3f 2911 for (j = 0; j < addr_cnt; j++) {
cd503802 2912 (res + r)->name = (os->addr + j)->name;
63c85238
PW
2913 (res + r)->start = (os->addr + j)->pa_start;
2914 (res + r)->end = (os->addr + j)->pa_end;
2915 (res + r)->flags = IORESOURCE_MEM;
2916 r++;
2917 }
2918 }
2919
2920 return r;
2921}
2922
5e8370f1
PW
2923/**
2924 * omap_hwmod_get_resource_byname - fetch IP block integration data by name
2925 * @oh: struct omap_hwmod * to operate on
2926 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
2927 * @name: pointer to the name of the data to fetch (optional)
2928 * @rsrc: pointer to a struct resource, allocated by the caller
2929 *
2930 * Retrieve MPU IRQ, SDMA request line, or address space start/end
2931 * data for the IP block pointed to by @oh. The data will be filled
2932 * into a struct resource record pointed to by @rsrc. The struct
2933 * resource must be allocated by the caller. When @name is non-null,
2934 * the data associated with the matching entry in the IRQ/SDMA/address
2935 * space hwmod data arrays will be returned. If @name is null, the
2936 * first array entry will be returned. Data order is not meaningful
2937 * in hwmod data, so callers are strongly encouraged to use a non-null
2938 * @name whenever possible to avoid unpredictable effects if hwmod
2939 * data is later added that causes data ordering to change. This
2940 * function is only intended for use by OMAP core code. Device
2941 * drivers should not call this function - the appropriate bus-related
2942 * data accessor functions should be used instead. Returns 0 upon
2943 * success or a negative error code upon error.
2944 */
2945int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
2946 const char *name, struct resource *rsrc)
2947{
2948 int r;
2949 unsigned int irq, dma;
2950 u32 pa_start, pa_end;
2951
2952 if (!oh || !rsrc)
2953 return -EINVAL;
2954
2955 if (type == IORESOURCE_IRQ) {
2956 r = _get_mpu_irq_by_name(oh, name, &irq);
2957 if (r)
2958 return r;
2959
2960 rsrc->start = irq;
2961 rsrc->end = irq;
2962 } else if (type == IORESOURCE_DMA) {
2963 r = _get_sdma_req_by_name(oh, name, &dma);
2964 if (r)
2965 return r;
2966
2967 rsrc->start = dma;
2968 rsrc->end = dma;
2969 } else if (type == IORESOURCE_MEM) {
2970 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
2971 if (r)
2972 return r;
2973
2974 rsrc->start = pa_start;
2975 rsrc->end = pa_end;
2976 } else {
2977 return -EINVAL;
2978 }
2979
2980 rsrc->flags = type;
2981 rsrc->name = name;
2982
2983 return 0;
2984}
2985
63c85238
PW
2986/**
2987 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
2988 * @oh: struct omap_hwmod *
2989 *
2990 * Return the powerdomain pointer associated with the OMAP module
2991 * @oh's main clock. If @oh does not have a main clk, return the
2992 * powerdomain associated with the interface clock associated with the
2993 * module's MPU port. (XXX Perhaps this should use the SDMA port
2994 * instead?) Returns NULL on error, or a struct powerdomain * on
2995 * success.
2996 */
2997struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
2998{
2999 struct clk *c;
2d6141ba 3000 struct omap_hwmod_ocp_if *oi;
63c85238
PW
3001
3002 if (!oh)
3003 return NULL;
3004
3005 if (oh->_clk) {
3006 c = oh->_clk;
3007 } else {
2d6141ba
PW
3008 oi = _find_mpu_rt_port(oh);
3009 if (!oi)
63c85238 3010 return NULL;
2d6141ba 3011 c = oi->_clk;
63c85238
PW
3012 }
3013
d5647c18
TG
3014 if (!c->clkdm)
3015 return NULL;
3016
63c85238
PW
3017 return c->clkdm->pwrdm.ptr;
3018
3019}
3020
db2a60bf
PW
3021/**
3022 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3023 * @oh: struct omap_hwmod *
3024 *
3025 * Returns the virtual address corresponding to the beginning of the
3026 * module's register target, in the address range that is intended to
3027 * be used by the MPU. Returns the virtual address upon success or NULL
3028 * upon error.
3029 */
3030void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3031{
3032 if (!oh)
3033 return NULL;
3034
3035 if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3036 return NULL;
3037
3038 if (oh->_state == _HWMOD_STATE_UNKNOWN)
3039 return NULL;
3040
3041 return oh->_mpu_rt_va;
3042}
3043
63c85238
PW
3044/**
3045 * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3046 * @oh: struct omap_hwmod *
3047 * @init_oh: struct omap_hwmod * (initiator)
3048 *
3049 * Add a sleep dependency between the initiator @init_oh and @oh.
3050 * Intended to be called by DSP/Bridge code via platform_data for the
3051 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3052 * code needs to add/del initiator dependencies dynamically
3053 * before/after accessing a device. Returns the return value from
3054 * _add_initiator_dep().
3055 *
3056 * XXX Keep a usecount in the clockdomain code
3057 */
3058int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3059 struct omap_hwmod *init_oh)
3060{
3061 return _add_initiator_dep(oh, init_oh);
3062}
3063
3064/*
3065 * XXX what about functions for drivers to save/restore ocp_sysconfig
3066 * for context save/restore operations?
3067 */
3068
3069/**
3070 * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3071 * @oh: struct omap_hwmod *
3072 * @init_oh: struct omap_hwmod * (initiator)
3073 *
3074 * Remove a sleep dependency between the initiator @init_oh and @oh.
3075 * Intended to be called by DSP/Bridge code via platform_data for the
3076 * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
3077 * code needs to add/del initiator dependencies dynamically
3078 * before/after accessing a device. Returns the return value from
3079 * _del_initiator_dep().
3080 *
3081 * XXX Keep a usecount in the clockdomain code
3082 */
3083int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3084 struct omap_hwmod *init_oh)
3085{
3086 return _del_initiator_dep(oh, init_oh);
3087}
3088
63c85238
PW
3089/**
3090 * omap_hwmod_enable_wakeup - allow device to wake up the system
3091 * @oh: struct omap_hwmod *
3092 *
3093 * Sets the module OCP socket ENAWAKEUP bit to allow the module to
2a1cc144
G
3094 * send wakeups to the PRCM, and enable I/O ring wakeup events for
3095 * this IP block if it has dynamic mux entries. Eventually this
3096 * should set PRCM wakeup registers to cause the PRCM to receive
3097 * wakeup events from the module. Does not set any wakeup routing
3098 * registers beyond this point - if the module is to wake up any other
3099 * module or subsystem, that must be set separately. Called by
3100 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3101 */
3102int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3103{
dc6d1cda 3104 unsigned long flags;
5a7ddcbd 3105 u32 v;
dc6d1cda 3106
dc6d1cda 3107 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3108
3109 if (oh->class->sysc &&
3110 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3111 v = oh->_sysc_cache;
3112 _enable_wakeup(oh, &v);
3113 _write_sysconfig(v, oh);
3114 }
3115
eceec009 3116 _set_idle_ioring_wakeup(oh, true);
dc6d1cda 3117 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3118
3119 return 0;
3120}
3121
3122/**
3123 * omap_hwmod_disable_wakeup - prevent device from waking the system
3124 * @oh: struct omap_hwmod *
3125 *
3126 * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2a1cc144
G
3127 * from sending wakeups to the PRCM, and disable I/O ring wakeup
3128 * events for this IP block if it has dynamic mux entries. Eventually
3129 * this should clear PRCM wakeup registers to cause the PRCM to ignore
3130 * wakeup events from the module. Does not set any wakeup routing
3131 * registers beyond this point - if the module is to wake up any other
3132 * module or subsystem, that must be set separately. Called by
3133 * omap_device code. Returns -EINVAL on error or 0 upon success.
63c85238
PW
3134 */
3135int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3136{
dc6d1cda 3137 unsigned long flags;
5a7ddcbd 3138 u32 v;
dc6d1cda 3139
dc6d1cda 3140 spin_lock_irqsave(&oh->_lock, flags);
2a1cc144
G
3141
3142 if (oh->class->sysc &&
3143 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3144 v = oh->_sysc_cache;
3145 _disable_wakeup(oh, &v);
3146 _write_sysconfig(v, oh);
3147 }
3148
eceec009 3149 _set_idle_ioring_wakeup(oh, false);
dc6d1cda 3150 spin_unlock_irqrestore(&oh->_lock, flags);
63c85238
PW
3151
3152 return 0;
3153}
43b40992 3154
aee48e3c
PW
3155/**
3156 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3157 * contained in the hwmod module.
3158 * @oh: struct omap_hwmod *
3159 * @name: name of the reset line to lookup and assert
3160 *
3161 * Some IP like dsp, ipu or iva contain processor that require
3162 * an HW reset line to be assert / deassert in order to enable fully
3163 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3164 * yet supported on this OMAP; otherwise, passes along the return value
3165 * from _assert_hardreset().
3166 */
3167int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3168{
3169 int ret;
dc6d1cda 3170 unsigned long flags;
aee48e3c
PW
3171
3172 if (!oh)
3173 return -EINVAL;
3174
dc6d1cda 3175 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3176 ret = _assert_hardreset(oh, name);
dc6d1cda 3177 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3178
3179 return ret;
3180}
3181
3182/**
3183 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3184 * contained in the hwmod module.
3185 * @oh: struct omap_hwmod *
3186 * @name: name of the reset line to look up and deassert
3187 *
3188 * Some IP like dsp, ipu or iva contain processor that require
3189 * an HW reset line to be assert / deassert in order to enable fully
3190 * the IP. Returns -EINVAL if @oh is null or if the operation is not
3191 * yet supported on this OMAP; otherwise, passes along the return value
3192 * from _deassert_hardreset().
3193 */
3194int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3195{
3196 int ret;
dc6d1cda 3197 unsigned long flags;
aee48e3c
PW
3198
3199 if (!oh)
3200 return -EINVAL;
3201
dc6d1cda 3202 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3203 ret = _deassert_hardreset(oh, name);
dc6d1cda 3204 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3205
3206 return ret;
3207}
3208
3209/**
3210 * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3211 * contained in the hwmod module
3212 * @oh: struct omap_hwmod *
3213 * @name: name of the reset line to look up and read
3214 *
3215 * Return the current state of the hwmod @oh's reset line named @name:
3216 * returns -EINVAL upon parameter error or if this operation
3217 * is unsupported on the current OMAP; otherwise, passes along the return
3218 * value from _read_hardreset().
3219 */
3220int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3221{
3222 int ret;
dc6d1cda 3223 unsigned long flags;
aee48e3c
PW
3224
3225 if (!oh)
3226 return -EINVAL;
3227
dc6d1cda 3228 spin_lock_irqsave(&oh->_lock, flags);
aee48e3c 3229 ret = _read_hardreset(oh, name);
dc6d1cda 3230 spin_unlock_irqrestore(&oh->_lock, flags);
aee48e3c
PW
3231
3232 return ret;
3233}
3234
3235
43b40992
PW
3236/**
3237 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3238 * @classname: struct omap_hwmod_class name to search for
3239 * @fn: callback function pointer to call for each hwmod in class @classname
3240 * @user: arbitrary context data to pass to the callback function
3241 *
ce35b244
BC
3242 * For each omap_hwmod of class @classname, call @fn.
3243 * If the callback function returns something other than
43b40992
PW
3244 * zero, the iterator is terminated, and the callback function's return
3245 * value is passed back to the caller. Returns 0 upon success, -EINVAL
3246 * if @classname or @fn are NULL, or passes back the error code from @fn.
3247 */
3248int omap_hwmod_for_each_by_class(const char *classname,
3249 int (*fn)(struct omap_hwmod *oh,
3250 void *user),
3251 void *user)
3252{
3253 struct omap_hwmod *temp_oh;
3254 int ret = 0;
3255
3256 if (!classname || !fn)
3257 return -EINVAL;
3258
3259 pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3260 __func__, classname);
3261
43b40992
PW
3262 list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3263 if (!strcmp(temp_oh->class->name, classname)) {
3264 pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3265 __func__, temp_oh->name);
3266 ret = (*fn)(temp_oh, user);
3267 if (ret)
3268 break;
3269 }
3270 }
3271
43b40992
PW
3272 if (ret)
3273 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3274 __func__, ret);
3275
3276 return ret;
3277}
3278
2092e5cc
PW
3279/**
3280 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3281 * @oh: struct omap_hwmod *
3282 * @state: state that _setup() should leave the hwmod in
3283 *
550c8092 3284 * Sets the hwmod state that @oh will enter at the end of _setup()
64813c3f
PW
3285 * (called by omap_hwmod_setup_*()). See also the documentation
3286 * for _setup_postsetup(), above. Returns 0 upon success or
3287 * -EINVAL if there is a problem with the arguments or if the hwmod is
3288 * in the wrong state.
2092e5cc
PW
3289 */
3290int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3291{
3292 int ret;
dc6d1cda 3293 unsigned long flags;
2092e5cc
PW
3294
3295 if (!oh)
3296 return -EINVAL;
3297
3298 if (state != _HWMOD_STATE_DISABLED &&
3299 state != _HWMOD_STATE_ENABLED &&
3300 state != _HWMOD_STATE_IDLE)
3301 return -EINVAL;
3302
dc6d1cda 3303 spin_lock_irqsave(&oh->_lock, flags);
2092e5cc
PW
3304
3305 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3306 ret = -EINVAL;
3307 goto ohsps_unlock;
3308 }
3309
3310 oh->_postsetup_state = state;
3311 ret = 0;
3312
3313ohsps_unlock:
dc6d1cda 3314 spin_unlock_irqrestore(&oh->_lock, flags);
2092e5cc
PW
3315
3316 return ret;
3317}
c80705aa
KH
3318
3319/**
3320 * omap_hwmod_get_context_loss_count - get lost context count
3321 * @oh: struct omap_hwmod *
3322 *
3323 * Query the powerdomain of of @oh to get the context loss
3324 * count for this device.
3325 *
3326 * Returns the context loss count of the powerdomain assocated with @oh
3327 * upon success, or zero if no powerdomain exists for @oh.
3328 */
fc013873 3329int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
c80705aa
KH
3330{
3331 struct powerdomain *pwrdm;
3332 int ret = 0;
3333
3334 pwrdm = omap_hwmod_get_pwrdm(oh);
3335 if (pwrdm)
3336 ret = pwrdm_get_context_loss_count(pwrdm);
3337
3338 return ret;
3339}
43b01643
PW
3340
3341/**
3342 * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
3343 * @oh: struct omap_hwmod *
3344 *
3345 * Prevent the hwmod @oh from being reset during the setup process.
3346 * Intended for use by board-*.c files on boards with devices that
3347 * cannot tolerate being reset. Must be called before the hwmod has
3348 * been set up. Returns 0 upon success or negative error code upon
3349 * failure.
3350 */
3351int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
3352{
3353 if (!oh)
3354 return -EINVAL;
3355
3356 if (oh->_state != _HWMOD_STATE_REGISTERED) {
3357 pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
3358 oh->name);
3359 return -EINVAL;
3360 }
3361
3362 oh->flags |= HWMOD_INIT_NO_RESET;
3363
3364 return 0;
3365}
abc2d545
TK
3366
3367/**
3368 * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
3369 * @oh: struct omap_hwmod * containing hwmod mux entries
3370 * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
3371 * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
3372 *
3373 * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
3374 * entry number @pad_idx for the hwmod @oh, trigger the interrupt
3375 * service routine for the hwmod's mpu_irqs array index @irq_idx. If
3376 * this function is not called for a given pad_idx, then the ISR
3377 * associated with @oh's first MPU IRQ will be triggered when an I/O
3378 * pad wakeup occurs on that pad. Note that @pad_idx is the index of
3379 * the _dynamic or wakeup_ entry: if there are other entries not
3380 * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
3381 * entries are NOT COUNTED in the dynamic pad index. This function
3382 * must be called separately for each pad that requires its interrupt
3383 * to be re-routed this way. Returns -EINVAL if there is an argument
3384 * problem or if @oh does not have hwmod mux entries or MPU IRQs;
3385 * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
3386 *
3387 * XXX This function interface is fragile. Rather than using array
3388 * indexes, which are subject to unpredictable change, it should be
3389 * using hwmod IRQ names, and some other stable key for the hwmod mux
3390 * pad records.
3391 */
3392int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
3393{
3394 int nr_irqs;
3395
3396 might_sleep();
3397
3398 if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
3399 pad_idx >= oh->mux->nr_pads_dynamic)
3400 return -EINVAL;
3401
3402 /* Check the number of available mpu_irqs */
3403 for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
3404 ;
3405
3406 if (irq_idx >= nr_irqs)
3407 return -EINVAL;
3408
3409 if (!oh->mux->irqs) {
3410 /* XXX What frees this? */
3411 oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
3412 GFP_KERNEL);
3413 if (!oh->mux->irqs)
3414 return -ENOMEM;
3415 }
3416 oh->mux->irqs[pad_idx] = irq_idx;
3417
3418 return 0;
3419}
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