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63c85238 PW |
1 | /* |
2 | * omap_hwmod implementation for OMAP2/3/4 | |
3 | * | |
4 | * Copyright (C) 2009 Nokia Corporation | |
63c85238 | 5 | * |
4788da26 PW |
6 | * Paul Walmsley, BenoƮt Cousson, Kevin Hilman |
7 | * | |
8 | * Created in collaboration with (alphabetical order): Thara Gopinath, | |
9 | * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand | |
10 | * Sawant, Santosh Shilimkar, Richard Woodruff | |
63c85238 PW |
11 | * |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This code manages "OMAP modules" (on-chip devices) and their | |
17 | * integration with Linux device driver and bus code. | |
18 | * | |
19 | * References: | |
20 | * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) | |
21 | * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) | |
22 | * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) | |
23 | * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) | |
24 | * - Open Core Protocol Specification 2.2 | |
25 | * | |
26 | * To do: | |
27 | * - pin mux handling | |
28 | * - handle IO mapping | |
29 | * - bus throughput & module latency measurement code | |
30 | * | |
31 | * XXX add tests at the beginning of each function to ensure the hwmod is | |
32 | * in the appropriate state | |
33 | * XXX error return values should be checked to ensure that they are | |
34 | * appropriate | |
35 | */ | |
36 | #undef DEBUG | |
37 | ||
38 | #include <linux/kernel.h> | |
39 | #include <linux/errno.h> | |
40 | #include <linux/io.h> | |
41 | #include <linux/clk.h> | |
42 | #include <linux/delay.h> | |
43 | #include <linux/err.h> | |
44 | #include <linux/list.h> | |
45 | #include <linux/mutex.h> | |
63c85238 | 46 | |
6f8b7ff5 | 47 | #include <plat/common.h> |
ce491cf8 TL |
48 | #include <plat/cpu.h> |
49 | #include <plat/clockdomain.h> | |
50 | #include <plat/powerdomain.h> | |
51 | #include <plat/clock.h> | |
52 | #include <plat/omap_hwmod.h> | |
63c85238 PW |
53 | |
54 | #include "cm.h" | |
55 | ||
56 | /* Maximum microseconds to wait for OMAP module to reset */ | |
57 | #define MAX_MODULE_RESET_WAIT 10000 | |
58 | ||
59 | /* Name of the OMAP hwmod for the MPU */ | |
5c2c0296 | 60 | #define MPU_INITIATOR_NAME "mpu" |
63c85238 PW |
61 | |
62 | /* omap_hwmod_list contains all registered struct omap_hwmods */ | |
63 | static LIST_HEAD(omap_hwmod_list); | |
64 | ||
65 | static DEFINE_MUTEX(omap_hwmod_mutex); | |
66 | ||
67 | /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ | |
68 | static struct omap_hwmod *mpu_oh; | |
69 | ||
70 | /* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */ | |
71 | static u8 inited; | |
72 | ||
73 | ||
74 | /* Private functions */ | |
75 | ||
76 | /** | |
77 | * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy | |
78 | * @oh: struct omap_hwmod * | |
79 | * | |
80 | * Load the current value of the hwmod OCP_SYSCONFIG register into the | |
81 | * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no | |
82 | * OCP_SYSCONFIG register or 0 upon success. | |
83 | */ | |
84 | static int _update_sysc_cache(struct omap_hwmod *oh) | |
85 | { | |
43b40992 PW |
86 | if (!oh->class->sysc) { |
87 | WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); | |
63c85238 PW |
88 | return -EINVAL; |
89 | } | |
90 | ||
91 | /* XXX ensure module interface clock is up */ | |
92 | ||
43b40992 | 93 | oh->_sysc_cache = omap_hwmod_readl(oh, oh->class->sysc->sysc_offs); |
63c85238 | 94 | |
43b40992 | 95 | if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE)) |
883edfdd | 96 | oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; |
63c85238 PW |
97 | |
98 | return 0; | |
99 | } | |
100 | ||
101 | /** | |
102 | * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register | |
103 | * @v: OCP_SYSCONFIG value to write | |
104 | * @oh: struct omap_hwmod * | |
105 | * | |
43b40992 PW |
106 | * Write @v into the module class' OCP_SYSCONFIG register, if it has |
107 | * one. No return value. | |
63c85238 PW |
108 | */ |
109 | static void _write_sysconfig(u32 v, struct omap_hwmod *oh) | |
110 | { | |
43b40992 PW |
111 | if (!oh->class->sysc) { |
112 | WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); | |
63c85238 PW |
113 | return; |
114 | } | |
115 | ||
116 | /* XXX ensure module interface clock is up */ | |
117 | ||
118 | if (oh->_sysc_cache != v) { | |
119 | oh->_sysc_cache = v; | |
43b40992 | 120 | omap_hwmod_writel(v, oh, oh->class->sysc->sysc_offs); |
63c85238 PW |
121 | } |
122 | } | |
123 | ||
124 | /** | |
125 | * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v | |
126 | * @oh: struct omap_hwmod * | |
127 | * @standbymode: MIDLEMODE field bits | |
128 | * @v: pointer to register contents to modify | |
129 | * | |
130 | * Update the master standby mode bits in @v to be @standbymode for | |
131 | * the @oh hwmod. Does not write to the hardware. Returns -EINVAL | |
132 | * upon error or 0 upon success. | |
133 | */ | |
134 | static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode, | |
135 | u32 *v) | |
136 | { | |
358f0e63 TG |
137 | u32 mstandby_mask; |
138 | u8 mstandby_shift; | |
139 | ||
43b40992 PW |
140 | if (!oh->class->sysc || |
141 | !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE)) | |
63c85238 PW |
142 | return -EINVAL; |
143 | ||
43b40992 PW |
144 | if (!oh->class->sysc->sysc_fields) { |
145 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
146 | return -EINVAL; |
147 | } | |
148 | ||
43b40992 | 149 | mstandby_shift = oh->class->sysc->sysc_fields->midle_shift; |
358f0e63 TG |
150 | mstandby_mask = (0x3 << mstandby_shift); |
151 | ||
152 | *v &= ~mstandby_mask; | |
153 | *v |= __ffs(standbymode) << mstandby_shift; | |
63c85238 PW |
154 | |
155 | return 0; | |
156 | } | |
157 | ||
158 | /** | |
159 | * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v | |
160 | * @oh: struct omap_hwmod * | |
161 | * @idlemode: SIDLEMODE field bits | |
162 | * @v: pointer to register contents to modify | |
163 | * | |
164 | * Update the slave idle mode bits in @v to be @idlemode for the @oh | |
165 | * hwmod. Does not write to the hardware. Returns -EINVAL upon error | |
166 | * or 0 upon success. | |
167 | */ | |
168 | static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) | |
169 | { | |
358f0e63 TG |
170 | u32 sidle_mask; |
171 | u8 sidle_shift; | |
172 | ||
43b40992 PW |
173 | if (!oh->class->sysc || |
174 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE)) | |
63c85238 PW |
175 | return -EINVAL; |
176 | ||
43b40992 PW |
177 | if (!oh->class->sysc->sysc_fields) { |
178 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
179 | return -EINVAL; |
180 | } | |
181 | ||
43b40992 | 182 | sidle_shift = oh->class->sysc->sysc_fields->sidle_shift; |
358f0e63 TG |
183 | sidle_mask = (0x3 << sidle_shift); |
184 | ||
185 | *v &= ~sidle_mask; | |
186 | *v |= __ffs(idlemode) << sidle_shift; | |
63c85238 PW |
187 | |
188 | return 0; | |
189 | } | |
190 | ||
191 | /** | |
192 | * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v | |
193 | * @oh: struct omap_hwmod * | |
194 | * @clockact: CLOCKACTIVITY field bits | |
195 | * @v: pointer to register contents to modify | |
196 | * | |
197 | * Update the clockactivity mode bits in @v to be @clockact for the | |
198 | * @oh hwmod. Used for additional powersaving on some modules. Does | |
199 | * not write to the hardware. Returns -EINVAL upon error or 0 upon | |
200 | * success. | |
201 | */ | |
202 | static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) | |
203 | { | |
358f0e63 TG |
204 | u32 clkact_mask; |
205 | u8 clkact_shift; | |
206 | ||
43b40992 PW |
207 | if (!oh->class->sysc || |
208 | !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) | |
63c85238 PW |
209 | return -EINVAL; |
210 | ||
43b40992 PW |
211 | if (!oh->class->sysc->sysc_fields) { |
212 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
213 | return -EINVAL; |
214 | } | |
215 | ||
43b40992 | 216 | clkact_shift = oh->class->sysc->sysc_fields->clkact_shift; |
358f0e63 TG |
217 | clkact_mask = (0x3 << clkact_shift); |
218 | ||
219 | *v &= ~clkact_mask; | |
220 | *v |= clockact << clkact_shift; | |
63c85238 PW |
221 | |
222 | return 0; | |
223 | } | |
224 | ||
225 | /** | |
226 | * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v | |
227 | * @oh: struct omap_hwmod * | |
228 | * @v: pointer to register contents to modify | |
229 | * | |
230 | * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon | |
231 | * error or 0 upon success. | |
232 | */ | |
233 | static int _set_softreset(struct omap_hwmod *oh, u32 *v) | |
234 | { | |
358f0e63 TG |
235 | u32 softrst_mask; |
236 | ||
43b40992 PW |
237 | if (!oh->class->sysc || |
238 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) | |
63c85238 PW |
239 | return -EINVAL; |
240 | ||
43b40992 PW |
241 | if (!oh->class->sysc->sysc_fields) { |
242 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
243 | return -EINVAL; |
244 | } | |
245 | ||
43b40992 | 246 | softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); |
358f0e63 TG |
247 | |
248 | *v |= softrst_mask; | |
63c85238 PW |
249 | |
250 | return 0; | |
251 | } | |
252 | ||
726072e5 PW |
253 | /** |
254 | * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v | |
255 | * @oh: struct omap_hwmod * | |
256 | * @autoidle: desired AUTOIDLE bitfield value (0 or 1) | |
257 | * @v: pointer to register contents to modify | |
258 | * | |
259 | * Update the module autoidle bit in @v to be @autoidle for the @oh | |
260 | * hwmod. The autoidle bit controls whether the module can gate | |
261 | * internal clocks automatically when it isn't doing anything; the | |
262 | * exact function of this bit varies on a per-module basis. This | |
263 | * function does not write to the hardware. Returns -EINVAL upon | |
264 | * error or 0 upon success. | |
265 | */ | |
266 | static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, | |
267 | u32 *v) | |
268 | { | |
358f0e63 TG |
269 | u32 autoidle_mask; |
270 | u8 autoidle_shift; | |
271 | ||
43b40992 PW |
272 | if (!oh->class->sysc || |
273 | !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE)) | |
726072e5 PW |
274 | return -EINVAL; |
275 | ||
43b40992 PW |
276 | if (!oh->class->sysc->sysc_fields) { |
277 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
278 | return -EINVAL; |
279 | } | |
280 | ||
43b40992 | 281 | autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; |
358f0e63 TG |
282 | autoidle_mask = (0x3 << autoidle_shift); |
283 | ||
284 | *v &= ~autoidle_mask; | |
285 | *v |= autoidle << autoidle_shift; | |
726072e5 PW |
286 | |
287 | return 0; | |
288 | } | |
289 | ||
63c85238 PW |
290 | /** |
291 | * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware | |
292 | * @oh: struct omap_hwmod * | |
293 | * | |
294 | * Allow the hardware module @oh to send wakeups. Returns -EINVAL | |
295 | * upon error or 0 upon success. | |
296 | */ | |
297 | static int _enable_wakeup(struct omap_hwmod *oh) | |
298 | { | |
358f0e63 | 299 | u32 v, wakeup_mask; |
63c85238 | 300 | |
43b40992 PW |
301 | if (!oh->class->sysc || |
302 | !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) | |
63c85238 PW |
303 | return -EINVAL; |
304 | ||
43b40992 PW |
305 | if (!oh->class->sysc->sysc_fields) { |
306 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
307 | return -EINVAL; |
308 | } | |
309 | ||
43b40992 | 310 | wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); |
358f0e63 | 311 | |
63c85238 | 312 | v = oh->_sysc_cache; |
358f0e63 | 313 | v |= wakeup_mask; |
63c85238 PW |
314 | _write_sysconfig(v, oh); |
315 | ||
316 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ | |
317 | ||
318 | oh->_int_flags |= _HWMOD_WAKEUP_ENABLED; | |
319 | ||
320 | return 0; | |
321 | } | |
322 | ||
323 | /** | |
324 | * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware | |
325 | * @oh: struct omap_hwmod * | |
326 | * | |
327 | * Prevent the hardware module @oh to send wakeups. Returns -EINVAL | |
328 | * upon error or 0 upon success. | |
329 | */ | |
330 | static int _disable_wakeup(struct omap_hwmod *oh) | |
331 | { | |
358f0e63 | 332 | u32 v, wakeup_mask; |
63c85238 | 333 | |
43b40992 PW |
334 | if (!oh->class->sysc || |
335 | !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) | |
63c85238 PW |
336 | return -EINVAL; |
337 | ||
43b40992 PW |
338 | if (!oh->class->sysc->sysc_fields) { |
339 | WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); | |
358f0e63 TG |
340 | return -EINVAL; |
341 | } | |
342 | ||
43b40992 | 343 | wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); |
358f0e63 | 344 | |
63c85238 | 345 | v = oh->_sysc_cache; |
358f0e63 | 346 | v &= ~wakeup_mask; |
63c85238 PW |
347 | _write_sysconfig(v, oh); |
348 | ||
349 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ | |
350 | ||
351 | oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED; | |
352 | ||
353 | return 0; | |
354 | } | |
355 | ||
356 | /** | |
357 | * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active | |
358 | * @oh: struct omap_hwmod * | |
359 | * | |
360 | * Prevent the hardware module @oh from entering idle while the | |
361 | * hardare module initiator @init_oh is active. Useful when a module | |
362 | * will be accessed by a particular initiator (e.g., if a module will | |
363 | * be accessed by the IVA, there should be a sleepdep between the IVA | |
364 | * initiator and the module). Only applies to modules in smart-idle | |
365 | * mode. Returns -EINVAL upon error or passes along | |
55ed9694 | 366 | * clkdm_add_sleepdep() value upon success. |
63c85238 PW |
367 | */ |
368 | static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) | |
369 | { | |
370 | if (!oh->_clk) | |
371 | return -EINVAL; | |
372 | ||
55ed9694 | 373 | return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm); |
63c85238 PW |
374 | } |
375 | ||
376 | /** | |
377 | * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active | |
378 | * @oh: struct omap_hwmod * | |
379 | * | |
380 | * Allow the hardware module @oh to enter idle while the hardare | |
381 | * module initiator @init_oh is active. Useful when a module will not | |
382 | * be accessed by a particular initiator (e.g., if a module will not | |
383 | * be accessed by the IVA, there should be no sleepdep between the IVA | |
384 | * initiator and the module). Only applies to modules in smart-idle | |
385 | * mode. Returns -EINVAL upon error or passes along | |
55ed9694 | 386 | * clkdm_del_sleepdep() value upon success. |
63c85238 PW |
387 | */ |
388 | static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) | |
389 | { | |
390 | if (!oh->_clk) | |
391 | return -EINVAL; | |
392 | ||
55ed9694 | 393 | return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm); |
63c85238 PW |
394 | } |
395 | ||
396 | /** | |
397 | * _init_main_clk - get a struct clk * for the the hwmod's main functional clk | |
398 | * @oh: struct omap_hwmod * | |
399 | * | |
400 | * Called from _init_clocks(). Populates the @oh _clk (main | |
401 | * functional clock pointer) if a main_clk is present. Returns 0 on | |
402 | * success or -EINVAL on error. | |
403 | */ | |
404 | static int _init_main_clk(struct omap_hwmod *oh) | |
405 | { | |
63c85238 PW |
406 | int ret = 0; |
407 | ||
50ebdac2 | 408 | if (!oh->main_clk) |
63c85238 PW |
409 | return 0; |
410 | ||
63403384 | 411 | oh->_clk = omap_clk_get_by_name(oh->main_clk); |
dc75925d | 412 | if (!oh->_clk) { |
20383d82 BC |
413 | pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n", |
414 | oh->name, oh->main_clk); | |
63403384 | 415 | return -EINVAL; |
dc75925d | 416 | } |
63c85238 | 417 | |
63403384 BC |
418 | if (!oh->_clk->clkdm) |
419 | pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n", | |
420 | oh->main_clk, oh->_clk->name); | |
81d7c6ff | 421 | |
63c85238 PW |
422 | return ret; |
423 | } | |
424 | ||
425 | /** | |
426 | * _init_interface_clk - get a struct clk * for the the hwmod's interface clks | |
427 | * @oh: struct omap_hwmod * | |
428 | * | |
429 | * Called from _init_clocks(). Populates the @oh OCP slave interface | |
430 | * clock pointers. Returns 0 on success or -EINVAL on error. | |
431 | */ | |
432 | static int _init_interface_clks(struct omap_hwmod *oh) | |
433 | { | |
63c85238 PW |
434 | struct clk *c; |
435 | int i; | |
436 | int ret = 0; | |
437 | ||
438 | if (oh->slaves_cnt == 0) | |
439 | return 0; | |
440 | ||
682fdc96 BC |
441 | for (i = 0; i < oh->slaves_cnt; i++) { |
442 | struct omap_hwmod_ocp_if *os = oh->slaves[i]; | |
443 | ||
50ebdac2 | 444 | if (!os->clk) |
63c85238 PW |
445 | continue; |
446 | ||
50ebdac2 | 447 | c = omap_clk_get_by_name(os->clk); |
dc75925d | 448 | if (!c) { |
20383d82 BC |
449 | pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n", |
450 | oh->name, os->clk); | |
63c85238 | 451 | ret = -EINVAL; |
dc75925d | 452 | } |
63c85238 PW |
453 | os->_clk = c; |
454 | } | |
455 | ||
456 | return ret; | |
457 | } | |
458 | ||
459 | /** | |
460 | * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks | |
461 | * @oh: struct omap_hwmod * | |
462 | * | |
463 | * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk | |
464 | * clock pointers. Returns 0 on success or -EINVAL on error. | |
465 | */ | |
466 | static int _init_opt_clks(struct omap_hwmod *oh) | |
467 | { | |
468 | struct omap_hwmod_opt_clk *oc; | |
469 | struct clk *c; | |
470 | int i; | |
471 | int ret = 0; | |
472 | ||
473 | for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { | |
50ebdac2 | 474 | c = omap_clk_get_by_name(oc->clk); |
dc75925d | 475 | if (!c) { |
20383d82 BC |
476 | pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n", |
477 | oh->name, oc->clk); | |
63c85238 | 478 | ret = -EINVAL; |
dc75925d | 479 | } |
63c85238 PW |
480 | oc->_clk = c; |
481 | } | |
482 | ||
483 | return ret; | |
484 | } | |
485 | ||
486 | /** | |
487 | * _enable_clocks - enable hwmod main clock and interface clocks | |
488 | * @oh: struct omap_hwmod * | |
489 | * | |
490 | * Enables all clocks necessary for register reads and writes to succeed | |
491 | * on the hwmod @oh. Returns 0. | |
492 | */ | |
493 | static int _enable_clocks(struct omap_hwmod *oh) | |
494 | { | |
63c85238 PW |
495 | int i; |
496 | ||
497 | pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); | |
498 | ||
4d3ae5a9 | 499 | if (oh->_clk) |
63c85238 PW |
500 | clk_enable(oh->_clk); |
501 | ||
502 | if (oh->slaves_cnt > 0) { | |
682fdc96 BC |
503 | for (i = 0; i < oh->slaves_cnt; i++) { |
504 | struct omap_hwmod_ocp_if *os = oh->slaves[i]; | |
63c85238 PW |
505 | struct clk *c = os->_clk; |
506 | ||
4d3ae5a9 | 507 | if (c && (os->flags & OCPIF_SWSUP_IDLE)) |
63c85238 PW |
508 | clk_enable(c); |
509 | } | |
510 | } | |
511 | ||
512 | /* The opt clocks are controlled by the device driver. */ | |
513 | ||
514 | return 0; | |
515 | } | |
516 | ||
517 | /** | |
518 | * _disable_clocks - disable hwmod main clock and interface clocks | |
519 | * @oh: struct omap_hwmod * | |
520 | * | |
521 | * Disables the hwmod @oh main functional and interface clocks. Returns 0. | |
522 | */ | |
523 | static int _disable_clocks(struct omap_hwmod *oh) | |
524 | { | |
63c85238 PW |
525 | int i; |
526 | ||
527 | pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); | |
528 | ||
4d3ae5a9 | 529 | if (oh->_clk) |
63c85238 PW |
530 | clk_disable(oh->_clk); |
531 | ||
532 | if (oh->slaves_cnt > 0) { | |
682fdc96 BC |
533 | for (i = 0; i < oh->slaves_cnt; i++) { |
534 | struct omap_hwmod_ocp_if *os = oh->slaves[i]; | |
63c85238 PW |
535 | struct clk *c = os->_clk; |
536 | ||
4d3ae5a9 | 537 | if (c && (os->flags & OCPIF_SWSUP_IDLE)) |
63c85238 PW |
538 | clk_disable(c); |
539 | } | |
540 | } | |
541 | ||
542 | /* The opt clocks are controlled by the device driver. */ | |
543 | ||
544 | return 0; | |
545 | } | |
546 | ||
547 | /** | |
548 | * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use | |
549 | * @oh: struct omap_hwmod * | |
550 | * | |
551 | * Returns the array index of the OCP slave port that the MPU | |
552 | * addresses the device on, or -EINVAL upon error or not found. | |
553 | */ | |
554 | static int _find_mpu_port_index(struct omap_hwmod *oh) | |
555 | { | |
63c85238 PW |
556 | int i; |
557 | int found = 0; | |
558 | ||
559 | if (!oh || oh->slaves_cnt == 0) | |
560 | return -EINVAL; | |
561 | ||
682fdc96 BC |
562 | for (i = 0; i < oh->slaves_cnt; i++) { |
563 | struct omap_hwmod_ocp_if *os = oh->slaves[i]; | |
564 | ||
63c85238 PW |
565 | if (os->user & OCP_USER_MPU) { |
566 | found = 1; | |
567 | break; | |
568 | } | |
569 | } | |
570 | ||
571 | if (found) | |
572 | pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n", | |
573 | oh->name, i); | |
574 | else | |
575 | pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n", | |
576 | oh->name); | |
577 | ||
578 | return (found) ? i : -EINVAL; | |
579 | } | |
580 | ||
581 | /** | |
582 | * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU | |
583 | * @oh: struct omap_hwmod * | |
584 | * | |
585 | * Return the virtual address of the base of the register target of | |
586 | * device @oh, or NULL on error. | |
587 | */ | |
588 | static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index) | |
589 | { | |
590 | struct omap_hwmod_ocp_if *os; | |
591 | struct omap_hwmod_addr_space *mem; | |
592 | int i; | |
593 | int found = 0; | |
986a13f5 | 594 | void __iomem *va_start; |
63c85238 PW |
595 | |
596 | if (!oh || oh->slaves_cnt == 0) | |
597 | return NULL; | |
598 | ||
682fdc96 | 599 | os = oh->slaves[index]; |
63c85238 PW |
600 | |
601 | for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) { | |
602 | if (mem->flags & ADDR_TYPE_RT) { | |
603 | found = 1; | |
604 | break; | |
605 | } | |
606 | } | |
607 | ||
986a13f5 TL |
608 | if (found) { |
609 | va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); | |
610 | if (!va_start) { | |
611 | pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name); | |
612 | return NULL; | |
613 | } | |
63c85238 | 614 | pr_debug("omap_hwmod: %s: MPU register target at va %p\n", |
986a13f5 TL |
615 | oh->name, va_start); |
616 | } else { | |
63c85238 PW |
617 | pr_debug("omap_hwmod: %s: no MPU register target found\n", |
618 | oh->name); | |
986a13f5 | 619 | } |
63c85238 | 620 | |
986a13f5 | 621 | return (found) ? va_start : NULL; |
63c85238 PW |
622 | } |
623 | ||
624 | /** | |
625 | * _sysc_enable - try to bring a module out of idle via OCP_SYSCONFIG | |
626 | * @oh: struct omap_hwmod * | |
627 | * | |
628 | * If module is marked as SWSUP_SIDLE, force the module out of slave | |
629 | * idle; otherwise, configure it for smart-idle. If module is marked | |
630 | * as SWSUP_MSUSPEND, force the module out of master standby; | |
631 | * otherwise, configure it for smart-standby. No return value. | |
632 | */ | |
633 | static void _sysc_enable(struct omap_hwmod *oh) | |
634 | { | |
43b40992 | 635 | u8 idlemode, sf; |
63c85238 PW |
636 | u32 v; |
637 | ||
43b40992 | 638 | if (!oh->class->sysc) |
63c85238 PW |
639 | return; |
640 | ||
641 | v = oh->_sysc_cache; | |
43b40992 | 642 | sf = oh->class->sysc->sysc_flags; |
63c85238 | 643 | |
43b40992 | 644 | if (sf & SYSC_HAS_SIDLEMODE) { |
63c85238 PW |
645 | idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? |
646 | HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; | |
647 | _set_slave_idlemode(oh, idlemode, &v); | |
648 | } | |
649 | ||
43b40992 | 650 | if (sf & SYSC_HAS_MIDLEMODE) { |
63c85238 PW |
651 | idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? |
652 | HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; | |
653 | _set_master_standbymode(oh, idlemode, &v); | |
654 | } | |
655 | ||
43b40992 | 656 | if (sf & SYSC_HAS_AUTOIDLE) { |
726072e5 PW |
657 | idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ? |
658 | 0 : 1; | |
659 | _set_module_autoidle(oh, idlemode, &v); | |
660 | } | |
661 | ||
662 | /* XXX OCP ENAWAKEUP bit? */ | |
63c85238 | 663 | |
a16b1f7f PW |
664 | /* |
665 | * XXX The clock framework should handle this, by | |
666 | * calling into this code. But this must wait until the | |
667 | * clock structures are tagged with omap_hwmod entries | |
668 | */ | |
43b40992 PW |
669 | if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) && |
670 | (sf & SYSC_HAS_CLOCKACTIVITY)) | |
671 | _set_clockactivity(oh, oh->class->sysc->clockact, &v); | |
63c85238 PW |
672 | |
673 | _write_sysconfig(v, oh); | |
674 | } | |
675 | ||
676 | /** | |
677 | * _sysc_idle - try to put a module into idle via OCP_SYSCONFIG | |
678 | * @oh: struct omap_hwmod * | |
679 | * | |
680 | * If module is marked as SWSUP_SIDLE, force the module into slave | |
681 | * idle; otherwise, configure it for smart-idle. If module is marked | |
682 | * as SWSUP_MSUSPEND, force the module into master standby; otherwise, | |
683 | * configure it for smart-standby. No return value. | |
684 | */ | |
685 | static void _sysc_idle(struct omap_hwmod *oh) | |
686 | { | |
43b40992 | 687 | u8 idlemode, sf; |
63c85238 PW |
688 | u32 v; |
689 | ||
43b40992 | 690 | if (!oh->class->sysc) |
63c85238 PW |
691 | return; |
692 | ||
693 | v = oh->_sysc_cache; | |
43b40992 | 694 | sf = oh->class->sysc->sysc_flags; |
63c85238 | 695 | |
43b40992 | 696 | if (sf & SYSC_HAS_SIDLEMODE) { |
63c85238 PW |
697 | idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? |
698 | HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; | |
699 | _set_slave_idlemode(oh, idlemode, &v); | |
700 | } | |
701 | ||
43b40992 | 702 | if (sf & SYSC_HAS_MIDLEMODE) { |
63c85238 PW |
703 | idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? |
704 | HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; | |
705 | _set_master_standbymode(oh, idlemode, &v); | |
706 | } | |
707 | ||
708 | _write_sysconfig(v, oh); | |
709 | } | |
710 | ||
711 | /** | |
712 | * _sysc_shutdown - force a module into idle via OCP_SYSCONFIG | |
713 | * @oh: struct omap_hwmod * | |
714 | * | |
715 | * Force the module into slave idle and master suspend. No return | |
716 | * value. | |
717 | */ | |
718 | static void _sysc_shutdown(struct omap_hwmod *oh) | |
719 | { | |
720 | u32 v; | |
43b40992 | 721 | u8 sf; |
63c85238 | 722 | |
43b40992 | 723 | if (!oh->class->sysc) |
63c85238 PW |
724 | return; |
725 | ||
726 | v = oh->_sysc_cache; | |
43b40992 | 727 | sf = oh->class->sysc->sysc_flags; |
63c85238 | 728 | |
43b40992 | 729 | if (sf & SYSC_HAS_SIDLEMODE) |
63c85238 PW |
730 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); |
731 | ||
43b40992 | 732 | if (sf & SYSC_HAS_MIDLEMODE) |
63c85238 PW |
733 | _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); |
734 | ||
43b40992 | 735 | if (sf & SYSC_HAS_AUTOIDLE) |
726072e5 | 736 | _set_module_autoidle(oh, 1, &v); |
63c85238 PW |
737 | |
738 | _write_sysconfig(v, oh); | |
739 | } | |
740 | ||
741 | /** | |
742 | * _lookup - find an omap_hwmod by name | |
743 | * @name: find an omap_hwmod by name | |
744 | * | |
745 | * Return a pointer to an omap_hwmod by name, or NULL if not found. | |
746 | * Caller must hold omap_hwmod_mutex. | |
747 | */ | |
748 | static struct omap_hwmod *_lookup(const char *name) | |
749 | { | |
750 | struct omap_hwmod *oh, *temp_oh; | |
751 | ||
752 | oh = NULL; | |
753 | ||
754 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { | |
755 | if (!strcmp(name, temp_oh->name)) { | |
756 | oh = temp_oh; | |
757 | break; | |
758 | } | |
759 | } | |
760 | ||
761 | return oh; | |
762 | } | |
763 | ||
764 | /** | |
765 | * _init_clocks - clk_get() all clocks associated with this hwmod | |
766 | * @oh: struct omap_hwmod * | |
767 | * | |
768 | * Called by omap_hwmod_late_init() (after omap2_clk_init()). | |
769 | * Resolves all clock names embedded in the hwmod. Must be called | |
770 | * with omap_hwmod_mutex held. Returns -EINVAL if the omap_hwmod | |
771 | * has not yet been registered or if the clocks have already been | |
772 | * initialized, 0 on success, or a non-zero error on failure. | |
773 | */ | |
774 | static int _init_clocks(struct omap_hwmod *oh) | |
775 | { | |
776 | int ret = 0; | |
777 | ||
778 | if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED)) | |
779 | return -EINVAL; | |
780 | ||
781 | pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name); | |
782 | ||
783 | ret |= _init_main_clk(oh); | |
784 | ret |= _init_interface_clks(oh); | |
785 | ret |= _init_opt_clks(oh); | |
786 | ||
f5c1f84b BC |
787 | if (!ret) |
788 | oh->_state = _HWMOD_STATE_CLKS_INITED; | |
63c85238 | 789 | |
f5c1f84b | 790 | return 0; |
63c85238 PW |
791 | } |
792 | ||
793 | /** | |
794 | * _wait_target_ready - wait for a module to leave slave idle | |
795 | * @oh: struct omap_hwmod * | |
796 | * | |
797 | * Wait for a module @oh to leave slave idle. Returns 0 if the module | |
798 | * does not have an IDLEST bit or if the module successfully leaves | |
799 | * slave idle; otherwise, pass along the return value of the | |
800 | * appropriate *_cm_wait_module_ready() function. | |
801 | */ | |
802 | static int _wait_target_ready(struct omap_hwmod *oh) | |
803 | { | |
804 | struct omap_hwmod_ocp_if *os; | |
805 | int ret; | |
806 | ||
807 | if (!oh) | |
808 | return -EINVAL; | |
809 | ||
810 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) | |
811 | return 0; | |
812 | ||
682fdc96 | 813 | os = oh->slaves[oh->_mpu_port_index]; |
63c85238 | 814 | |
33f7ec81 | 815 | if (oh->flags & HWMOD_NO_IDLEST) |
63c85238 PW |
816 | return 0; |
817 | ||
818 | /* XXX check module SIDLEMODE */ | |
819 | ||
820 | /* XXX check clock enable states */ | |
821 | ||
822 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { | |
823 | ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, | |
824 | oh->prcm.omap2.idlest_reg_id, | |
825 | oh->prcm.omap2.idlest_idle_bit); | |
63c85238 | 826 | } else if (cpu_is_omap44xx()) { |
9a23dfe1 | 827 | ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg); |
63c85238 PW |
828 | } else { |
829 | BUG(); | |
830 | }; | |
831 | ||
832 | return ret; | |
833 | } | |
834 | ||
835 | /** | |
836 | * _reset - reset an omap_hwmod | |
837 | * @oh: struct omap_hwmod * | |
838 | * | |
839 | * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be | |
840 | * enabled for this to work. Must be called with omap_hwmod_mutex | |
841 | * held. Returns -EINVAL if the hwmod cannot be reset this way or if | |
842 | * the hwmod is in the wrong state, -ETIMEDOUT if the module did not | |
843 | * reset in time, or 0 upon success. | |
844 | */ | |
845 | static int _reset(struct omap_hwmod *oh) | |
846 | { | |
847 | u32 r, v; | |
6f8b7ff5 | 848 | int c = 0; |
63c85238 | 849 | |
43b40992 PW |
850 | if (!oh->class->sysc || |
851 | !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET) || | |
852 | (oh->class->sysc->sysc_flags & SYSS_MISSING)) | |
63c85238 PW |
853 | return -EINVAL; |
854 | ||
855 | /* clocks must be on for this operation */ | |
856 | if (oh->_state != _HWMOD_STATE_ENABLED) { | |
857 | WARN(1, "omap_hwmod: %s: reset can only be entered from " | |
858 | "enabled state\n", oh->name); | |
859 | return -EINVAL; | |
860 | } | |
861 | ||
862 | pr_debug("omap_hwmod: %s: resetting\n", oh->name); | |
863 | ||
864 | v = oh->_sysc_cache; | |
865 | r = _set_softreset(oh, &v); | |
866 | if (r) | |
867 | return r; | |
868 | _write_sysconfig(v, oh); | |
869 | ||
43b40992 | 870 | omap_test_timeout((omap_hwmod_readl(oh, oh->class->sysc->syss_offs) & |
6f8b7ff5 PW |
871 | SYSS_RESETDONE_MASK), |
872 | MAX_MODULE_RESET_WAIT, c); | |
63c85238 PW |
873 | |
874 | if (c == MAX_MODULE_RESET_WAIT) | |
875 | WARN(1, "omap_hwmod: %s: failed to reset in %d usec\n", | |
876 | oh->name, MAX_MODULE_RESET_WAIT); | |
877 | else | |
02bfc030 | 878 | pr_debug("omap_hwmod: %s: reset in %d usec\n", oh->name, c); |
63c85238 PW |
879 | |
880 | /* | |
881 | * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from | |
882 | * _wait_target_ready() or _reset() | |
883 | */ | |
884 | ||
885 | return (c == MAX_MODULE_RESET_WAIT) ? -ETIMEDOUT : 0; | |
886 | } | |
887 | ||
888 | /** | |
84824022 | 889 | * _omap_hwmod_enable - enable an omap_hwmod |
63c85238 PW |
890 | * @oh: struct omap_hwmod * |
891 | * | |
892 | * Enables an omap_hwmod @oh such that the MPU can access the hwmod's | |
893 | * register target. Must be called with omap_hwmod_mutex held. | |
894 | * Returns -EINVAL if the hwmod is in the wrong state or passes along | |
895 | * the return value of _wait_target_ready(). | |
896 | */ | |
84824022 | 897 | int _omap_hwmod_enable(struct omap_hwmod *oh) |
63c85238 PW |
898 | { |
899 | int r; | |
900 | ||
901 | if (oh->_state != _HWMOD_STATE_INITIALIZED && | |
902 | oh->_state != _HWMOD_STATE_IDLE && | |
903 | oh->_state != _HWMOD_STATE_DISABLED) { | |
904 | WARN(1, "omap_hwmod: %s: enabled state can only be entered " | |
905 | "from initialized, idle, or disabled state\n", oh->name); | |
906 | return -EINVAL; | |
907 | } | |
908 | ||
909 | pr_debug("omap_hwmod: %s: enabling\n", oh->name); | |
910 | ||
911 | /* XXX mux balls */ | |
912 | ||
913 | _add_initiator_dep(oh, mpu_oh); | |
914 | _enable_clocks(oh); | |
915 | ||
63c85238 | 916 | r = _wait_target_ready(oh); |
9a23dfe1 | 917 | if (!r) { |
63c85238 PW |
918 | oh->_state = _HWMOD_STATE_ENABLED; |
919 | ||
9a23dfe1 BC |
920 | /* Access the sysconfig only if the target is ready */ |
921 | if (oh->class->sysc) { | |
922 | if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) | |
923 | _update_sysc_cache(oh); | |
924 | _sysc_enable(oh); | |
925 | } | |
926 | } else { | |
927 | pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", | |
928 | oh->name, r); | |
929 | } | |
930 | ||
63c85238 PW |
931 | return r; |
932 | } | |
933 | ||
934 | /** | |
935 | * _idle - idle an omap_hwmod | |
936 | * @oh: struct omap_hwmod * | |
937 | * | |
938 | * Idles an omap_hwmod @oh. This should be called once the hwmod has | |
939 | * no further work. Returns -EINVAL if the hwmod is in the wrong | |
940 | * state or returns 0. | |
941 | */ | |
84824022 | 942 | int _omap_hwmod_idle(struct omap_hwmod *oh) |
63c85238 PW |
943 | { |
944 | if (oh->_state != _HWMOD_STATE_ENABLED) { | |
945 | WARN(1, "omap_hwmod: %s: idle state can only be entered from " | |
946 | "enabled state\n", oh->name); | |
947 | return -EINVAL; | |
948 | } | |
949 | ||
950 | pr_debug("omap_hwmod: %s: idling\n", oh->name); | |
951 | ||
43b40992 | 952 | if (oh->class->sysc) |
63c85238 PW |
953 | _sysc_idle(oh); |
954 | _del_initiator_dep(oh, mpu_oh); | |
955 | _disable_clocks(oh); | |
956 | ||
957 | oh->_state = _HWMOD_STATE_IDLE; | |
958 | ||
959 | return 0; | |
960 | } | |
961 | ||
962 | /** | |
963 | * _shutdown - shutdown an omap_hwmod | |
964 | * @oh: struct omap_hwmod * | |
965 | * | |
966 | * Shut down an omap_hwmod @oh. This should be called when the driver | |
967 | * used for the hwmod is removed or unloaded or if the driver is not | |
968 | * used by the system. Returns -EINVAL if the hwmod is in the wrong | |
969 | * state or returns 0. | |
970 | */ | |
971 | static int _shutdown(struct omap_hwmod *oh) | |
972 | { | |
973 | if (oh->_state != _HWMOD_STATE_IDLE && | |
974 | oh->_state != _HWMOD_STATE_ENABLED) { | |
975 | WARN(1, "omap_hwmod: %s: disabled state can only be entered " | |
976 | "from idle, or enabled state\n", oh->name); | |
977 | return -EINVAL; | |
978 | } | |
979 | ||
980 | pr_debug("omap_hwmod: %s: disabling\n", oh->name); | |
981 | ||
43b40992 | 982 | if (oh->class->sysc) |
63c85238 PW |
983 | _sysc_shutdown(oh); |
984 | _del_initiator_dep(oh, mpu_oh); | |
985 | /* XXX what about the other system initiators here? DMA, tesla, d2d */ | |
986 | _disable_clocks(oh); | |
987 | /* XXX Should this code also force-disable the optional clocks? */ | |
988 | ||
989 | /* XXX mux any associated balls to safe mode */ | |
990 | ||
991 | oh->_state = _HWMOD_STATE_DISABLED; | |
992 | ||
993 | return 0; | |
994 | } | |
995 | ||
63c85238 PW |
996 | /** |
997 | * _setup - do initial configuration of omap_hwmod | |
998 | * @oh: struct omap_hwmod * | |
999 | * | |
1000 | * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh | |
1001 | * OCP_SYSCONFIG register. Must be called with omap_hwmod_mutex | |
1002 | * held. Returns -EINVAL if the hwmod is in the wrong state or returns | |
1003 | * 0. | |
1004 | */ | |
1005 | static int _setup(struct omap_hwmod *oh) | |
1006 | { | |
9a23dfe1 | 1007 | int i, r; |
63c85238 PW |
1008 | |
1009 | if (!oh) | |
1010 | return -EINVAL; | |
1011 | ||
1012 | /* Set iclk autoidle mode */ | |
1013 | if (oh->slaves_cnt > 0) { | |
682fdc96 BC |
1014 | for (i = 0; i < oh->slaves_cnt; i++) { |
1015 | struct omap_hwmod_ocp_if *os = oh->slaves[i]; | |
63c85238 PW |
1016 | struct clk *c = os->_clk; |
1017 | ||
4d3ae5a9 | 1018 | if (!c) |
63c85238 PW |
1019 | continue; |
1020 | ||
1021 | if (os->flags & OCPIF_SWSUP_IDLE) { | |
1022 | /* XXX omap_iclk_deny_idle(c); */ | |
1023 | } else { | |
1024 | /* XXX omap_iclk_allow_idle(c); */ | |
1025 | clk_enable(c); | |
1026 | } | |
1027 | } | |
1028 | } | |
1029 | ||
1030 | oh->_state = _HWMOD_STATE_INITIALIZED; | |
1031 | ||
84824022 | 1032 | r = _omap_hwmod_enable(oh); |
9a23dfe1 BC |
1033 | if (r) { |
1034 | pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n", | |
1035 | oh->name, oh->_state); | |
1036 | return 0; | |
1037 | } | |
63c85238 | 1038 | |
b835d014 PW |
1039 | if (!(oh->flags & HWMOD_INIT_NO_RESET)) { |
1040 | /* | |
1041 | * XXX Do the OCP_SYSCONFIG bits need to be | |
1042 | * reprogrammed after a reset? If not, then this can | |
1043 | * be removed. If they do, then probably the | |
84824022 | 1044 | * _omap_hwmod_enable() function should be split to avoid the |
b835d014 PW |
1045 | * rewrite of the OCP_SYSCONFIG register. |
1046 | */ | |
43b40992 | 1047 | if (oh->class->sysc) { |
b835d014 PW |
1048 | _update_sysc_cache(oh); |
1049 | _sysc_enable(oh); | |
1050 | } | |
1051 | } | |
63c85238 PW |
1052 | |
1053 | if (!(oh->flags & HWMOD_INIT_NO_IDLE)) | |
84824022 | 1054 | _omap_hwmod_idle(oh); |
63c85238 PW |
1055 | |
1056 | return 0; | |
1057 | } | |
1058 | ||
1059 | ||
1060 | ||
1061 | /* Public functions */ | |
1062 | ||
1063 | u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs) | |
1064 | { | |
1065 | return __raw_readl(oh->_rt_va + reg_offs); | |
1066 | } | |
1067 | ||
1068 | void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs) | |
1069 | { | |
1070 | __raw_writel(v, oh->_rt_va + reg_offs); | |
1071 | } | |
1072 | ||
46273e6f KH |
1073 | int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode) |
1074 | { | |
1075 | u32 v; | |
1076 | int retval = 0; | |
1077 | ||
1078 | if (!oh) | |
1079 | return -EINVAL; | |
1080 | ||
1081 | v = oh->_sysc_cache; | |
1082 | ||
1083 | retval = _set_slave_idlemode(oh, idlemode, &v); | |
1084 | if (!retval) | |
1085 | _write_sysconfig(v, oh); | |
1086 | ||
1087 | return retval; | |
1088 | } | |
1089 | ||
63c85238 PW |
1090 | /** |
1091 | * omap_hwmod_register - register a struct omap_hwmod | |
1092 | * @oh: struct omap_hwmod * | |
1093 | * | |
43b40992 PW |
1094 | * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod |
1095 | * already has been registered by the same name; -EINVAL if the | |
1096 | * omap_hwmod is in the wrong state, if @oh is NULL, if the | |
1097 | * omap_hwmod's class field is NULL; if the omap_hwmod is missing a | |
1098 | * name, or if the omap_hwmod's class is missing a name; or 0 upon | |
1099 | * success. | |
63c85238 PW |
1100 | * |
1101 | * XXX The data should be copied into bootmem, so the original data | |
1102 | * should be marked __initdata and freed after init. This would allow | |
1103 | * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note | |
1104 | * that the copy process would be relatively complex due to the large number | |
1105 | * of substructures. | |
1106 | */ | |
1107 | int omap_hwmod_register(struct omap_hwmod *oh) | |
1108 | { | |
1109 | int ret, ms_id; | |
1110 | ||
43b40992 PW |
1111 | if (!oh || !oh->name || !oh->class || !oh->class->name || |
1112 | (oh->_state != _HWMOD_STATE_UNKNOWN)) | |
63c85238 PW |
1113 | return -EINVAL; |
1114 | ||
1115 | mutex_lock(&omap_hwmod_mutex); | |
1116 | ||
1117 | pr_debug("omap_hwmod: %s: registering\n", oh->name); | |
1118 | ||
1119 | if (_lookup(oh->name)) { | |
1120 | ret = -EEXIST; | |
1121 | goto ohr_unlock; | |
1122 | } | |
1123 | ||
1124 | ms_id = _find_mpu_port_index(oh); | |
1125 | if (!IS_ERR_VALUE(ms_id)) { | |
1126 | oh->_mpu_port_index = ms_id; | |
1127 | oh->_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); | |
1128 | } else { | |
1129 | oh->_int_flags |= _HWMOD_NO_MPU_PORT; | |
1130 | } | |
1131 | ||
1132 | list_add_tail(&oh->node, &omap_hwmod_list); | |
1133 | ||
1134 | oh->_state = _HWMOD_STATE_REGISTERED; | |
1135 | ||
1136 | ret = 0; | |
1137 | ||
1138 | ohr_unlock: | |
1139 | mutex_unlock(&omap_hwmod_mutex); | |
1140 | return ret; | |
1141 | } | |
1142 | ||
1143 | /** | |
1144 | * omap_hwmod_lookup - look up a registered omap_hwmod by name | |
1145 | * @name: name of the omap_hwmod to look up | |
1146 | * | |
1147 | * Given a @name of an omap_hwmod, return a pointer to the registered | |
1148 | * struct omap_hwmod *, or NULL upon error. | |
1149 | */ | |
1150 | struct omap_hwmod *omap_hwmod_lookup(const char *name) | |
1151 | { | |
1152 | struct omap_hwmod *oh; | |
1153 | ||
1154 | if (!name) | |
1155 | return NULL; | |
1156 | ||
1157 | mutex_lock(&omap_hwmod_mutex); | |
1158 | oh = _lookup(name); | |
1159 | mutex_unlock(&omap_hwmod_mutex); | |
1160 | ||
1161 | return oh; | |
1162 | } | |
1163 | ||
1164 | /** | |
1165 | * omap_hwmod_for_each - call function for each registered omap_hwmod | |
1166 | * @fn: pointer to a callback function | |
1167 | * | |
1168 | * Call @fn for each registered omap_hwmod, passing @data to each | |
1169 | * function. @fn must return 0 for success or any other value for | |
1170 | * failure. If @fn returns non-zero, the iteration across omap_hwmods | |
1171 | * will stop and the non-zero return value will be passed to the | |
1172 | * caller of omap_hwmod_for_each(). @fn is called with | |
1173 | * omap_hwmod_for_each() held. | |
1174 | */ | |
1175 | int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh)) | |
1176 | { | |
1177 | struct omap_hwmod *temp_oh; | |
1178 | int ret; | |
1179 | ||
1180 | if (!fn) | |
1181 | return -EINVAL; | |
1182 | ||
1183 | mutex_lock(&omap_hwmod_mutex); | |
1184 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { | |
1185 | ret = (*fn)(temp_oh); | |
1186 | if (ret) | |
1187 | break; | |
1188 | } | |
1189 | mutex_unlock(&omap_hwmod_mutex); | |
1190 | ||
1191 | return ret; | |
1192 | } | |
1193 | ||
1194 | ||
1195 | /** | |
1196 | * omap_hwmod_init - init omap_hwmod code and register hwmods | |
1197 | * @ohs: pointer to an array of omap_hwmods to register | |
1198 | * | |
1199 | * Intended to be called early in boot before the clock framework is | |
1200 | * initialized. If @ohs is not null, will register all omap_hwmods | |
1201 | * listed in @ohs that are valid for this chip. Returns -EINVAL if | |
1202 | * omap_hwmod_init() has already been called or 0 otherwise. | |
1203 | */ | |
1204 | int omap_hwmod_init(struct omap_hwmod **ohs) | |
1205 | { | |
1206 | struct omap_hwmod *oh; | |
1207 | int r; | |
1208 | ||
1209 | if (inited) | |
1210 | return -EINVAL; | |
1211 | ||
1212 | inited = 1; | |
1213 | ||
1214 | if (!ohs) | |
1215 | return 0; | |
1216 | ||
1217 | oh = *ohs; | |
1218 | while (oh) { | |
1219 | if (omap_chip_is(oh->omap_chip)) { | |
1220 | r = omap_hwmod_register(oh); | |
1221 | WARN(r, "omap_hwmod: %s: omap_hwmod_register returned " | |
1222 | "%d\n", oh->name, r); | |
1223 | } | |
1224 | oh = *++ohs; | |
1225 | } | |
1226 | ||
1227 | return 0; | |
1228 | } | |
1229 | ||
1230 | /** | |
1231 | * omap_hwmod_late_init - do some post-clock framework initialization | |
1232 | * | |
1233 | * Must be called after omap2_clk_init(). Resolves the struct clk names | |
1234 | * to struct clk pointers for each registered omap_hwmod. Also calls | |
1235 | * _setup() on each hwmod. Returns 0. | |
1236 | */ | |
1237 | int omap_hwmod_late_init(void) | |
1238 | { | |
1239 | int r; | |
1240 | ||
1241 | /* XXX check return value */ | |
1242 | r = omap_hwmod_for_each(_init_clocks); | |
1243 | WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n"); | |
1244 | ||
1245 | mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME); | |
1246 | WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n", | |
1247 | MPU_INITIATOR_NAME); | |
1248 | ||
1249 | omap_hwmod_for_each(_setup); | |
1250 | ||
1251 | return 0; | |
1252 | } | |
1253 | ||
1254 | /** | |
1255 | * omap_hwmod_unregister - unregister an omap_hwmod | |
1256 | * @oh: struct omap_hwmod * | |
1257 | * | |
1258 | * Unregisters a previously-registered omap_hwmod @oh. There's probably | |
1259 | * no use case for this, so it is likely to be removed in a later version. | |
1260 | * | |
1261 | * XXX Free all of the bootmem-allocated structures here when that is | |
1262 | * implemented. Make it clear that core code is the only code that is | |
1263 | * expected to unregister modules. | |
1264 | */ | |
1265 | int omap_hwmod_unregister(struct omap_hwmod *oh) | |
1266 | { | |
1267 | if (!oh) | |
1268 | return -EINVAL; | |
1269 | ||
1270 | pr_debug("omap_hwmod: %s: unregistering\n", oh->name); | |
1271 | ||
1272 | mutex_lock(&omap_hwmod_mutex); | |
986a13f5 | 1273 | iounmap(oh->_rt_va); |
63c85238 PW |
1274 | list_del(&oh->node); |
1275 | mutex_unlock(&omap_hwmod_mutex); | |
1276 | ||
1277 | return 0; | |
1278 | } | |
1279 | ||
1280 | /** | |
1281 | * omap_hwmod_enable - enable an omap_hwmod | |
1282 | * @oh: struct omap_hwmod * | |
1283 | * | |
1284 | * Enable an omap_hwomd @oh. Intended to be called by omap_device_enable(). | |
1285 | * Returns -EINVAL on error or passes along the return value from _enable(). | |
1286 | */ | |
1287 | int omap_hwmod_enable(struct omap_hwmod *oh) | |
1288 | { | |
1289 | int r; | |
1290 | ||
1291 | if (!oh) | |
1292 | return -EINVAL; | |
1293 | ||
1294 | mutex_lock(&omap_hwmod_mutex); | |
84824022 | 1295 | r = _omap_hwmod_enable(oh); |
63c85238 PW |
1296 | mutex_unlock(&omap_hwmod_mutex); |
1297 | ||
1298 | return r; | |
1299 | } | |
1300 | ||
84824022 | 1301 | |
63c85238 PW |
1302 | /** |
1303 | * omap_hwmod_idle - idle an omap_hwmod | |
1304 | * @oh: struct omap_hwmod * | |
1305 | * | |
1306 | * Idle an omap_hwomd @oh. Intended to be called by omap_device_idle(). | |
1307 | * Returns -EINVAL on error or passes along the return value from _idle(). | |
1308 | */ | |
1309 | int omap_hwmod_idle(struct omap_hwmod *oh) | |
1310 | { | |
1311 | if (!oh) | |
1312 | return -EINVAL; | |
1313 | ||
1314 | mutex_lock(&omap_hwmod_mutex); | |
84824022 | 1315 | _omap_hwmod_idle(oh); |
63c85238 PW |
1316 | mutex_unlock(&omap_hwmod_mutex); |
1317 | ||
1318 | return 0; | |
1319 | } | |
1320 | ||
1321 | /** | |
1322 | * omap_hwmod_shutdown - shutdown an omap_hwmod | |
1323 | * @oh: struct omap_hwmod * | |
1324 | * | |
1325 | * Shutdown an omap_hwomd @oh. Intended to be called by | |
1326 | * omap_device_shutdown(). Returns -EINVAL on error or passes along | |
1327 | * the return value from _shutdown(). | |
1328 | */ | |
1329 | int omap_hwmod_shutdown(struct omap_hwmod *oh) | |
1330 | { | |
1331 | if (!oh) | |
1332 | return -EINVAL; | |
1333 | ||
1334 | mutex_lock(&omap_hwmod_mutex); | |
1335 | _shutdown(oh); | |
1336 | mutex_unlock(&omap_hwmod_mutex); | |
1337 | ||
1338 | return 0; | |
1339 | } | |
1340 | ||
1341 | /** | |
1342 | * omap_hwmod_enable_clocks - enable main_clk, all interface clocks | |
1343 | * @oh: struct omap_hwmod *oh | |
1344 | * | |
1345 | * Intended to be called by the omap_device code. | |
1346 | */ | |
1347 | int omap_hwmod_enable_clocks(struct omap_hwmod *oh) | |
1348 | { | |
1349 | mutex_lock(&omap_hwmod_mutex); | |
1350 | _enable_clocks(oh); | |
1351 | mutex_unlock(&omap_hwmod_mutex); | |
1352 | ||
1353 | return 0; | |
1354 | } | |
1355 | ||
1356 | /** | |
1357 | * omap_hwmod_disable_clocks - disable main_clk, all interface clocks | |
1358 | * @oh: struct omap_hwmod *oh | |
1359 | * | |
1360 | * Intended to be called by the omap_device code. | |
1361 | */ | |
1362 | int omap_hwmod_disable_clocks(struct omap_hwmod *oh) | |
1363 | { | |
1364 | mutex_lock(&omap_hwmod_mutex); | |
1365 | _disable_clocks(oh); | |
1366 | mutex_unlock(&omap_hwmod_mutex); | |
1367 | ||
1368 | return 0; | |
1369 | } | |
1370 | ||
1371 | /** | |
1372 | * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete | |
1373 | * @oh: struct omap_hwmod *oh | |
1374 | * | |
1375 | * Intended to be called by drivers and core code when all posted | |
1376 | * writes to a device must complete before continuing further | |
1377 | * execution (for example, after clearing some device IRQSTATUS | |
1378 | * register bits) | |
1379 | * | |
1380 | * XXX what about targets with multiple OCP threads? | |
1381 | */ | |
1382 | void omap_hwmod_ocp_barrier(struct omap_hwmod *oh) | |
1383 | { | |
1384 | BUG_ON(!oh); | |
1385 | ||
43b40992 | 1386 | if (!oh->class->sysc || !oh->class->sysc->sysc_flags) { |
63c85238 PW |
1387 | WARN(1, "omap_device: %s: OCP barrier impossible due to " |
1388 | "device configuration\n", oh->name); | |
1389 | return; | |
1390 | } | |
1391 | ||
1392 | /* | |
1393 | * Forces posted writes to complete on the OCP thread handling | |
1394 | * register writes | |
1395 | */ | |
43b40992 | 1396 | omap_hwmod_readl(oh, oh->class->sysc->sysc_offs); |
63c85238 PW |
1397 | } |
1398 | ||
1399 | /** | |
1400 | * omap_hwmod_reset - reset the hwmod | |
1401 | * @oh: struct omap_hwmod * | |
1402 | * | |
1403 | * Under some conditions, a driver may wish to reset the entire device. | |
1404 | * Called from omap_device code. Returns -EINVAL on error or passes along | |
1405 | * the return value from _reset()/_enable(). | |
1406 | */ | |
1407 | int omap_hwmod_reset(struct omap_hwmod *oh) | |
1408 | { | |
1409 | int r; | |
1410 | ||
1411 | if (!oh || !(oh->_state & _HWMOD_STATE_ENABLED)) | |
1412 | return -EINVAL; | |
1413 | ||
1414 | mutex_lock(&omap_hwmod_mutex); | |
1415 | r = _reset(oh); | |
1416 | if (!r) | |
84824022 | 1417 | r = _omap_hwmod_enable(oh); |
63c85238 PW |
1418 | mutex_unlock(&omap_hwmod_mutex); |
1419 | ||
1420 | return r; | |
1421 | } | |
1422 | ||
1423 | /** | |
1424 | * omap_hwmod_count_resources - count number of struct resources needed by hwmod | |
1425 | * @oh: struct omap_hwmod * | |
1426 | * @res: pointer to the first element of an array of struct resource to fill | |
1427 | * | |
1428 | * Count the number of struct resource array elements necessary to | |
1429 | * contain omap_hwmod @oh resources. Intended to be called by code | |
1430 | * that registers omap_devices. Intended to be used to determine the | |
1431 | * size of a dynamically-allocated struct resource array, before | |
1432 | * calling omap_hwmod_fill_resources(). Returns the number of struct | |
1433 | * resource array elements needed. | |
1434 | * | |
1435 | * XXX This code is not optimized. It could attempt to merge adjacent | |
1436 | * resource IDs. | |
1437 | * | |
1438 | */ | |
1439 | int omap_hwmod_count_resources(struct omap_hwmod *oh) | |
1440 | { | |
1441 | int ret, i; | |
1442 | ||
1443 | ret = oh->mpu_irqs_cnt + oh->sdma_chs_cnt; | |
1444 | ||
1445 | for (i = 0; i < oh->slaves_cnt; i++) | |
682fdc96 | 1446 | ret += oh->slaves[i]->addr_cnt; |
63c85238 PW |
1447 | |
1448 | return ret; | |
1449 | } | |
1450 | ||
1451 | /** | |
1452 | * omap_hwmod_fill_resources - fill struct resource array with hwmod data | |
1453 | * @oh: struct omap_hwmod * | |
1454 | * @res: pointer to the first element of an array of struct resource to fill | |
1455 | * | |
1456 | * Fill the struct resource array @res with resource data from the | |
1457 | * omap_hwmod @oh. Intended to be called by code that registers | |
1458 | * omap_devices. See also omap_hwmod_count_resources(). Returns the | |
1459 | * number of array elements filled. | |
1460 | */ | |
1461 | int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) | |
1462 | { | |
1463 | int i, j; | |
1464 | int r = 0; | |
1465 | ||
1466 | /* For each IRQ, DMA, memory area, fill in array.*/ | |
1467 | ||
1468 | for (i = 0; i < oh->mpu_irqs_cnt; i++) { | |
718bfd76 PW |
1469 | (res + r)->name = (oh->mpu_irqs + i)->name; |
1470 | (res + r)->start = (oh->mpu_irqs + i)->irq; | |
1471 | (res + r)->end = (oh->mpu_irqs + i)->irq; | |
63c85238 PW |
1472 | (res + r)->flags = IORESOURCE_IRQ; |
1473 | r++; | |
1474 | } | |
1475 | ||
1476 | for (i = 0; i < oh->sdma_chs_cnt; i++) { | |
1477 | (res + r)->name = (oh->sdma_chs + i)->name; | |
1478 | (res + r)->start = (oh->sdma_chs + i)->dma_ch; | |
1479 | (res + r)->end = (oh->sdma_chs + i)->dma_ch; | |
1480 | (res + r)->flags = IORESOURCE_DMA; | |
1481 | r++; | |
1482 | } | |
1483 | ||
1484 | for (i = 0; i < oh->slaves_cnt; i++) { | |
1485 | struct omap_hwmod_ocp_if *os; | |
1486 | ||
682fdc96 | 1487 | os = oh->slaves[i]; |
63c85238 PW |
1488 | |
1489 | for (j = 0; j < os->addr_cnt; j++) { | |
1490 | (res + r)->start = (os->addr + j)->pa_start; | |
1491 | (res + r)->end = (os->addr + j)->pa_end; | |
1492 | (res + r)->flags = IORESOURCE_MEM; | |
1493 | r++; | |
1494 | } | |
1495 | } | |
1496 | ||
1497 | return r; | |
1498 | } | |
1499 | ||
1500 | /** | |
1501 | * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain | |
1502 | * @oh: struct omap_hwmod * | |
1503 | * | |
1504 | * Return the powerdomain pointer associated with the OMAP module | |
1505 | * @oh's main clock. If @oh does not have a main clk, return the | |
1506 | * powerdomain associated with the interface clock associated with the | |
1507 | * module's MPU port. (XXX Perhaps this should use the SDMA port | |
1508 | * instead?) Returns NULL on error, or a struct powerdomain * on | |
1509 | * success. | |
1510 | */ | |
1511 | struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) | |
1512 | { | |
1513 | struct clk *c; | |
1514 | ||
1515 | if (!oh) | |
1516 | return NULL; | |
1517 | ||
1518 | if (oh->_clk) { | |
1519 | c = oh->_clk; | |
1520 | } else { | |
1521 | if (oh->_int_flags & _HWMOD_NO_MPU_PORT) | |
1522 | return NULL; | |
1523 | c = oh->slaves[oh->_mpu_port_index]->_clk; | |
1524 | } | |
1525 | ||
d5647c18 TG |
1526 | if (!c->clkdm) |
1527 | return NULL; | |
1528 | ||
63c85238 PW |
1529 | return c->clkdm->pwrdm.ptr; |
1530 | ||
1531 | } | |
1532 | ||
1533 | /** | |
1534 | * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh | |
1535 | * @oh: struct omap_hwmod * | |
1536 | * @init_oh: struct omap_hwmod * (initiator) | |
1537 | * | |
1538 | * Add a sleep dependency between the initiator @init_oh and @oh. | |
1539 | * Intended to be called by DSP/Bridge code via platform_data for the | |
1540 | * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge | |
1541 | * code needs to add/del initiator dependencies dynamically | |
1542 | * before/after accessing a device. Returns the return value from | |
1543 | * _add_initiator_dep(). | |
1544 | * | |
1545 | * XXX Keep a usecount in the clockdomain code | |
1546 | */ | |
1547 | int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, | |
1548 | struct omap_hwmod *init_oh) | |
1549 | { | |
1550 | return _add_initiator_dep(oh, init_oh); | |
1551 | } | |
1552 | ||
1553 | /* | |
1554 | * XXX what about functions for drivers to save/restore ocp_sysconfig | |
1555 | * for context save/restore operations? | |
1556 | */ | |
1557 | ||
1558 | /** | |
1559 | * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh | |
1560 | * @oh: struct omap_hwmod * | |
1561 | * @init_oh: struct omap_hwmod * (initiator) | |
1562 | * | |
1563 | * Remove a sleep dependency between the initiator @init_oh and @oh. | |
1564 | * Intended to be called by DSP/Bridge code via platform_data for the | |
1565 | * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge | |
1566 | * code needs to add/del initiator dependencies dynamically | |
1567 | * before/after accessing a device. Returns the return value from | |
1568 | * _del_initiator_dep(). | |
1569 | * | |
1570 | * XXX Keep a usecount in the clockdomain code | |
1571 | */ | |
1572 | int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, | |
1573 | struct omap_hwmod *init_oh) | |
1574 | { | |
1575 | return _del_initiator_dep(oh, init_oh); | |
1576 | } | |
1577 | ||
63c85238 PW |
1578 | /** |
1579 | * omap_hwmod_enable_wakeup - allow device to wake up the system | |
1580 | * @oh: struct omap_hwmod * | |
1581 | * | |
1582 | * Sets the module OCP socket ENAWAKEUP bit to allow the module to | |
1583 | * send wakeups to the PRCM. Eventually this should sets PRCM wakeup | |
1584 | * registers to cause the PRCM to receive wakeup events from the | |
1585 | * module. Does not set any wakeup routing registers beyond this | |
1586 | * point - if the module is to wake up any other module or subsystem, | |
1587 | * that must be set separately. Called by omap_device code. Returns | |
1588 | * -EINVAL on error or 0 upon success. | |
1589 | */ | |
1590 | int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) | |
1591 | { | |
43b40992 PW |
1592 | if (!oh->class->sysc || |
1593 | !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) | |
63c85238 PW |
1594 | return -EINVAL; |
1595 | ||
1596 | mutex_lock(&omap_hwmod_mutex); | |
1597 | _enable_wakeup(oh); | |
1598 | mutex_unlock(&omap_hwmod_mutex); | |
1599 | ||
1600 | return 0; | |
1601 | } | |
1602 | ||
1603 | /** | |
1604 | * omap_hwmod_disable_wakeup - prevent device from waking the system | |
1605 | * @oh: struct omap_hwmod * | |
1606 | * | |
1607 | * Clears the module OCP socket ENAWAKEUP bit to prevent the module | |
1608 | * from sending wakeups to the PRCM. Eventually this should clear | |
1609 | * PRCM wakeup registers to cause the PRCM to ignore wakeup events | |
1610 | * from the module. Does not set any wakeup routing registers beyond | |
1611 | * this point - if the module is to wake up any other module or | |
1612 | * subsystem, that must be set separately. Called by omap_device | |
1613 | * code. Returns -EINVAL on error or 0 upon success. | |
1614 | */ | |
1615 | int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) | |
1616 | { | |
43b40992 PW |
1617 | if (!oh->class->sysc || |
1618 | !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) | |
63c85238 PW |
1619 | return -EINVAL; |
1620 | ||
1621 | mutex_lock(&omap_hwmod_mutex); | |
1622 | _disable_wakeup(oh); | |
1623 | mutex_unlock(&omap_hwmod_mutex); | |
1624 | ||
1625 | return 0; | |
1626 | } | |
43b40992 PW |
1627 | |
1628 | /** | |
1629 | * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname | |
1630 | * @classname: struct omap_hwmod_class name to search for | |
1631 | * @fn: callback function pointer to call for each hwmod in class @classname | |
1632 | * @user: arbitrary context data to pass to the callback function | |
1633 | * | |
1634 | * For each omap_hwmod of class @classname, call @fn. Takes | |
1635 | * omap_hwmod_mutex to prevent the hwmod list from changing during the | |
1636 | * iteration. If the callback function returns something other than | |
1637 | * zero, the iterator is terminated, and the callback function's return | |
1638 | * value is passed back to the caller. Returns 0 upon success, -EINVAL | |
1639 | * if @classname or @fn are NULL, or passes back the error code from @fn. | |
1640 | */ | |
1641 | int omap_hwmod_for_each_by_class(const char *classname, | |
1642 | int (*fn)(struct omap_hwmod *oh, | |
1643 | void *user), | |
1644 | void *user) | |
1645 | { | |
1646 | struct omap_hwmod *temp_oh; | |
1647 | int ret = 0; | |
1648 | ||
1649 | if (!classname || !fn) | |
1650 | return -EINVAL; | |
1651 | ||
1652 | pr_debug("omap_hwmod: %s: looking for modules of class %s\n", | |
1653 | __func__, classname); | |
1654 | ||
1655 | mutex_lock(&omap_hwmod_mutex); | |
1656 | ||
1657 | list_for_each_entry(temp_oh, &omap_hwmod_list, node) { | |
1658 | if (!strcmp(temp_oh->class->name, classname)) { | |
1659 | pr_debug("omap_hwmod: %s: %s: calling callback fn\n", | |
1660 | __func__, temp_oh->name); | |
1661 | ret = (*fn)(temp_oh, user); | |
1662 | if (ret) | |
1663 | break; | |
1664 | } | |
1665 | } | |
1666 | ||
1667 | mutex_unlock(&omap_hwmod_mutex); | |
1668 | ||
1669 | if (ret) | |
1670 | pr_debug("omap_hwmod: %s: iterator terminated early: %d\n", | |
1671 | __func__, ret); | |
1672 | ||
1673 | return ret; | |
1674 | } | |
1675 |