[deliverable/linux.git] / arch / arm / mach-omap2 / omap_hwmod_2430_data.c

/*
 * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips
 *
 * Copyright (C) 2009-2010 Nokia Corporation
 * Paul Walmsley
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * XXX handle crossbar/shared link difference for L3?
 * XXX these should be marked initdata for multi-OMAP kernels
 */
#include <plat/omap_hwmod.h>
#include <mach/irqs.h>
#include <plat/cpu.h>
#include <plat/dma.h>

#include "omap_hwmod_common_data.h"

#include "prm-regbits-24xx.h"

/*
 * OMAP2430 hardware module integration data
 *
 * ALl of the data in this section should be autogeneratable from the
 * TI hardware database or other technical documentation.  Data that
 * is driver-specific or driver-kernel integration-specific belongs
 * elsewhere.
 */

static struct omap_hwmod omap2430_mpu_hwmod;
static struct omap_hwmod omap2430_l3_main_hwmod;
static struct omap_hwmod omap2430_l4_core_hwmod;

/* L3 -> L4_CORE interface */
static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
	.master	= &omap2430_l3_main_hwmod,
	.slave	= &omap2430_l4_core_hwmod,
	.user	= OCP_USER_MPU | OCP_USER_SDMA,
};

/* MPU -> L3 interface */
static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = {
	.master = &omap2430_mpu_hwmod,
	.slave	= &omap2430_l3_main_hwmod,
	.user	= OCP_USER_MPU,
};

/* Slave interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = {
	&omap2430_mpu__l3_main,
};

/* Master interfaces on the L3 interconnect */
static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = {
	&omap2430_l3_main__l4_core,
};

/* L3 */
static struct omap_hwmod omap2430_l3_main_hwmod = {
	.name		= "l3_main",
	.class		= &l3_hwmod_class,
	.masters	= omap2430_l3_main_masters,
	.masters_cnt	= ARRAY_SIZE(omap2430_l3_main_masters),
	.slaves		= omap2430_l3_main_slaves,
	.slaves_cnt	= ARRAY_SIZE(omap2430_l3_main_slaves),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
	.flags		= HWMOD_NO_IDLEST,
};

static struct omap_hwmod omap2430_l4_wkup_hwmod;
static struct omap_hwmod omap2430_mmc1_hwmod;
static struct omap_hwmod omap2430_mmc2_hwmod;

/* L4_CORE -> L4_WKUP interface */
static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
	.master	= &omap2430_l4_core_hwmod,
	.slave	= &omap2430_l4_wkup_hwmod,
	.user	= OCP_USER_MPU | OCP_USER_SDMA,
};

/* Slave interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
	&omap2430_l3_main__l4_core,
};

/* Master interfaces on the L4_CORE interconnect */
static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
	&omap2430_l4_core__l4_wkup,
};

/* L4 CORE */
static struct omap_hwmod omap2430_l4_core_hwmod = {
	.name		= "l4_core",
	.class		= &l4_hwmod_class,
	.masters	= omap2430_l4_core_masters,
	.masters_cnt	= ARRAY_SIZE(omap2430_l4_core_masters),
	.slaves		= omap2430_l4_core_slaves,
	.slaves_cnt	= ARRAY_SIZE(omap2430_l4_core_slaves),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
	.flags		= HWMOD_NO_IDLEST,
};

/* Slave interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
	&omap2430_l4_core__l4_wkup,
};

/* Master interfaces on the L4_WKUP interconnect */
static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
};

/* L4 WKUP */
static struct omap_hwmod omap2430_l4_wkup_hwmod = {
	.name		= "l4_wkup",
	.class		= &l4_hwmod_class,
	.masters	= omap2430_l4_wkup_masters,
	.masters_cnt	= ARRAY_SIZE(omap2430_l4_wkup_masters),
	.slaves		= omap2430_l4_wkup_slaves,
	.slaves_cnt	= ARRAY_SIZE(omap2430_l4_wkup_slaves),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
	.flags		= HWMOD_NO_IDLEST,
};

/* Master interfaces on the MPU device */
static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
	&omap2430_mpu__l3_main,
};

/* MPU */
static struct omap_hwmod omap2430_mpu_hwmod = {
	.name		= "mpu",
	.class		= &mpu_hwmod_class,
	.main_clk	= "mpu_ck",
	.masters	= omap2430_mpu_masters,
	.masters_cnt	= ARRAY_SIZE(omap2430_mpu_masters),
	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
};

static __initdata struct omap_hwmod *omap2430_hwmods[] = {
	&omap2430_l3_main_hwmod,
	&omap2430_l4_core_hwmod,
	&omap2430_l4_wkup_hwmod,
	&omap2430_mpu_hwmod,
	NULL,
};

int __init omap2430_hwmod_init(void)
{
	return omap_hwmod_init(omap2430_hwmods);
}
Commit	Line	Data
02bfc030	1	/*
7359154e	2	* omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips
02bfc030	3	*
7359154e	4	* Copyright (C) 2009-2010 Nokia Corporation
02bfc030 PW	5	* Paul Walmsley
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* XXX handle crossbar/shared link difference for L3?
7359154e	12	* XXX these should be marked initdata for multi-OMAP kernels
02bfc030	13	*/
ce491cf8	14	#include <plat/omap_hwmod.h>
02bfc030	15	#include <mach/irqs.h>
ce491cf8 TL	16	#include <plat/cpu.h>
ce491cf8 TL	17	#include <plat/dma.h>
02bfc030	18
43b40992 PW	19	#include "omap_hwmod_common_data.h"
43b40992 PW	20
02bfc030 PW	21	#include "prm-regbits-24xx.h"
02bfc030 PW	22
7359154e PW	23	/*
	24	* OMAP2430 hardware module integration data
	25	*
	26	* ALl of the data in this section should be autogeneratable from the
	27	* TI hardware database or other technical documentation. Data that
	28	* is driver-specific or driver-kernel integration-specific belongs
	29	* elsewhere.
	30	*/
	31
02bfc030	32	static struct omap_hwmod omap2430_mpu_hwmod;
4a7cf90a	33	static struct omap_hwmod omap2430_l3_main_hwmod;
02bfc030 PW	34	static struct omap_hwmod omap2430_l4_core_hwmod;
	35
	36	/* L3 -> L4_CORE interface */
4a7cf90a KH	37	static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = {
4a7cf90a KH	38	.master = &omap2430_l3_main_hwmod,
02bfc030 PW	39	.slave = &omap2430_l4_core_hwmod,
	40	.user = OCP_USER_MPU \| OCP_USER_SDMA,
	41	};
	42
	43	/* MPU -> L3 interface */
4a7cf90a	44	static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = {
02bfc030	45	.master = &omap2430_mpu_hwmod,
4a7cf90a	46	.slave = &omap2430_l3_main_hwmod,
02bfc030 PW	47	.user = OCP_USER_MPU,
	48	};
	49
	50	/* Slave interfaces on the L3 interconnect */
4a7cf90a KH	51	static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = {
4a7cf90a KH	52	&omap2430_mpu__l3_main,
02bfc030 PW	53	};
	54
	55	/* Master interfaces on the L3 interconnect */
4a7cf90a KH	56	static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = {
4a7cf90a KH	57	&omap2430_l3_main__l4_core,
02bfc030 PW	58	};
	59
	60	/* L3 */
4a7cf90a	61	static struct omap_hwmod omap2430_l3_main_hwmod = {
fa98347e	62	.name = "l3_main",
43b40992	63	.class = &l3_hwmod_class,
4a7cf90a KH	64	.masters = omap2430_l3_main_masters,
	65	.masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters),
	66	.slaves = omap2430_l3_main_slaves,
	67	.slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves),
2eb1875d KH	68	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
2eb1875d KH	69	.flags = HWMOD_NO_IDLEST,
02bfc030 PW	70	};
	71
	72	static struct omap_hwmod omap2430_l4_wkup_hwmod;
	73	static struct omap_hwmod omap2430_mmc1_hwmod;
	74	static struct omap_hwmod omap2430_mmc2_hwmod;
	75
	76	/* L4_CORE -> L4_WKUP interface */
	77	static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
	78	.master = &omap2430_l4_core_hwmod,
	79	.slave = &omap2430_l4_wkup_hwmod,
	80	.user = OCP_USER_MPU \| OCP_USER_SDMA,
	81	};
	82
	83	/* Slave interfaces on the L4_CORE interconnect */
	84	static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
4a7cf90a	85	&omap2430_l3_main__l4_core,
02bfc030 PW	86	};
	87
	88	/* Master interfaces on the L4_CORE interconnect */
	89	static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
	90	&omap2430_l4_core__l4_wkup,
	91	};
	92
	93	/* L4 CORE */
	94	static struct omap_hwmod omap2430_l4_core_hwmod = {
fa98347e	95	.name = "l4_core",
43b40992	96	.class = &l4_hwmod_class,
02bfc030 PW	97	.masters = omap2430_l4_core_masters,
	98	.masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters),
	99	.slaves = omap2430_l4_core_slaves,
	100	.slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves),
2eb1875d KH	101	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
2eb1875d KH	102	.flags = HWMOD_NO_IDLEST,
02bfc030 PW	103	};
	104
	105	/* Slave interfaces on the L4_WKUP interconnect */
	106	static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
	107	&omap2430_l4_core__l4_wkup,
	108	};
	109
	110	/* Master interfaces on the L4_WKUP interconnect */
	111	static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
	112	};
	113
	114	/* L4 WKUP */
	115	static struct omap_hwmod omap2430_l4_wkup_hwmod = {
fa98347e	116	.name = "l4_wkup",
43b40992	117	.class = &l4_hwmod_class,
02bfc030 PW	118	.masters = omap2430_l4_wkup_masters,
	119	.masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters),
	120	.slaves = omap2430_l4_wkup_slaves,
	121	.slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves),
2eb1875d KH	122	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
2eb1875d KH	123	.flags = HWMOD_NO_IDLEST,
02bfc030 PW	124	};
	125
	126	/* Master interfaces on the MPU device */
	127	static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
4a7cf90a	128	&omap2430_mpu__l3_main,
02bfc030 PW	129	};
	130
	131	/* MPU */
	132	static struct omap_hwmod omap2430_mpu_hwmod = {
5c2c0296	133	.name = "mpu",
43b40992	134	.class = &mpu_hwmod_class,
50ebdac2	135	.main_clk = "mpu_ck",
02bfc030 PW	136	.masters = omap2430_mpu_masters,
	137	.masters_cnt = ARRAY_SIZE(omap2430_mpu_masters),
	138	.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
	139	};
	140
	141	static __initdata struct omap_hwmod *omap2430_hwmods[] = {
4a7cf90a	142	&omap2430_l3_main_hwmod,
02bfc030 PW	143	&omap2430_l4_core_hwmod,
	144	&omap2430_l4_wkup_hwmod,
	145	&omap2430_mpu_hwmod,
	146	NULL,
	147	};
	148
7359154e PW	149	int __init omap2430_hwmod_init(void)
	150	{
	151	return omap_hwmod_init(omap2430_hwmods);
	152	}
02bfc030 PW	153
02bfc030 PW	154