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f5a6422d NM |
1 | /* |
2 | * OMAP4 OPP table definitions. | |
3 | * | |
df7cded3 | 4 | * Copyright (C) 2010-2012 Texas Instruments Incorporated - http://www.ti.com/ |
f5a6422d NM |
5 | * Nishanth Menon |
6 | * Kevin Hilman | |
7 | * Thara Gopinath | |
c0718df4 | 8 | * Copyright (C) 2010-2011 Nokia Corporation. |
f5a6422d | 9 | * Eduardo Valentin |
c0718df4 | 10 | * Paul Walmsley |
f5a6422d NM |
11 | * |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | * | |
16 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
17 | * kind, whether express or implied; without even the implied warranty | |
18 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | */ | |
21 | #include <linux/module.h> | |
22 | ||
dbc04161 | 23 | #include "soc.h" |
c0718df4 | 24 | #include "control.h" |
f5a6422d | 25 | #include "omap_opp_data.h" |
eb05ead9 | 26 | #include "pm.h" |
f5a6422d | 27 | |
c0718df4 PW |
28 | /* |
29 | * Structures containing OMAP4430 voltage supported and various | |
30 | * voltage dependent data for each VDD. | |
31 | */ | |
32 | ||
d9a2012d SG |
33 | #define OMAP4430_VDD_MPU_OPP50_UV 1025000 |
34 | #define OMAP4430_VDD_MPU_OPP100_UV 1200000 | |
35 | #define OMAP4430_VDD_MPU_OPPTURBO_UV 1313000 | |
36 | #define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000 | |
c0718df4 | 37 | |
df7cded3 | 38 | struct omap_volt_data omap443x_vdd_mpu_volt_data[] = { |
c0718df4 PW |
39 | VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), |
40 | VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), | |
41 | VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), | |
42 | VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27), | |
43 | VOLT_DATA_DEFINE(0, 0, 0, 0), | |
44 | }; | |
45 | ||
d9a2012d SG |
46 | #define OMAP4430_VDD_IVA_OPP50_UV 1013000 |
47 | #define OMAP4430_VDD_IVA_OPP100_UV 1188000 | |
48 | #define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000 | |
c0718df4 | 49 | |
df7cded3 | 50 | struct omap_volt_data omap443x_vdd_iva_volt_data[] = { |
c0718df4 PW |
51 | VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), |
52 | VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), | |
53 | VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), | |
54 | VOLT_DATA_DEFINE(0, 0, 0, 0), | |
55 | }; | |
56 | ||
d9a2012d SG |
57 | #define OMAP4430_VDD_CORE_OPP50_UV 1025000 |
58 | #define OMAP4430_VDD_CORE_OPP100_UV 1200000 | |
c0718df4 | 59 | |
df7cded3 | 60 | struct omap_volt_data omap443x_vdd_core_volt_data[] = { |
c0718df4 PW |
61 | VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), |
62 | VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), | |
63 | VOLT_DATA_DEFINE(0, 0, 0, 0), | |
64 | }; | |
65 | ||
66 | ||
df7cded3 | 67 | static struct omap_opp_def __initdata omap443x_opp_def_list[] = { |
f5a6422d | 68 | /* MPU OPP1 - OPP50 */ |
15f13e23 | 69 | OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV), |
f5a6422d | 70 | /* MPU OPP2 - OPP100 */ |
15f13e23 | 71 | OPP_INITIALIZER("mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV), |
f5a6422d | 72 | /* MPU OPP3 - OPP-Turbo */ |
273032f7 | 73 | OPP_INITIALIZER("mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV), |
f5a6422d | 74 | /* MPU OPP4 - OPP-SB */ |
273032f7 | 75 | OPP_INITIALIZER("mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV), |
f5a6422d | 76 | /* L3 OPP1 - OPP50 */ |
15f13e23 | 77 | OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV), |
f5a6422d | 78 | /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */ |
15f13e23 | 79 | OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV), |
a271e58c SG |
80 | /* IVA OPP1 - OPP50 */ |
81 | OPP_INITIALIZER("iva", true, 133000000, OMAP4430_VDD_IVA_OPP50_UV), | |
82 | /* IVA OPP2 - OPP100 */ | |
83 | OPP_INITIALIZER("iva", true, 266100000, OMAP4430_VDD_IVA_OPP100_UV), | |
84 | /* IVA OPP3 - OPP-Turbo */ | |
85 | OPP_INITIALIZER("iva", false, 332000000, OMAP4430_VDD_IVA_OPPTURBO_UV), | |
86 | /* TODO: add DSP, aess, fdif, gpu */ | |
f5a6422d NM |
87 | }; |
88 | ||
df7cded3 VS |
89 | #define OMAP4460_VDD_MPU_OPP50_UV 1025000 |
90 | #define OMAP4460_VDD_MPU_OPP100_UV 1200000 | |
91 | #define OMAP4460_VDD_MPU_OPPTURBO_UV 1313000 | |
92 | #define OMAP4460_VDD_MPU_OPPNITRO_UV 1375000 | |
93 | ||
94 | struct omap_volt_data omap446x_vdd_mpu_volt_data[] = { | |
95 | VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), | |
96 | VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), | |
97 | VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), | |
98 | VOLT_DATA_DEFINE(OMAP4460_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27), | |
99 | VOLT_DATA_DEFINE(0, 0, 0, 0), | |
100 | }; | |
101 | ||
102 | #define OMAP4460_VDD_IVA_OPP50_UV 1025000 | |
103 | #define OMAP4460_VDD_IVA_OPP100_UV 1200000 | |
104 | #define OMAP4460_VDD_IVA_OPPTURBO_UV 1313000 | |
105 | #define OMAP4460_VDD_IVA_OPPNITRO_UV 1375000 | |
106 | ||
107 | struct omap_volt_data omap446x_vdd_iva_volt_data[] = { | |
108 | VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), | |
109 | VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), | |
110 | VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), | |
111 | VOLT_DATA_DEFINE(OMAP4460_VDD_IVA_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPNITRO, 0xfa, 0x23), | |
112 | VOLT_DATA_DEFINE(0, 0, 0, 0), | |
113 | }; | |
114 | ||
115 | #define OMAP4460_VDD_CORE_OPP50_UV 1025000 | |
116 | #define OMAP4460_VDD_CORE_OPP100_UV 1200000 | |
117 | #define OMAP4460_VDD_CORE_OPP100_OV_UV 1250000 | |
118 | ||
119 | struct omap_volt_data omap446x_vdd_core_volt_data[] = { | |
120 | VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), | |
121 | VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), | |
122 | VOLT_DATA_DEFINE(OMAP4460_VDD_CORE_OPP100_OV_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100OV, 0xf9, 0x16), | |
123 | VOLT_DATA_DEFINE(0, 0, 0, 0), | |
124 | }; | |
125 | ||
126 | static struct omap_opp_def __initdata omap446x_opp_def_list[] = { | |
127 | /* MPU OPP1 - OPP50 */ | |
128 | OPP_INITIALIZER("mpu", true, 350000000, OMAP4460_VDD_MPU_OPP50_UV), | |
129 | /* MPU OPP2 - OPP100 */ | |
130 | OPP_INITIALIZER("mpu", true, 700000000, OMAP4460_VDD_MPU_OPP100_UV), | |
131 | /* MPU OPP3 - OPP-Turbo */ | |
132 | OPP_INITIALIZER("mpu", true, 920000000, OMAP4460_VDD_MPU_OPPTURBO_UV), | |
133 | /* | |
134 | * MPU OPP4 - OPP-Nitro + Disabled as the reference schematics | |
135 | * recommends TPS623631 - confirm and enable the opp in board file | |
136 | * XXX: May be we should enable these based on mpu capability and | |
137 | * Exception board files disable it... | |
138 | */ | |
139 | OPP_INITIALIZER("mpu", false, 1200000000, OMAP4460_VDD_MPU_OPPNITRO_UV), | |
140 | /* MPU OPP4 - OPP-Nitro SpeedBin */ | |
141 | OPP_INITIALIZER("mpu", false, 1500000000, OMAP4460_VDD_MPU_OPPNITRO_UV), | |
142 | /* L3 OPP1 - OPP50 */ | |
143 | OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4460_VDD_CORE_OPP50_UV), | |
144 | /* L3 OPP2 - OPP100 */ | |
145 | OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4460_VDD_CORE_OPP100_UV), | |
146 | /* IVA OPP1 - OPP50 */ | |
147 | OPP_INITIALIZER("iva", true, 133000000, OMAP4460_VDD_IVA_OPP50_UV), | |
148 | /* IVA OPP2 - OPP100 */ | |
149 | OPP_INITIALIZER("iva", true, 266100000, OMAP4460_VDD_IVA_OPP100_UV), | |
150 | /* | |
151 | * IVA OPP3 - OPP-Turbo + Disabled as the reference schematics | |
152 | * recommends Phoenix VCORE2 which can supply only 600mA - so the ones | |
153 | * above this OPP frequency, even though OMAP is capable, should be | |
154 | * enabled by board file which is sure of the chip power capability | |
155 | */ | |
156 | OPP_INITIALIZER("iva", false, 332000000, OMAP4460_VDD_IVA_OPPTURBO_UV), | |
157 | /* IVA OPP4 - OPP-Nitro */ | |
158 | OPP_INITIALIZER("iva", false, 430000000, OMAP4460_VDD_IVA_OPPNITRO_UV), | |
159 | /* IVA OPP5 - OPP-Nitro SpeedBin*/ | |
160 | OPP_INITIALIZER("iva", false, 500000000, OMAP4460_VDD_IVA_OPPNITRO_UV), | |
161 | ||
162 | /* TODO: add DSP, aess, fdif, gpu */ | |
163 | }; | |
164 | ||
f5a6422d NM |
165 | /** |
166 | * omap4_opp_init() - initialize omap4 opp table | |
167 | */ | |
eb05ead9 | 168 | int __init omap4_opp_init(void) |
f5a6422d NM |
169 | { |
170 | int r = -ENODEV; | |
171 | ||
df7cded3 VS |
172 | if (cpu_is_omap443x()) |
173 | r = omap_init_opp_table(omap443x_opp_def_list, | |
174 | ARRAY_SIZE(omap443x_opp_def_list)); | |
175 | else if (cpu_is_omap446x()) | |
176 | r = omap_init_opp_table(omap446x_opp_def_list, | |
177 | ARRAY_SIZE(omap446x_opp_def_list)); | |
f5a6422d NM |
178 | return r; |
179 | } | |
b76c8b19 | 180 | omap_device_initcall(omap4_opp_init); |