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6a08e1e6 TL |
1 | /* |
2 | * Legacy platform_data quirks | |
3 | * | |
4 | * Copyright (C) 2013 Texas Instruments | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | #include <linux/clk.h> | |
5f0a2c69 | 11 | #include <linux/gpio.h> |
6a08e1e6 TL |
12 | #include <linux/init.h> |
13 | #include <linux/kernel.h> | |
8651bd8c | 14 | #include <linux/of_platform.h> |
5f0a2c69 | 15 | #include <linux/wl12xx.h> |
6a08e1e6 | 16 | |
30a69ef7 TL |
17 | #include <linux/platform_data/pinctrl-single.h> |
18 | ||
6a08e1e6 TL |
19 | #include "common.h" |
20 | #include "common-board-devices.h" | |
21 | #include "dss-common.h" | |
faf4bd47 | 22 | #include "control.h" |
6a08e1e6 TL |
23 | |
24 | struct pdata_init { | |
25 | const char *compatible; | |
26 | void (*fn)(void); | |
27 | }; | |
28 | ||
3e7a3185 TL |
29 | /* |
30 | * Create alias for USB host PHY clock. | |
31 | * Remove this when clock phandle can be provided via DT | |
32 | */ | |
33 | static void __init __used legacy_init_ehci_clk(char *clkname) | |
34 | { | |
35 | int ret; | |
36 | ||
37 | ret = clk_add_alias("main_clk", NULL, clkname, NULL); | |
38 | if (ret) | |
39 | pr_err("%s:Failed to add main_clk alias to %s :%d\n", | |
40 | __func__, clkname, ret); | |
41 | } | |
42 | ||
5f0a2c69 TL |
43 | #if IS_ENABLED(CONFIG_WL12XX) |
44 | ||
45 | static struct wl12xx_platform_data wl12xx __initdata; | |
46 | ||
47 | static void __init __used legacy_init_wl12xx(unsigned ref_clock, | |
48 | unsigned tcxo_clock, | |
49 | int gpio) | |
50 | { | |
51 | int res; | |
52 | ||
53 | wl12xx.board_ref_clock = ref_clock; | |
54 | wl12xx.board_tcxo_clock = tcxo_clock; | |
55 | wl12xx.irq = gpio_to_irq(gpio); | |
56 | ||
57 | res = wl12xx_set_platform_data(&wl12xx); | |
58 | if (res) { | |
59 | pr_err("error setting wl12xx data: %d\n", res); | |
60 | return; | |
61 | } | |
62 | } | |
63 | #else | |
64 | static inline void legacy_init_wl12xx(unsigned ref_clock, | |
65 | unsigned tcxo_clock, | |
66 | int gpio) | |
67 | { | |
68 | } | |
69 | #endif | |
70 | ||
faf4bd47 AK |
71 | #ifdef CONFIG_ARCH_OMAP3 |
72 | static void __init hsmmc2_internal_input_clk(void) | |
73 | { | |
74 | u32 reg; | |
75 | ||
76 | reg = omap_ctrl_readl(OMAP343X_CONTROL_DEVCONF1); | |
77 | reg |= OMAP2_MMCSDIO2ADPCLKISEL; | |
78 | omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1); | |
79 | } | |
15c9887e JMC |
80 | |
81 | static void __init omap3_igep0020_legacy_init(void) | |
82 | { | |
83 | omap3_igep2_display_init_of(); | |
84 | } | |
79b39f79 TL |
85 | |
86 | static void __init omap3_evm_legacy_init(void) | |
87 | { | |
88 | legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149); | |
89 | } | |
90 | ||
91 | static void __init omap3_zoom_legacy_init(void) | |
92 | { | |
93 | legacy_init_wl12xx(WL12XX_REFCLOCK_26, 0, 162); | |
94 | } | |
faf4bd47 AK |
95 | #endif /* CONFIG_ARCH_OMAP3 */ |
96 | ||
3e7a3185 TL |
97 | #ifdef CONFIG_ARCH_OMAP4 |
98 | static void __init omap4_sdp_legacy_init(void) | |
99 | { | |
100 | omap_4430sdp_display_init_of(); | |
5f0a2c69 TL |
101 | legacy_init_wl12xx(WL12XX_REFCLOCK_26, |
102 | WL12XX_TCXOCLOCK_26, 53); | |
3e7a3185 TL |
103 | } |
104 | ||
105 | static void __init omap4_panda_legacy_init(void) | |
106 | { | |
107 | omap4_panda_display_init_of(); | |
108 | legacy_init_ehci_clk("auxclk3_ck"); | |
5f0a2c69 | 109 | legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53); |
3e7a3185 TL |
110 | } |
111 | #endif | |
112 | ||
113 | #ifdef CONFIG_SOC_OMAP5 | |
114 | static void __init omap5_uevm_legacy_init(void) | |
115 | { | |
116 | legacy_init_ehci_clk("auxclk1_ck"); | |
117 | } | |
118 | #endif | |
119 | ||
30a69ef7 TL |
120 | static struct pcs_pdata pcs_pdata; |
121 | ||
122 | void omap_pcs_legacy_init(int irq, void (*rearm)(void)) | |
123 | { | |
124 | pcs_pdata.irq = irq; | |
125 | pcs_pdata.rearm = rearm; | |
126 | } | |
127 | ||
8651bd8c | 128 | struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { |
30a69ef7 TL |
129 | #ifdef CONFIG_ARCH_OMAP3 |
130 | OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002030, "48002030.pinmux", &pcs_pdata), | |
131 | OF_DEV_AUXDATA("ti,omap3-padconf", 0x48002a00, "48002a00.pinmux", &pcs_pdata), | |
132 | #endif | |
133 | #ifdef CONFIG_ARCH_OMAP4 | |
134 | OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a100040, "4a100040.pinmux", &pcs_pdata), | |
135 | OF_DEV_AUXDATA("ti,omap4-padconf", 0x4a31e040, "4a31e040.pinmux", &pcs_pdata), | |
136 | #endif | |
8651bd8c TL |
137 | { /* sentinel */ }, |
138 | }; | |
139 | ||
6a08e1e6 | 140 | static struct pdata_init pdata_quirks[] __initdata = { |
faf4bd47 AK |
141 | #ifdef CONFIG_ARCH_OMAP3 |
142 | { "nokia,omap3-n9", hsmmc2_internal_input_clk, }, | |
143 | { "nokia,omap3-n950", hsmmc2_internal_input_clk, }, | |
15c9887e | 144 | { "isee,omap3-igep0020", omap3_igep0020_legacy_init, }, |
79b39f79 TL |
145 | { "ti,omap3-evm-37xx", omap3_evm_legacy_init, }, |
146 | { "ti,omap3-zoom3", omap3_zoom_legacy_init, }, | |
faf4bd47 | 147 | #endif |
3e7a3185 TL |
148 | #ifdef CONFIG_ARCH_OMAP4 |
149 | { "ti,omap4-sdp", omap4_sdp_legacy_init, }, | |
150 | { "ti,omap4-panda", omap4_panda_legacy_init, }, | |
151 | #endif | |
152 | #ifdef CONFIG_SOC_OMAP5 | |
153 | { "ti,omap5-uevm", omap5_uevm_legacy_init, }, | |
154 | #endif | |
6a08e1e6 TL |
155 | { /* sentinel */ }, |
156 | }; | |
157 | ||
8651bd8c | 158 | void __init pdata_quirks_init(struct of_device_id *omap_dt_match_table) |
6a08e1e6 TL |
159 | { |
160 | struct pdata_init *quirks = pdata_quirks; | |
161 | ||
8651bd8c TL |
162 | omap_sdrc_init(NULL, NULL); |
163 | of_platform_populate(NULL, omap_dt_match_table, | |
164 | omap_auxdata_lookup, NULL); | |
165 | ||
6a08e1e6 TL |
166 | while (quirks->compatible) { |
167 | if (of_machine_is_compatible(quirks->compatible)) { | |
168 | if (quirks->fn) | |
169 | quirks->fn(); | |
170 | break; | |
171 | } | |
172 | quirks++; | |
173 | } | |
174 | } |