Commit | Line | Data |
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6f88e9bc KH |
1 | /* |
2 | * pm.c - Common OMAP2+ power management-related code | |
3 | * | |
4 | * Copyright (C) 2010 Texas Instruments, Inc. | |
5 | * Copyright (C) 2010 Nokia Corporation | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/io.h> | |
15 | #include <linux/err.h> | |
1482d8be | 16 | #include <linux/opp.h> |
6f88e9bc KH |
17 | |
18 | #include <plat/omap-pm.h> | |
19 | #include <plat/omap_device.h> | |
20 | #include <plat/common.h> | |
2f34ce81 | 21 | #include <plat/voltage.h> |
6f88e9bc | 22 | |
72e06d08 | 23 | #include "powerdomain.h" |
1540f214 | 24 | #include "clockdomain.h" |
0c0a5d61 | 25 | #include "pm.h" |
eb6a2c75 | 26 | |
6f88e9bc KH |
27 | static struct omap_device_pm_latency *pm_lats; |
28 | ||
29 | static struct device *mpu_dev; | |
b3294e23 | 30 | static struct device *iva_dev; |
6f88e9bc | 31 | static struct device *l3_dev; |
b3294e23 | 32 | static struct device *dsp_dev; |
6f88e9bc KH |
33 | |
34 | struct device *omap2_get_mpuss_device(void) | |
35 | { | |
36 | WARN_ON_ONCE(!mpu_dev); | |
37 | return mpu_dev; | |
38 | } | |
39 | ||
b3294e23 | 40 | struct device *omap2_get_iva_device(void) |
6f88e9bc | 41 | { |
b3294e23 TG |
42 | WARN_ON_ONCE(!iva_dev); |
43 | return iva_dev; | |
6f88e9bc KH |
44 | } |
45 | ||
46 | struct device *omap2_get_l3_device(void) | |
47 | { | |
48 | WARN_ON_ONCE(!l3_dev); | |
49 | return l3_dev; | |
50 | } | |
51 | ||
b3294e23 TG |
52 | struct device *omap4_get_dsp_device(void) |
53 | { | |
54 | WARN_ON_ONCE(!dsp_dev); | |
55 | return dsp_dev; | |
56 | } | |
57 | EXPORT_SYMBOL(omap4_get_dsp_device); | |
58 | ||
6f88e9bc KH |
59 | /* static int _init_omap_device(struct omap_hwmod *oh, void *user) */ |
60 | static int _init_omap_device(char *name, struct device **new_dev) | |
61 | { | |
62 | struct omap_hwmod *oh; | |
63 | struct omap_device *od; | |
64 | ||
65 | oh = omap_hwmod_lookup(name); | |
66 | if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", | |
67 | __func__, name)) | |
68 | return -ENODEV; | |
69 | ||
70 | od = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false); | |
71 | if (WARN(IS_ERR(od), "%s: could not build omap_device for %s\n", | |
72 | __func__, name)) | |
73 | return -ENODEV; | |
74 | ||
75 | *new_dev = &od->pdev.dev; | |
76 | ||
77 | return 0; | |
78 | } | |
79 | ||
80 | /* | |
81 | * Build omap_devices for processors and bus. | |
82 | */ | |
83 | static void omap2_init_processor_devices(void) | |
84 | { | |
85 | _init_omap_device("mpu", &mpu_dev); | |
b3294e23 | 86 | _init_omap_device("iva", &iva_dev); |
cbf27660 BC |
87 | if (cpu_is_omap44xx()) { |
88 | _init_omap_device("l3_main_1", &l3_dev); | |
b3294e23 | 89 | _init_omap_device("dsp", &dsp_dev); |
cbf27660 BC |
90 | } else { |
91 | _init_omap_device("l3_main", &l3_dev); | |
92 | } | |
6f88e9bc KH |
93 | } |
94 | ||
71a488db RN |
95 | /* Types of sleep_switch used in omap_set_pwrdm_state */ |
96 | #define FORCEWAKEUP_SWITCH 0 | |
97 | #define LOWPOWERSTATE_SWITCH 1 | |
98 | ||
eb6a2c75 SS |
99 | /* |
100 | * This sets pwrdm state (other than mpu & core. Currently only ON & | |
33de32b3 | 101 | * RET are supported. |
eb6a2c75 SS |
102 | */ |
103 | int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | |
104 | { | |
105 | u32 cur_state; | |
106 | int sleep_switch = 0; | |
107 | int ret = 0; | |
108 | ||
109 | if (pwrdm == NULL || IS_ERR(pwrdm)) | |
110 | return -EINVAL; | |
111 | ||
112 | while (!(pwrdm->pwrsts & (1 << state))) { | |
113 | if (state == PWRDM_POWER_OFF) | |
114 | return ret; | |
115 | state--; | |
116 | } | |
117 | ||
118 | cur_state = pwrdm_read_next_pwrst(pwrdm); | |
119 | if (cur_state == state) | |
120 | return ret; | |
121 | ||
122 | if (pwrdm_read_pwrst(pwrdm) < PWRDM_POWER_ON) { | |
71a488db RN |
123 | if ((pwrdm_read_pwrst(pwrdm) > state) && |
124 | (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) { | |
125 | sleep_switch = LOWPOWERSTATE_SWITCH; | |
126 | } else { | |
127 | omap2_clkdm_wakeup(pwrdm->pwrdm_clkdms[0]); | |
128 | pwrdm_wait_transition(pwrdm); | |
129 | sleep_switch = FORCEWAKEUP_SWITCH; | |
130 | } | |
eb6a2c75 SS |
131 | } |
132 | ||
133 | ret = pwrdm_set_next_pwrst(pwrdm, state); | |
134 | if (ret) { | |
135 | printk(KERN_ERR "Unable to set state of powerdomain: %s\n", | |
136 | pwrdm->name); | |
137 | goto err; | |
138 | } | |
139 | ||
71a488db RN |
140 | switch (sleep_switch) { |
141 | case FORCEWAKEUP_SWITCH: | |
33de32b3 RN |
142 | if (pwrdm->pwrdm_clkdms[0]->flags & CLKDM_CAN_ENABLE_AUTO) |
143 | omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); | |
144 | else | |
145 | omap2_clkdm_sleep(pwrdm->pwrdm_clkdms[0]); | |
71a488db RN |
146 | break; |
147 | case LOWPOWERSTATE_SWITCH: | |
148 | pwrdm_set_lowpwrstchange(pwrdm); | |
149 | break; | |
150 | default: | |
151 | return ret; | |
eb6a2c75 SS |
152 | } |
153 | ||
71a488db RN |
154 | pwrdm_wait_transition(pwrdm); |
155 | pwrdm_state_switch(pwrdm); | |
eb6a2c75 SS |
156 | err: |
157 | return ret; | |
158 | } | |
159 | ||
1482d8be TG |
160 | /* |
161 | * This API is to be called during init to put the various voltage | |
162 | * domains to the voltage as per the opp table. Typically we boot up | |
163 | * at the nominal voltage. So this function finds out the rate of | |
164 | * the clock associated with the voltage domain, finds out the correct | |
165 | * opp entry and puts the voltage domain to the voltage specifies | |
166 | * in the opp entry | |
167 | */ | |
168 | static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, | |
169 | struct device *dev) | |
170 | { | |
171 | struct voltagedomain *voltdm; | |
172 | struct clk *clk; | |
173 | struct opp *opp; | |
174 | unsigned long freq, bootup_volt; | |
175 | ||
176 | if (!vdd_name || !clk_name || !dev) { | |
177 | printk(KERN_ERR "%s: Invalid parameters!\n", __func__); | |
178 | goto exit; | |
179 | } | |
180 | ||
181 | voltdm = omap_voltage_domain_lookup(vdd_name); | |
182 | if (IS_ERR(voltdm)) { | |
183 | printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n", | |
184 | __func__, vdd_name); | |
185 | goto exit; | |
186 | } | |
187 | ||
188 | clk = clk_get(NULL, clk_name); | |
189 | if (IS_ERR(clk)) { | |
190 | printk(KERN_ERR "%s: unable to get clk %s\n", | |
191 | __func__, clk_name); | |
192 | goto exit; | |
193 | } | |
194 | ||
195 | freq = clk->rate; | |
196 | clk_put(clk); | |
197 | ||
198 | opp = opp_find_freq_ceil(dev, &freq); | |
199 | if (IS_ERR(opp)) { | |
200 | printk(KERN_ERR "%s: unable to find boot up OPP for vdd_%s\n", | |
201 | __func__, vdd_name); | |
202 | goto exit; | |
203 | } | |
204 | ||
205 | bootup_volt = opp_get_voltage(opp); | |
206 | if (!bootup_volt) { | |
207 | printk(KERN_ERR "%s: unable to find voltage corresponding" | |
208 | "to the bootup OPP for vdd_%s\n", __func__, vdd_name); | |
209 | goto exit; | |
210 | } | |
211 | ||
212 | omap_voltage_scale_vdd(voltdm, bootup_volt); | |
213 | return 0; | |
214 | ||
215 | exit: | |
216 | printk(KERN_ERR "%s: Unable to put vdd_%s to its init voltage\n\n", | |
217 | __func__, vdd_name); | |
218 | return -EINVAL; | |
219 | } | |
220 | ||
221 | static void __init omap3_init_voltages(void) | |
222 | { | |
223 | if (!cpu_is_omap34xx()) | |
224 | return; | |
225 | ||
226 | omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev); | |
227 | omap2_set_init_voltage("core", "l3_ick", l3_dev); | |
228 | } | |
229 | ||
1376ee1d TG |
230 | static void __init omap4_init_voltages(void) |
231 | { | |
232 | if (!cpu_is_omap44xx()) | |
233 | return; | |
234 | ||
235 | omap2_set_init_voltage("mpu", "dpll_mpu_ck", mpu_dev); | |
236 | omap2_set_init_voltage("core", "l3_div_ck", l3_dev); | |
237 | omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", iva_dev); | |
238 | } | |
239 | ||
6f88e9bc KH |
240 | static int __init omap2_common_pm_init(void) |
241 | { | |
242 | omap2_init_processor_devices(); | |
243 | omap_pm_if_init(); | |
244 | ||
245 | return 0; | |
246 | } | |
1cbbe37a | 247 | postcore_initcall(omap2_common_pm_init); |
6f88e9bc | 248 | |
2f34ce81 TG |
249 | static int __init omap2_common_pm_late_init(void) |
250 | { | |
fbc319f6 TG |
251 | /* Init the OMAP TWL parameters */ |
252 | omap3_twl_init(); | |
7bc3ed9a | 253 | omap4_twl_init(); |
1482d8be | 254 | |
fbc319f6 | 255 | /* Init the voltage layer */ |
2f34ce81 | 256 | omap_voltage_late_init(); |
1482d8be TG |
257 | |
258 | /* Initialize the voltages */ | |
259 | omap3_init_voltages(); | |
1376ee1d | 260 | omap4_init_voltages(); |
1482d8be | 261 | |
fbc319f6 | 262 | /* Smartreflex device init */ |
0c0a5d61 | 263 | omap_devinit_smartreflex(); |
2f34ce81 TG |
264 | |
265 | return 0; | |
266 | } | |
267 | late_initcall(omap2_common_pm_late_init); |