ARM: OMAP3: PM: remove superfluous calls to pwrdm_clear_all_prev_pwrst()
[deliverable/linux.git] / arch / arm / mach-omap2 / pm.c
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1/*
2 * pm.c - Common OMAP2+ power management-related code
3 *
4 * Copyright (C) 2010 Texas Instruments, Inc.
5 * Copyright (C) 2010 Nokia Corporation
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/io.h>
15#include <linux/err.h>
1482d8be 16#include <linux/opp.h>
dc28094b 17#include <linux/export.h>
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18
19#include <plat/omap-pm.h>
20#include <plat/omap_device.h>
4e65331c 21#include "common.h"
6f88e9bc 22
e1d6f472 23#include "voltage.h"
72e06d08 24#include "powerdomain.h"
1540f214 25#include "clockdomain.h"
0c0a5d61 26#include "pm.h"
46232a36 27#include "twl-common.h"
eb6a2c75 28
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29static struct omap_device_pm_latency *pm_lats;
30
9cf793f9 31static int __init _init_omap_device(char *name)
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32{
33 struct omap_hwmod *oh;
3528c58e 34 struct platform_device *pdev;
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35
36 oh = omap_hwmod_lookup(name);
37 if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
38 __func__, name))
39 return -ENODEV;
40
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41 pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
42 if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n",
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43 __func__, name))
44 return -ENODEV;
45
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46 return 0;
47}
48
49/*
50 * Build omap_devices for processors and bus.
51 */
52static void omap2_init_processor_devices(void)
53{
766e7afc 54 _init_omap_device("mpu");
2de0baef 55 if (omap3_has_iva())
766e7afc 56 _init_omap_device("iva");
2de0baef 57
cbf27660 58 if (cpu_is_omap44xx()) {
766e7afc
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59 _init_omap_device("l3_main_1");
60 _init_omap_device("dsp");
61 _init_omap_device("iva");
cbf27660 62 } else {
766e7afc 63 _init_omap_device("l3_main");
cbf27660 64 }
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65}
66
71a488db
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67/* Types of sleep_switch used in omap_set_pwrdm_state */
68#define FORCEWAKEUP_SWITCH 0
69#define LOWPOWERSTATE_SWITCH 1
70
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71/*
72 * This sets pwrdm state (other than mpu & core. Currently only ON &
33de32b3 73 * RET are supported.
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74 */
75int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
76{
77 u32 cur_state;
6349b96b 78 int sleep_switch = -1;
eb6a2c75 79 int ret = 0;
b86cfb52 80 int hwsup = 0;
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81
82 if (pwrdm == NULL || IS_ERR(pwrdm))
83 return -EINVAL;
84
85 while (!(pwrdm->pwrsts & (1 << state))) {
86 if (state == PWRDM_POWER_OFF)
87 return ret;
88 state--;
89 }
90
91 cur_state = pwrdm_read_next_pwrst(pwrdm);
92 if (cur_state == state)
93 return ret;
94
95 if (pwrdm_read_pwrst(pwrdm) < PWRDM_POWER_ON) {
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96 if ((pwrdm_read_pwrst(pwrdm) > state) &&
97 (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
98 sleep_switch = LOWPOWERSTATE_SWITCH;
99 } else {
b86cfb52 100 hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
68b921ad 101 clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
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102 sleep_switch = FORCEWAKEUP_SWITCH;
103 }
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104 }
105
106 ret = pwrdm_set_next_pwrst(pwrdm, state);
107 if (ret) {
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108 pr_err("%s: unable to set state of powerdomain: %s\n",
109 __func__, pwrdm->name);
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110 goto err;
111 }
112
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113 switch (sleep_switch) {
114 case FORCEWAKEUP_SWITCH:
b86cfb52 115 if (hwsup)
5cd1937b 116 clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
33de32b3 117 else
68b921ad 118 clkdm_sleep(pwrdm->pwrdm_clkdms[0]);
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119 break;
120 case LOWPOWERSTATE_SWITCH:
121 pwrdm_set_lowpwrstchange(pwrdm);
122 break;
123 default:
124 return ret;
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125 }
126
71a488db 127 pwrdm_state_switch(pwrdm);
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128err:
129 return ret;
130}
131
1482d8be 132/*
1e2d2df3 133 * This API is to be called during init to set the various voltage
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134 * domains to the voltage as per the opp table. Typically we boot up
135 * at the nominal voltage. So this function finds out the rate of
136 * the clock associated with the voltage domain, finds out the correct
1e2d2df3 137 * opp entry and sets the voltage domain to the voltage specified
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138 * in the opp entry
139 */
140static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
0f7aa005 141 const char *oh_name)
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142{
143 struct voltagedomain *voltdm;
144 struct clk *clk;
145 struct opp *opp;
146 unsigned long freq, bootup_volt;
0f7aa005 147 struct device *dev;
1482d8be 148
0f7aa005 149 if (!vdd_name || !clk_name || !oh_name) {
e9a5190a 150 pr_err("%s: invalid parameters\n", __func__);
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151 goto exit;
152 }
153
0f7aa005
BC
154 dev = omap_device_get_by_hwmod_name(oh_name);
155 if (IS_ERR(dev)) {
156 pr_err("%s: Unable to get dev pointer for hwmod %s\n",
157 __func__, oh_name);
158 goto exit;
159 }
160
81a60482 161 voltdm = voltdm_lookup(vdd_name);
1482d8be 162 if (IS_ERR(voltdm)) {
e9a5190a 163 pr_err("%s: unable to get vdd pointer for vdd_%s\n",
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164 __func__, vdd_name);
165 goto exit;
166 }
167
168 clk = clk_get(NULL, clk_name);
169 if (IS_ERR(clk)) {
e9a5190a 170 pr_err("%s: unable to get clk %s\n", __func__, clk_name);
1482d8be
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171 goto exit;
172 }
173
174 freq = clk->rate;
175 clk_put(clk);
176
177 opp = opp_find_freq_ceil(dev, &freq);
178 if (IS_ERR(opp)) {
e9a5190a 179 pr_err("%s: unable to find boot up OPP for vdd_%s\n",
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180 __func__, vdd_name);
181 goto exit;
182 }
183
184 bootup_volt = opp_get_voltage(opp);
185 if (!bootup_volt) {
e9a5190a 186 pr_err("%s: unable to find voltage corresponding "
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187 "to the bootup OPP for vdd_%s\n", __func__, vdd_name);
188 goto exit;
189 }
190
5e5651be 191 voltdm_scale(voltdm, bootup_volt);
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192 return 0;
193
194exit:
e9a5190a 195 pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name);
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196 return -EINVAL;
197}
198
199static void __init omap3_init_voltages(void)
200{
201 if (!cpu_is_omap34xx())
202 return;
203
0f7aa005
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204 omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu");
205 omap2_set_init_voltage("core", "l3_ick", "l3_main");
1482d8be
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206}
207
1376ee1d
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208static void __init omap4_init_voltages(void)
209{
210 if (!cpu_is_omap44xx())
211 return;
212
0f7aa005
BC
213 omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu");
214 omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1");
215 omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva");
1376ee1d
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216}
217
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218static int __init omap2_common_pm_init(void)
219{
476b679a
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220 if (!of_have_populated_dt())
221 omap2_init_processor_devices();
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222 omap_pm_if_init();
223
224 return 0;
225}
1cbbe37a 226postcore_initcall(omap2_common_pm_init);
6f88e9bc 227
2f34ce81
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228static int __init omap2_common_pm_late_init(void)
229{
fbc319f6 230 /* Init the voltage layer */
46232a36 231 omap_pmic_late_init();
2f34ce81 232 omap_voltage_late_init();
1482d8be
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233
234 /* Initialize the voltages */
235 omap3_init_voltages();
1376ee1d 236 omap4_init_voltages();
1482d8be 237
fbc319f6 238 /* Smartreflex device init */
0c0a5d61 239 omap_devinit_smartreflex();
2f34ce81
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240
241 return 0;
242}
243late_initcall(omap2_common_pm_late_init);
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