projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 8bd22949 KH |
1 | /* |
| 2 | * OMAP2/3 Power Management Routines | |
| 3 | * | |
| 4 | * Copyright (C) 2008 Nokia Corporation | |
| 5 | * Jouni Hogander | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify | |
| 8 | * it under the terms of the GNU General Public License version 2 as | |
| 9 | * published by the Free Software Foundation. | |
| 10 | */ | |
| 11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H | |
| 12 | #define __ARCH_ARM_MACH_OMAP2_PM_H | |
| 13 | ||
| ce491cf8 | 14 | #include <plat/powerdomain.h> |
| 331b93f4 | 15 | |
| c40552bc KH |
16 | extern u32 enable_off_mode; |
| 17 | extern u32 sleep_while_idle; | |
| 18 | ||
| 27d59a4a | 19 | extern void *omap3_secure_ram_storage; |
| c40552bc | 20 | extern void omap3_pm_off_mode_enable(int); |
| 99e6a4d2 | 21 | extern void omap_sram_idle(void); |
| 20b01669 RN |
22 | extern int omap3_can_sleep(void); |
| 23 | extern int set_pwrdm_state(struct powerdomain *pwrdm, u32 state); | |
| 0343371e | 24 | extern int omap3_idle_init(void); |
| 27d59a4a | 25 | |
| bb4de3df | 26 | struct cpuidle_params { |
| 709731bb | 27 | u8 valid; |
| bb4de3df KH |
28 | u32 sleep_latency; |
| 29 | u32 wake_latency; | |
| 30 | u32 threshold; | |
| 31 | }; | |
| 32 | ||
| 33 | #if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE) | |
| 34 | extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params); | |
| 35 | #else | |
| 36 | static | |
| 37 | inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) | |
| 38 | { | |
| 39 | } | |
| 40 | #endif | |
| 41 | ||
| 68d4778c TK |
42 | extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); |
| 43 | extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); | |
| 44 | ||
| d7814e4d | 45 | extern u32 wakeup_timer_seconds; |
| 8e2efde9 | 46 | extern u32 wakeup_timer_milliseconds; |
| d7814e4d KH |
47 | extern struct omap_dm_timer *gptimer_wakeup; |
| 48 | ||
| 8bd22949 KH |
49 | #ifdef CONFIG_PM_DEBUG |
| 50 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); | |
| 51 | extern int omap2_pm_debug; | |
| ae559d87 MG |
52 | #else |
| 53 | #define omap2_pm_dump(mode, resume, us) do {} while (0); | |
| 54 | #define omap2_pm_debug 0 | |
| 55 | #endif | |
| 56 | ||
| 6af83b38 SP |
57 | #if defined(CONFIG_CPU_IDLE) |
| 58 | extern void omap3_cpuidle_update_states(void); | |
| 59 | #endif | |
| 60 | ||
| ae559d87 | 61 | #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) |
| 331b93f4 | 62 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); |
| 2811d6b3 TK |
63 | extern int pm_dbg_regset_save(int reg_set); |
| 64 | extern int pm_dbg_regset_init(int reg_set); | |
| 8bd22949 | 65 | #else |
| 331b93f4 | 66 | #define pm_dbg_update_time(pwrdm, prev) do {} while (0); |
| 2811d6b3 TK |
67 | #define pm_dbg_regset_save(reg_set) do {} while (0); |
| 68 | #define pm_dbg_regset_init(reg_set) do {} while (0); | |
| 8bd22949 KH |
69 | #endif /* CONFIG_PM_DEBUG */ |
| 70 | ||
| 71 | extern void omap24xx_idle_loop_suspend(void); | |
| 72 | ||
| 73 | extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, | |
| 74 | void __iomem *sdrc_power); | |
| 75 | extern void omap34xx_cpu_suspend(u32 *addr, int save_state); | |
| 76 | extern void save_secure_ram_context(u32 *addr); | |
| 27d59a4a | 77 | extern void omap3_save_scratchpad_contents(void); |
| 8bd22949 KH |
78 | |
| 79 | extern unsigned int omap24xx_idle_loop_suspend_sz; | |
| 80 | extern unsigned int omap34xx_suspend_sz; | |
| 81 | extern unsigned int save_secure_ram_context_sz; | |
| 82 | extern unsigned int omap24xx_cpu_suspend_sz; | |
| 83 | extern unsigned int omap34xx_cpu_suspend_sz; | |
| 84 | ||
| 85 | #endif |