Commit | Line | Data |
---|---|---|
8bd22949 KH |
1 | /* |
2 | * OMAP2/3 Power Management Routines | |
3 | * | |
4 | * Copyright (C) 2008 Nokia Corporation | |
5 | * Jouni Hogander | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | #ifndef __ARCH_ARM_MACH_OMAP2_PM_H | |
12 | #define __ARCH_ARM_MACH_OMAP2_PM_H | |
13 | ||
72e06d08 | 14 | #include "powerdomain.h" |
331b93f4 | 15 | |
27d59a4a | 16 | extern void *omap3_secure_ram_storage; |
c40552bc | 17 | extern void omap3_pm_off_mode_enable(int); |
99e6a4d2 | 18 | extern void omap_sram_idle(void); |
20b01669 | 19 | extern int omap3_can_sleep(void); |
eb6a2c75 | 20 | extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state); |
0343371e | 21 | extern int omap3_idle_init(void); |
27d59a4a | 22 | |
fd1478cd NM |
23 | #if defined(CONFIG_PM_OPP) |
24 | extern int omap3_opp_init(void); | |
f5a6422d | 25 | extern int omap4_opp_init(void); |
fd1478cd NM |
26 | #else |
27 | static inline int omap3_opp_init(void) | |
28 | { | |
29 | return -EINVAL; | |
30 | } | |
f5a6422d NM |
31 | static inline int omap4_opp_init(void) |
32 | { | |
33 | return -EINVAL; | |
34 | } | |
fd1478cd NM |
35 | #endif |
36 | ||
bb4de3df | 37 | struct cpuidle_params { |
709731bb | 38 | u8 valid; |
bb4de3df KH |
39 | u32 sleep_latency; |
40 | u32 wake_latency; | |
41 | u32 threshold; | |
42 | }; | |
43 | ||
44 | #if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE) | |
45 | extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params); | |
46 | #else | |
47 | static | |
48 | inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) | |
49 | { | |
50 | } | |
51 | #endif | |
52 | ||
68d4778c TK |
53 | extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); |
54 | extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); | |
55 | ||
d7814e4d | 56 | extern u32 wakeup_timer_seconds; |
8e2efde9 | 57 | extern u32 wakeup_timer_milliseconds; |
d7814e4d KH |
58 | extern struct omap_dm_timer *gptimer_wakeup; |
59 | ||
8bd22949 KH |
60 | #ifdef CONFIG_PM_DEBUG |
61 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); | |
86b0c1e3 | 62 | extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds); |
8bd22949 | 63 | extern int omap2_pm_debug; |
ebfa88cf LM |
64 | extern u32 enable_off_mode; |
65 | extern u32 sleep_while_idle; | |
ae559d87 MG |
66 | #else |
67 | #define omap2_pm_dump(mode, resume, us) do {} while (0); | |
86b0c1e3 | 68 | #define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0); |
ae559d87 | 69 | #define omap2_pm_debug 0 |
ebfa88cf LM |
70 | #define enable_off_mode 0 |
71 | #define sleep_while_idle 0 | |
ae559d87 MG |
72 | #endif |
73 | ||
6af83b38 | 74 | #if defined(CONFIG_CPU_IDLE) |
80723c3f | 75 | extern void omap3_cpuidle_update_states(u32, u32); |
6af83b38 SP |
76 | #endif |
77 | ||
ae559d87 | 78 | #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) |
331b93f4 | 79 | extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); |
2811d6b3 TK |
80 | extern int pm_dbg_regset_save(int reg_set); |
81 | extern int pm_dbg_regset_init(int reg_set); | |
8bd22949 | 82 | #else |
331b93f4 | 83 | #define pm_dbg_update_time(pwrdm, prev) do {} while (0); |
2811d6b3 TK |
84 | #define pm_dbg_regset_save(reg_set) do {} while (0); |
85 | #define pm_dbg_regset_init(reg_set) do {} while (0); | |
8bd22949 KH |
86 | #endif /* CONFIG_PM_DEBUG */ |
87 | ||
88 | extern void omap24xx_idle_loop_suspend(void); | |
89 | ||
90 | extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, | |
91 | void __iomem *sdrc_power); | |
92 | extern void omap34xx_cpu_suspend(u32 *addr, int save_state); | |
93 | extern void save_secure_ram_context(u32 *addr); | |
27d59a4a | 94 | extern void omap3_save_scratchpad_contents(void); |
8bd22949 KH |
95 | |
96 | extern unsigned int omap24xx_idle_loop_suspend_sz; | |
8bd22949 KH |
97 | extern unsigned int save_secure_ram_context_sz; |
98 | extern unsigned int omap24xx_cpu_suspend_sz; | |
99 | extern unsigned int omap34xx_cpu_suspend_sz; | |
100 | ||
458e999e | 101 | #define PM_RTA_ERRATUM_i608 (1 << 0) |
cc1b6028 | 102 | #define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) |
458e999e | 103 | |
8cdfd834 NM |
104 | #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) |
105 | extern u16 pm34xx_errata; | |
106 | #define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id)) | |
c4236d2e | 107 | extern void enable_omap3630_toggle_l2_on_restore(void); |
8cdfd834 NM |
108 | #else |
109 | #define IS_PM34XX_ERRATUM(id) 0 | |
c4236d2e | 110 | static inline void enable_omap3630_toggle_l2_on_restore(void) { } |
8cdfd834 NM |
111 | #endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */ |
112 | ||
8bd22949 | 113 | #endif |