projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| ee75d95c JH |
1 | /* |
| 2 | * OMAP2 ARM Performance Monitoring Unit (PMU) Support | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Texas Instruments, Inc. | |
| 5 | * | |
| 6 | * Contacts: | |
| 7 | * Jon Hunter <jon-hunter@ti.com> | |
| 8 | * | |
| 9 | * This program is free software; you can redistribute it and/or modify | |
| 10 | * it under the terms of the GNU General Public License as published by | |
| 11 | * the Free Software Foundation; either version 2 of the License, or | |
| 12 | * (at your option) any later version. | |
| 13 | */ | |
| eeb7ba21 JH |
14 | #include <linux/of.h> |
| 15 | ||
| 279806bf | 16 | #include <asm/system_info.h> |
| ee75d95c | 17 | |
| e4c060db | 18 | #include "soc.h" |
| 2a296c8f | 19 | #include "omap_hwmod.h" |
| 25c7d49e | 20 | #include "omap_device.h" |
| ee75d95c JH |
21 | |
| 22 | static char *omap2_pmu_oh_names[] = {"mpu"}; | |
| 23 | static char *omap3_pmu_oh_names[] = {"mpu", "debugss"}; | |
| efc7f49c | 24 | static char *omap4430_pmu_oh_names[] = {"l3_main_3", "l3_instr", "debugss"}; |
| ee75d95c JH |
25 | static struct platform_device *omap_pmu_dev; |
| 26 | ||
| 27 | /** | |
| 28 | * omap2_init_pmu - creates and registers PMU platform device | |
| 29 | * @oh_num: Number of OMAP HWMODs required to create PMU device | |
| 30 | * @oh_names: Array of OMAP HWMODS names required to create PMU device | |
| 31 | * | |
| 32 | * Uses OMAP HWMOD framework to create and register an ARM PMU device | |
| efc7f49c | 33 | * from a list of HWMOD names passed. Currently supports OMAP2, OMAP3 |
| 76a5d9bf | 34 | * and OMAP4 devices. |
| ee75d95c JH |
35 | */ |
| 36 | static int __init omap2_init_pmu(unsigned oh_num, char *oh_names[]) | |
| 37 | { | |
| 38 | int i; | |
| efc7f49c | 39 | struct omap_hwmod *oh[3]; |
| 279806bf MR |
40 | char *dev_name = cpu_architecture() == CPU_ARCH_ARMv6 ? |
| 41 | "armv6-pmu" : "armv7-pmu"; | |
| ee75d95c | 42 | |
| efc7f49c | 43 | if ((!oh_num) || (oh_num > 3)) |
| ee75d95c JH |
44 | return -EINVAL; |
| 45 | ||
| 46 | for (i = 0; i < oh_num; i++) { | |
| 47 | oh[i] = omap_hwmod_lookup(oh_names[i]); | |
| 48 | if (!oh[i]) { | |
| 49 | pr_err("Could not look up %s hwmod\n", oh_names[i]); | |
| 50 | return -ENODEV; | |
| 51 | } | |
| 52 | } | |
| 53 | ||
| c1d1cd59 | 54 | omap_pmu_dev = omap_device_build_ss(dev_name, -1, oh, oh_num, NULL, 0); |
| ee75d95c JH |
55 | WARN(IS_ERR(omap_pmu_dev), "Can't build omap_device for %s.\n", |
| 56 | dev_name); | |
| 57 | ||
| 87a2028f | 58 | return PTR_ERR_OR_ZERO(omap_pmu_dev); |
| ee75d95c JH |
59 | } |
| 60 | ||
| 61 | static int __init omap_init_pmu(void) | |
| 62 | { | |
| 63 | unsigned oh_num; | |
| 64 | char **oh_names; | |
| 65 | ||
| eeb7ba21 JH |
66 | /* XXX Remove this check when the CTI driver is available */ |
| 67 | if (cpu_is_omap443x()) { | |
| 68 | pr_info("ARM PMU: not yet supported on OMAP4430 due to missing CTI driver\n"); | |
| 69 | return 0; | |
| 70 | } | |
| 71 | ||
| 72 | if (of_have_populated_dt()) | |
| 73 | return 0; | |
| 74 | ||
| ee75d95c JH |
75 | /* |
| 76 | * To create an ARM-PMU device the following HWMODs | |
| 77 | * are required for the various OMAP2+ devices. | |
| 78 | * | |
| 79 | * OMAP24xx: mpu | |
| 80 | * OMAP3xxx: mpu, debugss | |
| efc7f49c | 81 | * OMAP4430: l3_main_3, l3_instr, debugss |
| 76a5d9bf | 82 | * OMAP4460/70: mpu, debugss |
| ee75d95c | 83 | */ |
| 76a5d9bf | 84 | if (cpu_is_omap443x()) { |
| efc7f49c ML |
85 | oh_num = ARRAY_SIZE(omap4430_pmu_oh_names); |
| 86 | oh_names = omap4430_pmu_oh_names; | |
| 76a5d9bf JH |
87 | } else if (cpu_is_omap34xx() || cpu_is_omap44xx()) { |
| 88 | oh_num = ARRAY_SIZE(omap3_pmu_oh_names); | |
| 89 | oh_names = omap3_pmu_oh_names; | |
| ee75d95c | 90 | } else { |
| 76a5d9bf JH |
91 | oh_num = ARRAY_SIZE(omap2_pmu_oh_names); |
| 92 | oh_names = omap2_pmu_oh_names; | |
| ee75d95c JH |
93 | } |
| 94 | ||
| 95 | return omap2_init_pmu(oh_num, oh_names); | |
| 96 | } | |
| b76c8b19 | 97 | omap_subsys_initcall(omap_init_pmu); |