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fe6a58f8 | 1 | /* |
6e01478a | 2 | * OMAP2XXX powerdomain definitions |
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3 | * |
4 | * Copyright (C) 2007-2008 Texas Instruments, Inc. | |
4cb49fec | 5 | * Copyright (C) 2007-2011 Nokia Corporation |
fe6a58f8 | 6 | * |
6e01478a | 7 | * Paul Walmsley, Jouni Högander |
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8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
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14 | #include <linux/kernel.h> |
15 | #include <linux/init.h> | |
fe6a58f8 | 16 | |
72e06d08 | 17 | #include "powerdomain.h" |
6e01478a | 18 | #include "powerdomains2xxx_3xxx_data.h" |
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19 | |
20 | #include "prcm-common.h" | |
59fb659b | 21 | #include "prm2xxx_3xxx.h" |
fe6a58f8 | 22 | #include "prm-regbits-24xx.h" |
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23 | |
24 | /* 24XX powerdomains and dependencies */ | |
25 | ||
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26 | /* Powerdomains */ |
27 | ||
28 | static struct powerdomain dsp_pwrdm = { | |
29 | .name = "dsp_pwrdm", | |
30 | .prcm_offs = OMAP24XX_DSP_MOD, | |
31 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), | |
fe6a58f8 | 32 | .pwrsts = PWRSTS_OFF_RET_ON, |
4cb49fec | 33 | .pwrsts_logic_ret = PWRSTS_RET, |
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34 | .banks = 1, |
35 | .pwrsts_mem_ret = { | |
4cb49fec | 36 | [0] = PWRSTS_RET, |
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37 | }, |
38 | .pwrsts_mem_on = { | |
4cb49fec | 39 | [0] = PWRSTS_ON, |
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40 | }, |
41 | }; | |
42 | ||
43 | static struct powerdomain mpu_24xx_pwrdm = { | |
44 | .name = "mpu_pwrdm", | |
45 | .prcm_offs = MPU_MOD, | |
46 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), | |
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47 | .pwrsts = PWRSTS_OFF_RET_ON, |
48 | .pwrsts_logic_ret = PWRSTS_OFF_RET, | |
49 | .banks = 1, | |
50 | .pwrsts_mem_ret = { | |
4cb49fec | 51 | [0] = PWRSTS_RET, |
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52 | }, |
53 | .pwrsts_mem_on = { | |
4cb49fec | 54 | [0] = PWRSTS_ON, |
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55 | }, |
56 | }; | |
57 | ||
58 | static struct powerdomain core_24xx_pwrdm = { | |
59 | .name = "core_pwrdm", | |
60 | .prcm_offs = CORE_MOD, | |
61 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), | |
fe6a58f8 | 62 | .pwrsts = PWRSTS_OFF_RET_ON, |
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63 | .banks = 3, |
64 | .pwrsts_mem_ret = { | |
65 | [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ | |
66 | [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */ | |
67 | [2] = PWRSTS_OFF_RET, /* MEM3RETSTATE */ | |
68 | }, | |
69 | .pwrsts_mem_on = { | |
70 | [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ | |
71 | [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ | |
72 | [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */ | |
73 | }, | |
74 | }; | |
75 | ||
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76 | |
77 | /* | |
78 | * 2430-specific powerdomains | |
79 | */ | |
80 | ||
59b479e0 | 81 | #ifdef CONFIG_SOC_OMAP2430 |
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82 | |
83 | /* XXX 2430 KILLDOMAINWKUP bit? No current users apparently */ | |
84 | ||
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85 | static struct powerdomain mdm_pwrdm = { |
86 | .name = "mdm_pwrdm", | |
87 | .prcm_offs = OMAP2430_MDM_MOD, | |
88 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | |
fe6a58f8 | 89 | .pwrsts = PWRSTS_OFF_RET_ON, |
4cb49fec | 90 | .pwrsts_logic_ret = PWRSTS_RET, |
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91 | .banks = 1, |
92 | .pwrsts_mem_ret = { | |
4cb49fec | 93 | [0] = PWRSTS_RET, /* MEMRETSTATE */ |
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94 | }, |
95 | .pwrsts_mem_on = { | |
4cb49fec | 96 | [0] = PWRSTS_ON, /* MEMONSTATE */ |
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97 | }, |
98 | }; | |
99 | ||
59b479e0 | 100 | #endif /* CONFIG_SOC_OMAP2430 */ |
fe6a58f8 | 101 | |
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102 | /* As powerdomains are added or removed above, this list must also be changed */ |
103 | static struct powerdomain *powerdomains_omap2xxx[] __initdata = { | |
fe6a58f8 | 104 | |
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105 | &wkup_omap2_pwrdm, |
106 | &gfx_omap2_pwrdm, | |
107 | ||
108 | #ifdef CONFIG_ARCH_OMAP2 | |
109 | &dsp_pwrdm, | |
110 | &mpu_24xx_pwrdm, | |
111 | &core_24xx_pwrdm, | |
fe6a58f8 | 112 | #endif |
6e01478a | 113 | |
59b479e0 | 114 | #ifdef CONFIG_SOC_OMAP2430 |
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115 | &mdm_pwrdm, |
116 | #endif | |
117 | NULL | |
118 | }; | |
119 | ||
120 | void __init omap2xxx_powerdomains_init(void) | |
121 | { | |
122 | pwrdm_init(powerdomains_omap2xxx, &omap2_pwrdm_operations); | |
123 | } |