Commit | Line | Data |
---|---|---|
1dbae815 | 1 | /* |
f30c2269 | 2 | * arch/arm/mach-omap2/serial.c |
1dbae815 TL |
3 | * |
4 | * OMAP2 serial support. | |
5 | * | |
6e81176d | 6 | * Copyright (C) 2005-2008 Nokia Corporation |
1dbae815 TL |
7 | * Author: Paul Mundt <paul.mundt@nokia.com> |
8 | * | |
4af4016c KH |
9 | * Major rework for PM support by Kevin Hilman |
10 | * | |
1dbae815 TL |
11 | * Based off of arch/arm/mach-omap/omap1/serial.c |
12 | * | |
44169075 SS |
13 | * Copyright (C) 2009 Texas Instruments |
14 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com | |
15 | * | |
1dbae815 TL |
16 | * This file is subject to the terms and conditions of the GNU General Public |
17 | * License. See the file "COPYING" in the main directory of this archive | |
18 | * for more details. | |
19 | */ | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/init.h> | |
f8ce2547 | 22 | #include <linux/clk.h> |
fced80c7 | 23 | #include <linux/io.h> |
e03d37d8 | 24 | #include <linux/delay.h> |
6f251e9d KH |
25 | #include <linux/platform_device.h> |
26 | #include <linux/slab.h> | |
3244fcd2 | 27 | #include <linux/pm_runtime.h> |
0d8e2d0d | 28 | #include <linux/console.h> |
6f251e9d | 29 | |
6f251e9d | 30 | #include <plat/omap-serial.h> |
4e65331c | 31 | #include "common.h" |
ce491cf8 | 32 | #include <plat/board.h> |
6f251e9d KH |
33 | #include <plat/dma.h> |
34 | #include <plat/omap_hwmod.h> | |
35 | #include <plat/omap_device.h> | |
ec3bebc6 | 36 | #include <plat/omap-pm.h> |
4af4016c | 37 | |
59fb659b | 38 | #include "prm2xxx_3xxx.h" |
4af4016c | 39 | #include "pm.h" |
59fb659b | 40 | #include "cm2xxx_3xxx.h" |
4af4016c | 41 | #include "prm-regbits-34xx.h" |
4814ced5 | 42 | #include "control.h" |
40e44399 | 43 | #include "mux.h" |
4af4016c | 44 | |
301fe8ee TL |
45 | /* |
46 | * NOTE: By default the serial timeout is disabled as it causes lost characters | |
47 | * over the serial ports. This means that the UART clocks will stay on until | |
48 | * disabled via sysfs. This also causes that any deeper omap sleep states are | |
49 | * blocked. | |
50 | */ | |
51 | #define DEFAULT_TIMEOUT 0 | |
4af4016c | 52 | |
6f251e9d KH |
53 | #define MAX_UART_HWMOD_NAME_LEN 16 |
54 | ||
4af4016c KH |
55 | struct omap_uart_state { |
56 | int num; | |
57 | int can_sleep; | |
4af4016c | 58 | |
4af4016c | 59 | struct list_head node; |
6f251e9d KH |
60 | struct omap_hwmod *oh; |
61 | struct platform_device *pdev; | |
4af4016c KH |
62 | }; |
63 | ||
4af4016c | 64 | static LIST_HEAD(uart_list); |
6f251e9d | 65 | static u8 num_uarts; |
1dbae815 | 66 | |
4af4016c KH |
67 | #ifdef CONFIG_PM |
68 | ||
4af4016c KH |
69 | int omap_uart_can_sleep(void) |
70 | { | |
71 | struct omap_uart_state *uart; | |
72 | int can_sleep = 1; | |
73 | ||
74 | list_for_each_entry(uart, &uart_list, node) { | |
75 | if (!uart->clocked) | |
76 | continue; | |
77 | ||
78 | if (!uart->can_sleep) { | |
79 | can_sleep = 0; | |
80 | continue; | |
6e81176d | 81 | } |
4af4016c KH |
82 | |
83 | /* This UART can now safely sleep. */ | |
84 | omap_uart_allow_sleep(uart); | |
6e81176d | 85 | } |
4af4016c KH |
86 | |
87 | return can_sleep; | |
6e81176d JH |
88 | } |
89 | ||
62f3ec5f | 90 | static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable) |
4af4016c | 91 | { |
62f3ec5f | 92 | struct omap_device *od = to_omap_device(pdev); |
4af4016c | 93 | |
62f3ec5f G |
94 | if (!od) |
95 | return; | |
4af4016c | 96 | |
62f3ec5f G |
97 | if (enable) |
98 | omap_hwmod_enable_wakeup(od->hwmods[0]); | |
99 | else | |
100 | omap_hwmod_disable_wakeup(od->hwmods[0]); | |
ba87a9be JH |
101 | } |
102 | ||
94734749 G |
103 | /* |
104 | * Errata i291: [UART]:Cannot Acknowledge Idle Requests | |
105 | * in Smartidle Mode When Configured for DMA Operations. | |
106 | * WA: configure uart in force idle mode. | |
107 | */ | |
108 | static void omap_uart_set_noidle(struct platform_device *pdev) | |
109 | { | |
110 | struct omap_device *od = to_omap_device(pdev); | |
111 | ||
112 | omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO); | |
113 | } | |
114 | ||
115 | static void omap_uart_set_forceidle(struct platform_device *pdev) | |
116 | { | |
117 | struct omap_device *od = to_omap_device(pdev); | |
118 | ||
119 | omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_FORCE); | |
120 | } | |
121 | ||
4af4016c | 122 | #else |
62f3ec5f G |
123 | static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable) |
124 | {} | |
94734749 G |
125 | static void omap_uart_set_noidle(struct platform_device *pdev) {} |
126 | static void omap_uart_set_forceidle(struct platform_device *pdev) {} | |
4af4016c KH |
127 | #endif /* CONFIG_PM */ |
128 | ||
7496ba30 G |
129 | #ifdef CONFIG_OMAP_MUX |
130 | static struct omap_device_pad default_uart1_pads[] __initdata = { | |
131 | { | |
132 | .name = "uart1_cts.uart1_cts", | |
133 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | |
134 | }, | |
135 | { | |
136 | .name = "uart1_rts.uart1_rts", | |
137 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | |
138 | }, | |
139 | { | |
140 | .name = "uart1_tx.uart1_tx", | |
141 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | |
142 | }, | |
143 | { | |
144 | .name = "uart1_rx.uart1_rx", | |
145 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | |
146 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | |
147 | .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | |
148 | }, | |
149 | }; | |
150 | ||
151 | static struct omap_device_pad default_uart2_pads[] __initdata = { | |
152 | { | |
153 | .name = "uart2_cts.uart2_cts", | |
154 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | |
155 | }, | |
156 | { | |
157 | .name = "uart2_rts.uart2_rts", | |
158 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | |
159 | }, | |
160 | { | |
161 | .name = "uart2_tx.uart2_tx", | |
162 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | |
163 | }, | |
164 | { | |
165 | .name = "uart2_rx.uart2_rx", | |
166 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | |
167 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | |
168 | .idle = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | |
169 | }, | |
170 | }; | |
171 | ||
172 | static struct omap_device_pad default_uart3_pads[] __initdata = { | |
173 | { | |
174 | .name = "uart3_cts_rctx.uart3_cts_rctx", | |
175 | .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0, | |
176 | }, | |
177 | { | |
178 | .name = "uart3_rts_sd.uart3_rts_sd", | |
179 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | |
180 | }, | |
181 | { | |
182 | .name = "uart3_tx_irtx.uart3_tx_irtx", | |
183 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | |
184 | }, | |
185 | { | |
186 | .name = "uart3_rx_irrx.uart3_rx_irrx", | |
187 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | |
188 | .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | |
189 | .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | |
190 | }, | |
191 | }; | |
192 | ||
193 | static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = { | |
194 | { | |
195 | .name = "gpmc_wait2.uart4_tx", | |
196 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | |
197 | }, | |
198 | { | |
199 | .name = "gpmc_wait3.uart4_rx", | |
200 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | |
201 | .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2, | |
202 | .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE2, | |
203 | }, | |
204 | }; | |
205 | ||
206 | static struct omap_device_pad default_omap4_uart4_pads[] __initdata = { | |
207 | { | |
208 | .name = "uart4_tx.uart4_tx", | |
209 | .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0, | |
210 | }, | |
211 | { | |
212 | .name = "uart4_rx.uart4_rx", | |
213 | .flags = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP, | |
214 | .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | |
215 | .idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0, | |
216 | }, | |
217 | }; | |
218 | ||
219 | static void omap_serial_fill_default_pads(struct omap_board_data *bdata) | |
220 | { | |
221 | switch (bdata->id) { | |
222 | case 0: | |
223 | bdata->pads = default_uart1_pads; | |
224 | bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads); | |
225 | break; | |
226 | case 1: | |
227 | bdata->pads = default_uart2_pads; | |
228 | bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads); | |
229 | break; | |
230 | case 2: | |
231 | bdata->pads = default_uart3_pads; | |
232 | bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads); | |
233 | break; | |
234 | case 3: | |
235 | if (cpu_is_omap44xx()) { | |
236 | bdata->pads = default_omap4_uart4_pads; | |
237 | bdata->pads_cnt = | |
238 | ARRAY_SIZE(default_omap4_uart4_pads); | |
239 | } else if (cpu_is_omap3630()) { | |
240 | bdata->pads = default_omap36xx_uart4_pads; | |
241 | bdata->pads_cnt = | |
242 | ARRAY_SIZE(default_omap36xx_uart4_pads); | |
243 | } | |
244 | break; | |
245 | default: | |
246 | break; | |
247 | } | |
248 | } | |
249 | #else | |
250 | static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {} | |
251 | #endif | |
252 | ||
3e16f925 | 253 | static int __init omap_serial_early_init(void) |
1dbae815 | 254 | { |
6f251e9d | 255 | int i = 0; |
1dbae815 | 256 | |
6f251e9d KH |
257 | do { |
258 | char oh_name[MAX_UART_HWMOD_NAME_LEN]; | |
259 | struct omap_hwmod *oh; | |
260 | struct omap_uart_state *uart; | |
21b90340 | 261 | |
6f251e9d KH |
262 | snprintf(oh_name, MAX_UART_HWMOD_NAME_LEN, |
263 | "uart%d", i + 1); | |
264 | oh = omap_hwmod_lookup(oh_name); | |
265 | if (!oh) | |
266 | break; | |
267 | ||
268 | uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL); | |
269 | if (WARN_ON(!uart)) | |
3e16f925 | 270 | return -ENODEV; |
1dbae815 | 271 | |
6f251e9d KH |
272 | uart->oh = oh; |
273 | uart->num = i++; | |
274 | list_add_tail(&uart->node, &uart_list); | |
275 | num_uarts++; | |
1dbae815 | 276 | |
84f90c9c | 277 | /* |
550c8092 | 278 | * NOTE: omap_hwmod_setup*() has not yet been called, |
6f251e9d | 279 | * so no hwmod functions will work yet. |
84f90c9c | 280 | */ |
6e81176d | 281 | |
6f251e9d KH |
282 | /* |
283 | * During UART early init, device need to be probed | |
284 | * to determine SoC specific init before omap_device | |
285 | * is ready. Therefore, don't allow idle here | |
286 | */ | |
287 | uart->oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET; | |
288 | } while (1); | |
3e16f925 TL |
289 | |
290 | return 0; | |
b3c6df3a | 291 | } |
3e16f925 | 292 | core_initcall(omap_serial_early_init); |
b3c6df3a | 293 | |
f62349ee MW |
294 | /** |
295 | * omap_serial_init_port() - initialize single serial port | |
40e44399 | 296 | * @bdata: port specific board data pointer |
f62349ee | 297 | * |
40e44399 | 298 | * This function initialies serial driver for given port only. |
f62349ee MW |
299 | * Platforms can call this function instead of omap_serial_init() |
300 | * if they don't plan to use all available UARTs as serial ports. | |
301 | * | |
302 | * Don't mix calls to omap_serial_init_port() and omap_serial_init(), | |
303 | * use only one of the two. | |
304 | */ | |
40e44399 | 305 | void __init omap_serial_init_port(struct omap_board_data *bdata) |
b3c6df3a | 306 | { |
f62349ee | 307 | struct omap_uart_state *uart; |
6f251e9d | 308 | struct omap_hwmod *oh; |
3528c58e | 309 | struct platform_device *pdev; |
6f251e9d KH |
310 | void *pdata = NULL; |
311 | u32 pdata_size = 0; | |
312 | char *name; | |
6f251e9d | 313 | struct omap_uart_port_info omap_up; |
970a724d | 314 | |
40e44399 | 315 | if (WARN_ON(!bdata)) |
6f251e9d | 316 | return; |
40e44399 TL |
317 | if (WARN_ON(bdata->id < 0)) |
318 | return; | |
319 | if (WARN_ON(bdata->id >= num_uarts)) | |
e88d556d | 320 | return; |
f62349ee | 321 | |
6f251e9d | 322 | list_for_each_entry(uart, &uart_list, node) |
40e44399 | 323 | if (bdata->id == uart->num) |
6f251e9d | 324 | break; |
f2eeeae0 | 325 | |
6f251e9d | 326 | oh = uart->oh; |
6f251e9d KH |
327 | name = DRIVER_NAME; |
328 | ||
329 | omap_up.dma_enabled = uart->dma_enabled; | |
330 | omap_up.uartclk = OMAP24XX_BASE_BAUD * 16; | |
273558b3 | 331 | omap_up.flags = UPF_BOOT_AUTOCONF; |
ec3bebc6 | 332 | omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count; |
94734749 G |
333 | omap_up.set_forceidle = omap_uart_set_forceidle; |
334 | omap_up.set_noidle = omap_uart_set_noidle; | |
62f3ec5f | 335 | omap_up.enable_wakeup = omap_uart_enable_wakeup; |
94734749 G |
336 | |
337 | /* Enable the MDR1 Errata i202 for OMAP2430/3xxx/44xx */ | |
338 | if (!cpu_is_omap2420() && !cpu_is_ti816x()) | |
339 | omap_up.errata |= UART_ERRATA_i202_MDR1_ACCESS; | |
340 | ||
341 | /* Enable DMA Mode Force Idle Errata i291 for omap34xx/3630 */ | |
342 | if (cpu_is_omap34xx() || cpu_is_omap3630()) | |
343 | omap_up.errata |= UART_ERRATA_i291_DMA_FORCEIDLE; | |
6f251e9d KH |
344 | |
345 | pdata = &omap_up; | |
346 | pdata_size = sizeof(struct omap_uart_port_info); | |
6f251e9d KH |
347 | |
348 | if (WARN_ON(!oh)) | |
349 | return; | |
350 | ||
3528c58e | 351 | pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size, |
f718e2c0 | 352 | NULL, 0, false); |
3528c58e | 353 | WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n", |
6f251e9d KH |
354 | name, oh->name); |
355 | ||
9f8b6949 | 356 | omap_device_disable_idle_on_suspend(pdev); |
40e44399 TL |
357 | oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt); |
358 | ||
3528c58e | 359 | uart->pdev = pdev; |
6f251e9d KH |
360 | |
361 | oh->dev_attr = uart; | |
362 | ||
ac751efa | 363 | console_lock(); /* in case the earlycon is on the UART */ |
0d8e2d0d | 364 | |
6f251e9d KH |
365 | /* |
366 | * Because of early UART probing, UART did not get idled | |
367 | * on init. Now that omap_device is ready, ensure full idle | |
368 | * before doing omap_device_enable(). | |
369 | */ | |
370 | omap_hwmod_idle(uart->oh); | |
371 | ||
372 | omap_device_enable(uart->pdev); | |
6f251e9d KH |
373 | omap_device_idle(uart->pdev); |
374 | ||
ac751efa | 375 | console_unlock(); |
0d8e2d0d | 376 | |
62f3ec5f | 377 | if ((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) |
3528c58e | 378 | device_init_wakeup(&pdev->dev, true); |
f62349ee MW |
379 | } |
380 | ||
381 | /** | |
b595076a | 382 | * omap_serial_init() - initialize all supported serial ports |
f62349ee MW |
383 | * |
384 | * Initializes all available UARTs as serial ports. Platforms | |
385 | * can call this function when they want to have default behaviour | |
386 | * for serial ports (e.g initialize them all as serial ports). | |
387 | */ | |
388 | void __init omap_serial_init(void) | |
389 | { | |
6f251e9d | 390 | struct omap_uart_state *uart; |
40e44399 | 391 | struct omap_board_data bdata; |
f62349ee | 392 | |
40e44399 TL |
393 | list_for_each_entry(uart, &uart_list, node) { |
394 | bdata.id = uart->num; | |
395 | bdata.flags = 0; | |
396 | bdata.pads = NULL; | |
397 | bdata.pads_cnt = 0; | |
7496ba30 G |
398 | |
399 | if (cpu_is_omap44xx() || cpu_is_omap34xx()) | |
400 | omap_serial_fill_default_pads(&bdata); | |
401 | ||
40e44399 TL |
402 | omap_serial_init_port(&bdata); |
403 | ||
404 | } | |
1dbae815 | 405 | } |