[deliverable/linux.git] / arch / arm / mach-omap2 / serial.c

/*
 * arch/arm/mach-omap2/serial.c
 *
 * OMAP2 serial support.
 *
 * Copyright (C) 2005-2008 Nokia Corporation
 * Author: Paul Mundt <paul.mundt@nokia.com>
 *
 * Major rework for PM support by Kevin Hilman
 *
 * Based off of arch/arm/mach-omap/omap1/serial.c
 *
 * Copyright (C) 2009 Texas Instruments
 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License. See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/pm_runtime.h>
#include <linux/console.h>

#include <plat/omap-serial.h>
#include "common.h"
#include <plat/board.h>
#include <plat/dma.h>
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
#include <plat/omap-pm.h>

#include "prm2xxx_3xxx.h"
#include "pm.h"
#include "cm2xxx_3xxx.h"
#include "prm-regbits-34xx.h"
#include "control.h"
#include "mux.h"

/*
 * NOTE: By default the serial auto_suspend timeout is disabled as it causes
 * lost characters over the serial ports. This means that the UART clocks will
 * stay on until power/autosuspend_delay is set for the uart from sysfs.
 * This also causes that any deeper omap sleep states are blocked.
 */
#define DEFAULT_AUTOSUSPEND_DELAY	-1

#define MAX_UART_HWMOD_NAME_LEN		16

struct omap_uart_state {
	int num;
	int can_sleep;

	struct list_head node;
	struct omap_hwmod *oh;
	struct platform_device *pdev;
};

static LIST_HEAD(uart_list);
static u8 num_uarts;

#define DEFAULT_RXDMA_POLLRATE		1	/* RX DMA polling rate (us) */
#define DEFAULT_RXDMA_BUFSIZE		4096	/* RX DMA buffer size */
#define DEFAULT_RXDMA_TIMEOUT		(3 * HZ)/* RX DMA timeout (jiffies) */

static struct omap_uart_port_info omap_serial_default_info[] __initdata = {
	{
		.dma_enabled	= false,
		.dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE,
		.dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE,
		.dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT,
		.autosuspend_timeout = DEFAULT_AUTOSUSPEND_DELAY,
	},
};

#ifdef CONFIG_PM

int omap_uart_can_sleep(void)
{
	struct omap_uart_state *uart;
	int can_sleep = 1;

	list_for_each_entry(uart, &uart_list, node) {
		if (!uart->clocked)
			continue;

		if (!uart->can_sleep) {
			can_sleep = 0;
			continue;
		}

		/* This UART can now safely sleep. */
		omap_uart_allow_sleep(uart);
	}

	return can_sleep;
}

static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
{
	struct omap_device *od = to_omap_device(pdev);

	if (!od)
		return;

	if (enable)
		omap_hwmod_enable_wakeup(od->hwmods[0]);
	else
		omap_hwmod_disable_wakeup(od->hwmods[0]);
}

/*
 * Errata i291: [UART]:Cannot Acknowledge Idle Requests
 * in Smartidle Mode When Configured for DMA Operations.
 * WA: configure uart in force idle mode.
 */
static void omap_uart_set_noidle(struct platform_device *pdev)
{
	struct omap_device *od = to_omap_device(pdev);

	omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
}

static void omap_uart_set_forceidle(struct platform_device *pdev)
{
	struct omap_device *od = to_omap_device(pdev);

	omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_FORCE);
}

#else
static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
{}
static void omap_uart_set_noidle(struct platform_device *pdev) {}
static void omap_uart_set_forceidle(struct platform_device *pdev) {}
#endif /* CONFIG_PM */

#ifdef CONFIG_OMAP_MUX
static struct omap_device_pad default_uart1_pads[] __initdata = {
	{
		.name	= "uart1_cts.uart1_cts",
		.enable	= OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
	},
	{
		.name	= "uart1_rts.uart1_rts",
		.enable	= OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
	},
	{
		.name	= "uart1_tx.uart1_tx",
		.enable	= OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
	},
	{
		.name	= "uart1_rx.uart1_rx",
		.flags	= OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
		.enable	= OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
		.idle	= OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
	},
};

static struct omap_device_pad default_uart2_pads[] __initdata = {
	{
		.name	= "uart2_cts.uart2_cts",
		.enable	= OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
	},
	{
		.name	= "uart2_rts.uart2_rts",
		.enable	= OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
	},
	{
		.name	= "uart2_tx.uart2_tx",
		.enable	= OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
	},
	{
		.name	= "uart2_rx.uart2_rx",
		.flags	= OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
		.enable	= OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
		.idle	= OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
	},
};

static struct omap_device_pad default_uart3_pads[] __initdata = {
	{
		.name	= "uart3_cts_rctx.uart3_cts_rctx",
		.enable	= OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
	},
	{
		.name	= "uart3_rts_sd.uart3_rts_sd",
		.enable	= OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
	},
	{
		.name	= "uart3_tx_irtx.uart3_tx_irtx",
		.enable	= OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
	},
	{
		.name	= "uart3_rx_irrx.uart3_rx_irrx",
		.flags	= OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
		.enable	= OMAP_PIN_INPUT | OMAP_MUX_MODE0,
		.idle	= OMAP_PIN_INPUT | OMAP_MUX_MODE0,
	},
};

static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
	{
		.name   = "gpmc_wait2.uart4_tx",
		.enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
	},
	{
		.name	= "gpmc_wait3.uart4_rx",
		.flags	= OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
		.enable	= OMAP_PIN_INPUT | OMAP_MUX_MODE2,
		.idle	= OMAP_PIN_INPUT | OMAP_MUX_MODE2,
	},
};

static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
	{
		.name	= "uart4_tx.uart4_tx",
		.enable	= OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
	},
	{
		.name	= "uart4_rx.uart4_rx",
		.flags	= OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
		.enable	= OMAP_PIN_INPUT | OMAP_MUX_MODE0,
		.idle	= OMAP_PIN_INPUT | OMAP_MUX_MODE0,
	},
};

static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
{
	switch (bdata->id) {
	case 0:
		bdata->pads = default_uart1_pads;
		bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
		break;
	case 1:
		bdata->pads = default_uart2_pads;
		bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
		break;
	case 2:
		bdata->pads = default_uart3_pads;
		bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
		break;
	case 3:
		if (cpu_is_omap44xx()) {
			bdata->pads = default_omap4_uart4_pads;
			bdata->pads_cnt =
				ARRAY_SIZE(default_omap4_uart4_pads);
		} else if (cpu_is_omap3630()) {
			bdata->pads = default_omap36xx_uart4_pads;
			bdata->pads_cnt =
				ARRAY_SIZE(default_omap36xx_uart4_pads);
		}
		break;
	default:
		break;
	}
}
#else
static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
#endif

static int __init omap_serial_early_init(void)
{
	do {
		char oh_name[MAX_UART_HWMOD_NAME_LEN];
		struct omap_hwmod *oh;
		struct omap_uart_state *uart;

		snprintf(oh_name, MAX_UART_HWMOD_NAME_LEN,
			 "uart%d", num_uarts + 1);
		oh = omap_hwmod_lookup(oh_name);
		if (!oh)
			break;

		uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL);
		if (WARN_ON(!uart))
			return -ENODEV;

		uart->oh = oh;
		uart->num = num_uarts++;
		list_add_tail(&uart->node, &uart_list);

		/*
		 * NOTE: omap_hwmod_setup*() has not yet been called,
		 *       so no hwmod functions will work yet.
		 */

		/*
		 * During UART early init, device need to be probed
		 * to determine SoC specific init before omap_device
		 * is ready.  Therefore, don't allow idle here
		 */
		uart->oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET;
	} while (1);

	return 0;
}
core_initcall(omap_serial_early_init);

/**
 * omap_serial_init_port() - initialize single serial port
 * @bdata: port specific board data pointer
 * @info: platform specific data pointer
 *
 * This function initialies serial driver for given port only.
 * Platforms can call this function instead of omap_serial_init()
 * if they don't plan to use all available UARTs as serial ports.
 *
 * Don't mix calls to omap_serial_init_port() and omap_serial_init(),
 * use only one of the two.
 */
void __init omap_serial_init_port(struct omap_board_data *bdata,
			struct omap_uart_port_info *info)
{
	struct omap_uart_state *uart;
	struct omap_hwmod *oh;
	struct platform_device *pdev;
	void *pdata = NULL;
	u32 pdata_size = 0;
	char *name;
	struct omap_uart_port_info omap_up;

	if (WARN_ON(!bdata))
		return;
	if (WARN_ON(bdata->id < 0))
		return;
	if (WARN_ON(bdata->id >= num_uarts))
		return;

	list_for_each_entry(uart, &uart_list, node)
		if (bdata->id == uart->num)
			break;
	if (!info)
		info = omap_serial_default_info;

	oh = uart->oh;
	name = DRIVER_NAME;

	omap_up.dma_enabled = info->dma_enabled;
	omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
	omap_up.flags = UPF_BOOT_AUTOCONF;
	omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count;
	omap_up.set_forceidle = omap_uart_set_forceidle;
	omap_up.set_noidle = omap_uart_set_noidle;
	omap_up.enable_wakeup = omap_uart_enable_wakeup;
	omap_up.dma_rx_buf_size = info->dma_rx_buf_size;
	omap_up.dma_rx_timeout = info->dma_rx_timeout;
	omap_up.dma_rx_poll_rate = info->dma_rx_poll_rate;
	omap_up.autosuspend_timeout = info->autosuspend_timeout;

	/* Enable the MDR1 Errata i202 for OMAP2430/3xxx/44xx */
	if (!cpu_is_omap2420() && !cpu_is_ti816x())
		omap_up.errata |= UART_ERRATA_i202_MDR1_ACCESS;

	/* Enable DMA Mode Force Idle Errata i291 for omap34xx/3630 */
	if (cpu_is_omap34xx() || cpu_is_omap3630())
		omap_up.errata |= UART_ERRATA_i291_DMA_FORCEIDLE;

	pdata = &omap_up;
	pdata_size = sizeof(struct omap_uart_port_info);

	if (WARN_ON(!oh))
		return;

	pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size,
				 NULL, 0, false);
	WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n",
	     name, oh->name);

	omap_device_disable_idle_on_suspend(pdev);
	oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);

	uart->pdev = pdev;

	oh->dev_attr = uart;

	console_lock(); /* in case the earlycon is on the UART */

	/*
	 * Because of early UART probing, UART did not get idled
	 * on init.  Now that omap_device is ready, ensure full idle
	 * before doing omap_device_enable().
	 */
	omap_hwmod_idle(uart->oh);

	omap_device_enable(uart->pdev);
	omap_device_idle(uart->pdev);

	console_unlock();

	if ((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads)
		device_init_wakeup(&pdev->dev, true);
}

/**
 * omap_serial_board_init() - initialize all supported serial ports
 * @info: platform specific data pointer
 *
 * Initializes all available UARTs as serial ports. Platforms
 * can call this function when they want to have default behaviour
 * for serial ports (e.g initialize them all as serial ports).
 */
void __init omap_serial_board_init(struct omap_uart_port_info *info)
{
	struct omap_uart_state *uart;
	struct omap_board_data bdata;

	list_for_each_entry(uart, &uart_list, node) {
		bdata.id = uart->num;
		bdata.flags = 0;
		bdata.pads = NULL;
		bdata.pads_cnt = 0;

		if (cpu_is_omap44xx() || cpu_is_omap34xx())
			omap_serial_fill_default_pads(&bdata);

		if (!info)
			omap_serial_init_port(&bdata, NULL);
		else
			omap_serial_init_port(&bdata, &info[uart->num]);
	}
}

/**
 * omap_serial_init() - initialize all supported serial ports
 *
 * Initializes all available UARTs.
 * Platforms can call this function when they want to have default behaviour
 * for serial ports (e.g initialize them all as serial ports).
 */
void __init omap_serial_init(void)
{
	omap_serial_board_init(NULL);
}
Commit	Line	Data
1dbae815	1	/*
f30c2269	2	* arch/arm/mach-omap2/serial.c
1dbae815 TL	3	*
	4	* OMAP2 serial support.
	5	*
6e81176d	6	* Copyright (C) 2005-2008 Nokia Corporation
1dbae815 TL	7	* Author: Paul Mundt <paul.mundt@nokia.com>
1dbae815 TL	8	*
4af4016c KH	9	* Major rework for PM support by Kevin Hilman
4af4016c KH	10	*
1dbae815 TL	11	* Based off of arch/arm/mach-omap/omap1/serial.c
1dbae815 TL	12	*
44169075 SS	13	* Copyright (C) 2009 Texas Instruments
	14	* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com
	15	*
1dbae815 TL	16	* This file is subject to the terms and conditions of the GNU General Public
	17	* License. See the file "COPYING" in the main directory of this archive
	18	* for more details.
	19	*/
	20	#include <linux/kernel.h>
	21	#include <linux/init.h>
f8ce2547	22	#include <linux/clk.h>
fced80c7	23	#include <linux/io.h>
e03d37d8	24	#include <linux/delay.h>
6f251e9d KH	25	#include <linux/platform_device.h>
6f251e9d KH	26	#include <linux/slab.h>
3244fcd2	27	#include <linux/pm_runtime.h>
0d8e2d0d	28	#include <linux/console.h>
6f251e9d	29
6f251e9d	30	#include <plat/omap-serial.h>
4e65331c	31	#include "common.h"
ce491cf8	32	#include <plat/board.h>
6f251e9d KH	33	#include <plat/dma.h>
	34	#include <plat/omap_hwmod.h>
	35	#include <plat/omap_device.h>
ec3bebc6	36	#include <plat/omap-pm.h>
4af4016c	37
59fb659b	38	#include "prm2xxx_3xxx.h"
4af4016c	39	#include "pm.h"
59fb659b	40	#include "cm2xxx_3xxx.h"
4af4016c	41	#include "prm-regbits-34xx.h"
4814ced5	42	#include "control.h"
40e44399	43	#include "mux.h"
4af4016c	44
301fe8ee	45	/*
c86845db D	46	* NOTE: By default the serial auto_suspend timeout is disabled as it causes
	47	* lost characters over the serial ports. This means that the UART clocks will
	48	* stay on until power/autosuspend_delay is set for the uart from sysfs.
	49	* This also causes that any deeper omap sleep states are blocked.
301fe8ee	50	*/
c86845db	51	#define DEFAULT_AUTOSUSPEND_DELAY -1
4af4016c	52
6f251e9d KH	53	#define MAX_UART_HWMOD_NAME_LEN 16
6f251e9d KH	54
4af4016c KH	55	struct omap_uart_state {
	56	int num;
	57	int can_sleep;
4af4016c	58
4af4016c	59	struct list_head node;
6f251e9d KH	60	struct omap_hwmod *oh;
6f251e9d KH	61	struct platform_device *pdev;
4af4016c KH	62	};
4af4016c KH	63
4af4016c	64	static LIST_HEAD(uart_list);
6f251e9d	65	static u8 num_uarts;
1dbae815	66
a9e210e0	67	#define DEFAULT_RXDMA_POLLRATE 1 /* RX DMA polling rate (us) */
c86845db	68	#define DEFAULT_RXDMA_BUFSIZE 4096 /* RX DMA buffer size */
a9e210e0	69	#define DEFAULT_RXDMA_TIMEOUT (3 * HZ)/* RX DMA timeout (jiffies) */
c86845db D	70
	71	static struct omap_uart_port_info omap_serial_default_info[] __initdata = {
	72	{
	73	.dma_enabled = false,
	74	.dma_rx_buf_size = DEFAULT_RXDMA_BUFSIZE,
a9e210e0	75	.dma_rx_poll_rate = DEFAULT_RXDMA_POLLRATE,
c86845db D	76	.dma_rx_timeout = DEFAULT_RXDMA_TIMEOUT,
	77	.autosuspend_timeout = DEFAULT_AUTOSUSPEND_DELAY,
	78	},
	79	};
	80
4af4016c KH	81	#ifdef CONFIG_PM
4af4016c KH	82
4af4016c KH	83	int omap_uart_can_sleep(void)
	84	{
	85	struct omap_uart_state *uart;
	86	int can_sleep = 1;
	87
	88	list_for_each_entry(uart, &uart_list, node) {
	89	if (!uart->clocked)
	90	continue;
	91
	92	if (!uart->can_sleep) {
	93	can_sleep = 0;
	94	continue;
6e81176d	95	}
4af4016c KH	96
	97	/* This UART can now safely sleep. */
	98	omap_uart_allow_sleep(uart);
6e81176d	99	}
4af4016c KH	100
4af4016c KH	101	return can_sleep;
6e81176d JH	102	}
6e81176d JH	103
62f3ec5f	104	static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
4af4016c	105	{
62f3ec5f	106	struct omap_device *od = to_omap_device(pdev);
4af4016c	107
62f3ec5f G	108	if (!od)
62f3ec5f G	109	return;
4af4016c	110
62f3ec5f G	111	if (enable)
	112	omap_hwmod_enable_wakeup(od->hwmods[0]);
	113	else
	114	omap_hwmod_disable_wakeup(od->hwmods[0]);
ba87a9be JH	115	}
ba87a9be JH	116
94734749 G	117	/*
	118	* Errata i291: [UART]:Cannot Acknowledge Idle Requests
	119	* in Smartidle Mode When Configured for DMA Operations.
	120	* WA: configure uart in force idle mode.
	121	*/
	122	static void omap_uart_set_noidle(struct platform_device *pdev)
	123	{
	124	struct omap_device *od = to_omap_device(pdev);
	125
	126	omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
	127	}
	128
	129	static void omap_uart_set_forceidle(struct platform_device *pdev)
	130	{
	131	struct omap_device *od = to_omap_device(pdev);
	132
	133	omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_FORCE);
	134	}
	135
4af4016c	136	#else
62f3ec5f G	137	static void omap_uart_enable_wakeup(struct platform_device *pdev, bool enable)
62f3ec5f G	138	{}
94734749 G	139	static void omap_uart_set_noidle(struct platform_device *pdev) {}
94734749 G	140	static void omap_uart_set_forceidle(struct platform_device *pdev) {}
4af4016c KH	141	#endif /* CONFIG_PM */
4af4016c KH	142
7496ba30 G	143	#ifdef CONFIG_OMAP_MUX
	144	static struct omap_device_pad default_uart1_pads[] __initdata = {
	145	{
	146	.name = "uart1_cts.uart1_cts",
	147	.enable = OMAP_PIN_INPUT_PULLUP \| OMAP_MUX_MODE0,
	148	},
	149	{
	150	.name = "uart1_rts.uart1_rts",
	151	.enable = OMAP_PIN_OUTPUT \| OMAP_MUX_MODE0,
	152	},
	153	{
	154	.name = "uart1_tx.uart1_tx",
	155	.enable = OMAP_PIN_OUTPUT \| OMAP_MUX_MODE0,
	156	},
	157	{
	158	.name = "uart1_rx.uart1_rx",
	159	.flags = OMAP_DEVICE_PAD_REMUX \| OMAP_DEVICE_PAD_WAKEUP,
	160	.enable = OMAP_PIN_INPUT_PULLUP \| OMAP_MUX_MODE0,
	161	.idle = OMAP_PIN_INPUT_PULLUP \| OMAP_MUX_MODE0,
	162	},
	163	};
	164
	165	static struct omap_device_pad default_uart2_pads[] __initdata = {
	166	{
	167	.name = "uart2_cts.uart2_cts",
	168	.enable = OMAP_PIN_INPUT_PULLUP \| OMAP_MUX_MODE0,
	169	},
	170	{
	171	.name = "uart2_rts.uart2_rts",
	172	.enable = OMAP_PIN_OUTPUT \| OMAP_MUX_MODE0,
	173	},
	174	{
	175	.name = "uart2_tx.uart2_tx",
	176	.enable = OMAP_PIN_OUTPUT \| OMAP_MUX_MODE0,
	177	},
	178	{
	179	.name = "uart2_rx.uart2_rx",
	180	.flags = OMAP_DEVICE_PAD_REMUX \| OMAP_DEVICE_PAD_WAKEUP,
	181	.enable = OMAP_PIN_INPUT_PULLUP \| OMAP_MUX_MODE0,
	182	.idle = OMAP_PIN_INPUT_PULLUP \| OMAP_MUX_MODE0,
	183	},
	184	};
	185
	186	static struct omap_device_pad default_uart3_pads[] __initdata = {
	187	{
	188	.name = "uart3_cts_rctx.uart3_cts_rctx",
	189	.enable = OMAP_PIN_INPUT_PULLUP \| OMAP_MUX_MODE0,
	190	},
	191	{
	192	.name = "uart3_rts_sd.uart3_rts_sd",
	193	.enable = OMAP_PIN_OUTPUT \| OMAP_MUX_MODE0,
	194	},
	195	{
	196	.name = "uart3_tx_irtx.uart3_tx_irtx",
	197	.enable = OMAP_PIN_OUTPUT \| OMAP_MUX_MODE0,
	198	},
	199	{
	200	.name = "uart3_rx_irrx.uart3_rx_irrx",
	201	.flags = OMAP_DEVICE_PAD_REMUX \| OMAP_DEVICE_PAD_WAKEUP,
	202	.enable = OMAP_PIN_INPUT \| OMAP_MUX_MODE0,
	203	.idle = OMAP_PIN_INPUT \| OMAP_MUX_MODE0,
	204	},
	205	};
	206
207	static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
208	{
209	.name = "gpmc_wait2.uart4_tx",
210	.enable = OMAP_PIN_OUTPUT \| OMAP_MUX_MODE0,
211	},
212	{
213	.name = "gpmc_wait3.uart4_rx",
214	.flags = OMAP_DEVICE_PAD_REMUX \| OMAP_DEVICE_PAD_WAKEUP,
215	.enable = OMAP_PIN_INPUT \| OMAP_MUX_MODE2,
216	.idle = OMAP_PIN_INPUT \| OMAP_MUX_MODE2,
217	},
218	};
219
220	static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
221	{
222	.name = "uart4_tx.uart4_tx",
223	.enable = OMAP_PIN_OUTPUT \| OMAP_MUX_MODE0,
224	},
225	{
226	.name = "uart4_rx.uart4_rx",
227	.flags = OMAP_DEVICE_PAD_REMUX \| OMAP_DEVICE_PAD_WAKEUP,
228	.enable = OMAP_PIN_INPUT \| OMAP_MUX_MODE0,
229	.idle = OMAP_PIN_INPUT \| OMAP_MUX_MODE0,
230	},
231	};
232
233	static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
234	{
235	switch (bdata->id) {
236	case 0:
237	bdata->pads = default_uart1_pads;
238	bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
239	break;
240	case 1:
241	bdata->pads = default_uart2_pads;
242	bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
243	break;
244	case 2:
245	bdata->pads = default_uart3_pads;
246	bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
247	break;
248	case 3:
249	if (cpu_is_omap44xx()) {
250	bdata->pads = default_omap4_uart4_pads;
251	bdata->pads_cnt =
252	ARRAY_SIZE(default_omap4_uart4_pads);
253	} else if (cpu_is_omap3630()) {
254	bdata->pads = default_omap36xx_uart4_pads;
255	bdata->pads_cnt =
256	ARRAY_SIZE(default_omap36xx_uart4_pads);
257	}
258	break;
259	default:
260	break;
261	}
262	}
263	#else
264	static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
265	#endif
266
3e16f925	267	static int __init omap_serial_early_init(void)
1dbae815	268	{
6f251e9d KH	269	do {
	270	char oh_name[MAX_UART_HWMOD_NAME_LEN];
	271	struct omap_hwmod *oh;
	272	struct omap_uart_state *uart;
21b90340	273
6f251e9d	274	snprintf(oh_name, MAX_UART_HWMOD_NAME_LEN,
969996a5	275	"uart%d", num_uarts + 1);
6f251e9d KH	276	oh = omap_hwmod_lookup(oh_name);
	277	if (!oh)
	278	break;
	279
	280	uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL);
	281	if (WARN_ON(!uart))
3e16f925	282	return -ENODEV;
1dbae815	283
6f251e9d	284	uart->oh = oh;
969996a5	285	uart->num = num_uarts++;
6f251e9d	286	list_add_tail(&uart->node, &uart_list);
1dbae815	287
84f90c9c	288	/*
550c8092	289	* NOTE: omap_hwmod_setup*() has not yet been called,
6f251e9d	290	* so no hwmod functions will work yet.
84f90c9c	291	*/
6e81176d	292
6f251e9d KH	293	/*
	294	* During UART early init, device need to be probed
	295	* to determine SoC specific init before omap_device
	296	* is ready. Therefore, don't allow idle here
	297	*/
	298	uart->oh->flags \|= HWMOD_INIT_NO_IDLE \| HWMOD_INIT_NO_RESET;
	299	} while (1);
3e16f925 TL	300
3e16f925 TL	301	return 0;
b3c6df3a	302	}
3e16f925	303	core_initcall(omap_serial_early_init);
b3c6df3a	304
f62349ee MW	305	/**
f62349ee MW	306	* omap_serial_init_port() - initialize single serial port
40e44399	307	* @bdata: port specific board data pointer
c86845db	308	* @info: platform specific data pointer
f62349ee	309	*
40e44399	310	* This function initialies serial driver for given port only.
f62349ee MW	311	* Platforms can call this function instead of omap_serial_init()
	312	* if they don't plan to use all available UARTs as serial ports.
	313	*
	314	* Don't mix calls to omap_serial_init_port() and omap_serial_init(),
	315	* use only one of the two.
	316	*/
c86845db D	317	void __init omap_serial_init_port(struct omap_board_data *bdata,
c86845db D	318	struct omap_uart_port_info *info)
b3c6df3a	319	{
f62349ee	320	struct omap_uart_state *uart;
6f251e9d	321	struct omap_hwmod *oh;
3528c58e	322	struct platform_device *pdev;
6f251e9d KH	323	void *pdata = NULL;
	324	u32 pdata_size = 0;
	325	char *name;
6f251e9d	326	struct omap_uart_port_info omap_up;
970a724d	327
40e44399	328	if (WARN_ON(!bdata))
6f251e9d	329	return;
40e44399 TL	330	if (WARN_ON(bdata->id < 0))
	331	return;
	332	if (WARN_ON(bdata->id >= num_uarts))
e88d556d	333	return;
f62349ee	334
6f251e9d	335	list_for_each_entry(uart, &uart_list, node)
40e44399	336	if (bdata->id == uart->num)
6f251e9d	337	break;
c86845db D	338	if (!info)
c86845db D	339	info = omap_serial_default_info;
f2eeeae0	340
6f251e9d	341	oh = uart->oh;
6f251e9d KH	342	name = DRIVER_NAME;
6f251e9d KH	343
c86845db	344	omap_up.dma_enabled = info->dma_enabled;
6f251e9d	345	omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
273558b3	346	omap_up.flags = UPF_BOOT_AUTOCONF;
ec3bebc6	347	omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count;
94734749 G	348	omap_up.set_forceidle = omap_uart_set_forceidle;
94734749 G	349	omap_up.set_noidle = omap_uart_set_noidle;
62f3ec5f	350	omap_up.enable_wakeup = omap_uart_enable_wakeup;
c86845db D	351	omap_up.dma_rx_buf_size = info->dma_rx_buf_size;
c86845db D	352	omap_up.dma_rx_timeout = info->dma_rx_timeout;
a9e210e0	353	omap_up.dma_rx_poll_rate = info->dma_rx_poll_rate;
c86845db	354	omap_up.autosuspend_timeout = info->autosuspend_timeout;
94734749 G	355
	356	/* Enable the MDR1 Errata i202 for OMAP2430/3xxx/44xx */
	357	if (!cpu_is_omap2420() && !cpu_is_ti816x())
	358	omap_up.errata \|= UART_ERRATA_i202_MDR1_ACCESS;
	359
	360	/* Enable DMA Mode Force Idle Errata i291 for omap34xx/3630 */
	361	if (cpu_is_omap34xx() \|\| cpu_is_omap3630())
	362	omap_up.errata \|= UART_ERRATA_i291_DMA_FORCEIDLE;
6f251e9d KH	363
	364	pdata = &omap_up;
	365	pdata_size = sizeof(struct omap_uart_port_info);
6f251e9d KH	366
	367	if (WARN_ON(!oh))
	368	return;
	369
3528c58e	370	pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size,
f718e2c0	371	NULL, 0, false);
3528c58e	372	WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n",
6f251e9d KH	373	name, oh->name);
6f251e9d KH	374
9f8b6949	375	omap_device_disable_idle_on_suspend(pdev);
40e44399 TL	376	oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
40e44399 TL	377
3528c58e	378	uart->pdev = pdev;
6f251e9d KH	379
	380	oh->dev_attr = uart;
	381
ac751efa	382	console_lock(); /* in case the earlycon is on the UART */
0d8e2d0d	383
6f251e9d KH	384	/*
	385	* Because of early UART probing, UART did not get idled
	386	* on init. Now that omap_device is ready, ensure full idle
	387	* before doing omap_device_enable().
	388	*/
	389	omap_hwmod_idle(uart->oh);
	390
	391	omap_device_enable(uart->pdev);
6f251e9d KH	392	omap_device_idle(uart->pdev);
6f251e9d KH	393
ac751efa	394	console_unlock();
0d8e2d0d	395
62f3ec5f	396	if ((cpu_is_omap34xx() \|\| cpu_is_omap44xx()) && bdata->pads)
3528c58e	397	device_init_wakeup(&pdev->dev, true);
f62349ee MW	398	}
	399
	400	/**
c86845db D	401	* omap_serial_board_init() - initialize all supported serial ports
c86845db D	402	* @info: platform specific data pointer
f62349ee MW	403	*
	404	* Initializes all available UARTs as serial ports. Platforms
	405	* can call this function when they want to have default behaviour
	406	* for serial ports (e.g initialize them all as serial ports).
	407	*/
c86845db	408	void __init omap_serial_board_init(struct omap_uart_port_info *info)
f62349ee	409	{
6f251e9d	410	struct omap_uart_state *uart;
40e44399	411	struct omap_board_data bdata;
f62349ee	412
40e44399 TL	413	list_for_each_entry(uart, &uart_list, node) {
	414	bdata.id = uart->num;
	415	bdata.flags = 0;
	416	bdata.pads = NULL;
	417	bdata.pads_cnt = 0;
7496ba30 G	418
	419	if (cpu_is_omap44xx() \|\| cpu_is_omap34xx())
	420	omap_serial_fill_default_pads(&bdata);
	421
c86845db D	422	if (!info)
	423	omap_serial_init_port(&bdata, NULL);
	424	else
	425	omap_serial_init_port(&bdata, &info[uart->num]);
40e44399	426	}
1dbae815	427	}
c86845db D	428
	429	/**
	430	* omap_serial_init() - initialize all supported serial ports
	431	*
	432	* Initializes all available UARTs.
	433	* Platforms can call this function when they want to have default behaviour
	434	* for serial ports (e.g initialize them all as serial ports).
	435	*/
	436	void __init omap_serial_init(void)
	437	{
	438	omap_serial_board_init(NULL);
	439	}