[deliverable/linux.git] / arch / arm / mach-omap2 / soc.h

/*
 * OMAP cpu type detection
 *
 * Copyright (C) 2004, 2008 Nokia Corporation
 *
 * Copyright (C) 2009-11 Texas Instruments.
 *
 * Written by Tony Lindgren <tony.lindgren@nokia.com>
 *
 * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
 * Added DRA7xxx specific defines - Sricharan R<r.sricharan@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 *
 */

#include "omap24xx.h"
#include "omap34xx.h"
#include "omap44xx.h"
#include "ti81xx.h"
#include "am33xx.h"
#include "omap54xx.h"

#ifndef __ASSEMBLY__

#include <linux/bitops.h>
#include <linux/of.h>

/*
 * OMAP2+ is always defined as ARCH_MULTIPLATFORM in Kconfig
 */
#undef MULTI_OMAP2
#define MULTI_OMAP2

/*
 * Omap device type i.e. EMU/HS/TST/GP/BAD
 */
#define OMAP2_DEVICE_TYPE_TEST		0
#define OMAP2_DEVICE_TYPE_EMU		1
#define OMAP2_DEVICE_TYPE_SEC		2
#define OMAP2_DEVICE_TYPE_GP		3
#define OMAP2_DEVICE_TYPE_BAD		4

int omap_type(void);

/*
 * omap_rev bits:
 * SoC id bits	(0730, 1510, 1710, 2422...)	[31:16]
 * SoC revision	(See _REV_ defined in cpu.h)	[15:08]
 * SoC class bits (15xx, 16xx, 24xx, 34xx...)	[07:00]
 */
unsigned int omap_rev(void);

static inline int soc_is_omap(void)
{
	return omap_rev() != 0;
}

/*
 * Get the SoC revision for OMAP devices
 */
#define GET_OMAP_REVISION()	((omap_rev() >> 8) & 0xff)

/*
 * Macros to group OMAP into cpu classes.
 * These can be used in most places.
 * soc_is_omap24xx():	True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
 * soc_is_omap242x():	True for OMAP2420, OMAP2422, OMAP2423
 * soc_is_omap243x():	True for OMAP2430
 * soc_is_omap343x():	True for OMAP3430
 * soc_is_omap443x():	True for OMAP4430
 * soc_is_omap446x():	True for OMAP4460
 * soc_is_omap447x():	True for OMAP4470
 * soc_is_omap543x():	True for OMAP5430, OMAP5432
 */
#define GET_OMAP_CLASS	(omap_rev() & 0xff)

#define IS_OMAP_CLASS(class, id)			\
static inline int is_omap ##class (void)		\
{							\
	return (GET_OMAP_CLASS == (id)) ? 1 : 0;	\
}

#define GET_AM_CLASS	((omap_rev() >> 24) & 0xff)

#define IS_AM_CLASS(class, id)				\
static inline int is_am ##class (void)			\
{							\
	return (GET_AM_CLASS == (id)) ? 1 : 0;		\
}

#define GET_TI_CLASS	((omap_rev() >> 24) & 0xff)

#define IS_TI_CLASS(class, id)			\
static inline int is_ti ##class (void)		\
{							\
	return (GET_TI_CLASS == (id)) ? 1 : 0;	\
}

#define GET_DRA_CLASS	((omap_rev() >> 24) & 0xff)

#define IS_DRA_CLASS(class, id)				\
static inline int is_dra ##class (void)			\
{							\
	return (GET_DRA_CLASS == (id)) ? 1 : 0;		\
}

#define GET_OMAP_SUBCLASS	((omap_rev() >> 20) & 0x0fff)

#define IS_OMAP_SUBCLASS(subclass, id)			\
static inline int is_omap ##subclass (void)		\
{							\
	return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;	\
}

#define IS_TI_SUBCLASS(subclass, id)			\
static inline int is_ti ##subclass (void)		\
{							\
	return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;	\
}

#define IS_AM_SUBCLASS(subclass, id)			\
static inline int is_am ##subclass (void)		\
{							\
	return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;	\
}

#define IS_DRA_SUBCLASS(subclass, id)			\
static inline int is_dra ##subclass (void)		\
{							\
	return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0;	\
}

IS_OMAP_CLASS(24xx, 0x24)
IS_OMAP_CLASS(34xx, 0x34)
IS_OMAP_CLASS(44xx, 0x44)
IS_AM_CLASS(35xx, 0x35)
IS_OMAP_CLASS(54xx, 0x54)
IS_AM_CLASS(33xx, 0x33)
IS_AM_CLASS(43xx, 0x43)

IS_TI_CLASS(81xx, 0x81)
IS_DRA_CLASS(7xx, 0x7)

IS_OMAP_SUBCLASS(242x, 0x242)
IS_OMAP_SUBCLASS(243x, 0x243)
IS_OMAP_SUBCLASS(343x, 0x343)
IS_OMAP_SUBCLASS(363x, 0x363)
IS_OMAP_SUBCLASS(443x, 0x443)
IS_OMAP_SUBCLASS(446x, 0x446)
IS_OMAP_SUBCLASS(447x, 0x447)
IS_OMAP_SUBCLASS(543x, 0x543)

IS_TI_SUBCLASS(816x, 0x816)
IS_TI_SUBCLASS(814x, 0x814)
IS_AM_SUBCLASS(335x, 0x335)
IS_AM_SUBCLASS(437x, 0x437)
IS_DRA_SUBCLASS(75x, 0x75)
IS_DRA_SUBCLASS(72x, 0x72)

#define soc_is_ti81xx()			0
#define soc_is_ti816x()			0
#define soc_is_ti814x()			0
#define soc_is_am35xx()			0
#define soc_is_am33xx()			0
#define soc_is_am335x()			0
#define soc_is_am43xx()			0
#define soc_is_am437x()			0
#define soc_is_omap44xx()		0
#define soc_is_omap443x()		0
#define soc_is_omap446x()		0
#define soc_is_omap447x()		0
#define soc_is_omap54xx()		0
#define soc_is_omap543x()		0
#define soc_is_dra7xx()			0
#define soc_is_dra74x()			0
#define soc_is_dra72x()			0

#if defined(CONFIG_ARCH_OMAP2)
# define soc_is_omap24xx()		is_omap24xx()
#else
# define soc_is_omap24xx()		0
#endif
#if defined(CONFIG_SOC_OMAP2420)
# define soc_is_omap242x()		is_omap242x()
#else
# define soc_is_omap242x()		0
#endif
#if defined(CONFIG_SOC_OMAP2430)
# define soc_is_omap243x()		is_omap243x()
#else
# define soc_is_omap243x()		0
#endif
#if defined(CONFIG_ARCH_OMAP3)
# define soc_is_omap34xx()		is_omap34xx()
# define soc_is_omap343x()		is_omap343x()
#else
# define soc_is_omap34xx()		0
# define soc_is_omap343x()		0
#endif

/*
 * Macros to detect individual cpu types.
 * These are only rarely needed.
 * soc_is_omap2420():	True for OMAP2420
 * soc_is_omap2422():	True for OMAP2422
 * soc_is_omap2423():	True for OMAP2423
 * soc_is_omap2430():	True for OMAP2430
 * soc_is_omap3430():	True for OMAP3430
 */
#define GET_OMAP_TYPE	((omap_rev() >> 16) & 0xffff)

#define IS_OMAP_TYPE(type, id)				\
static inline int is_omap ##type (void)			\
{							\
	return (GET_OMAP_TYPE == (id)) ? 1 : 0;		\
}

IS_OMAP_TYPE(2420, 0x2420)
IS_OMAP_TYPE(2422, 0x2422)
IS_OMAP_TYPE(2423, 0x2423)
IS_OMAP_TYPE(2430, 0x2430)
IS_OMAP_TYPE(3430, 0x3430)

#define soc_is_omap2420()		0
#define soc_is_omap2422()		0
#define soc_is_omap2423()		0
#define soc_is_omap2430()		0
#define soc_is_omap3430()		0
#define soc_is_omap3630()		0
#define soc_is_omap5430()		0

/* These are needed for the common code */
#define soc_is_omap7xx()		0
#define soc_is_omap15xx()		0
#define soc_is_omap16xx()		0
#define soc_is_omap1510()		0
#define soc_is_omap1610()		0
#define soc_is_omap1611()		0
#define soc_is_omap1621()		0
#define soc_is_omap1710()		0
#define cpu_class_is_omap1()		0
#define cpu_class_is_omap2()		1

#if defined(CONFIG_ARCH_OMAP2)
# undef  soc_is_omap2420
# undef  soc_is_omap2422
# undef  soc_is_omap2423
# undef  soc_is_omap2430
# define soc_is_omap2420()		is_omap2420()
# define soc_is_omap2422()		is_omap2422()
# define soc_is_omap2423()		is_omap2423()
# define soc_is_omap2430()		is_omap2430()
#endif

#if defined(CONFIG_ARCH_OMAP3)
# undef soc_is_omap3430
# undef soc_is_ti81xx
# undef soc_is_ti816x
# undef soc_is_ti814x
# undef soc_is_am35xx
# define soc_is_omap3430()		is_omap3430()
# undef soc_is_omap3630
# define soc_is_omap3630()		is_omap363x()
# define soc_is_ti81xx()		is_ti81xx()
# define soc_is_ti816x()		is_ti816x()
# define soc_is_ti814x()		is_ti814x()
# define soc_is_am35xx()		is_am35xx()
#endif

# if defined(CONFIG_SOC_AM33XX)
# undef soc_is_am33xx
# undef soc_is_am335x
# define soc_is_am33xx()		is_am33xx()
# define soc_is_am335x()		is_am335x()
#endif

#ifdef	CONFIG_SOC_AM43XX
# undef soc_is_am43xx
# undef soc_is_am437x
# define soc_is_am43xx()		is_am43xx()
# define soc_is_am437x()		is_am437x()
#endif

# if defined(CONFIG_ARCH_OMAP4)
# undef soc_is_omap44xx
# undef soc_is_omap443x
# undef soc_is_omap446x
# undef soc_is_omap447x
# define soc_is_omap44xx()		is_omap44xx()
# define soc_is_omap443x()		is_omap443x()
# define soc_is_omap446x()		is_omap446x()
# define soc_is_omap447x()		is_omap447x()
# endif

# if defined(CONFIG_SOC_OMAP5)
# undef soc_is_omap54xx
# undef soc_is_omap543x
# define soc_is_omap54xx()		is_omap54xx()
# define soc_is_omap543x()		is_omap543x()
#endif

#if defined(CONFIG_SOC_DRA7XX)
#undef soc_is_dra7xx
#undef soc_is_dra74x
#undef soc_is_dra72x
#define soc_is_dra7xx()	is_dra7xx()
#define soc_is_dra74x()	is_dra75x()
#define soc_is_dra72x()	is_dra72x()
#endif

/* Various silicon revisions for omap2 */
#define OMAP242X_CLASS		0x24200024
#define OMAP2420_REV_ES1_0	OMAP242X_CLASS
#define OMAP2420_REV_ES2_0	(OMAP242X_CLASS | (0x1 << 8))

#define OMAP243X_CLASS		0x24300024
#define OMAP2430_REV_ES1_0	OMAP243X_CLASS

#define OMAP343X_CLASS		0x34300034
#define OMAP3430_REV_ES1_0	OMAP343X_CLASS
#define OMAP3430_REV_ES2_0	(OMAP343X_CLASS | (0x1 << 8))
#define OMAP3430_REV_ES2_1	(OMAP343X_CLASS | (0x2 << 8))
#define OMAP3430_REV_ES3_0	(OMAP343X_CLASS | (0x3 << 8))
#define OMAP3430_REV_ES3_1	(OMAP343X_CLASS | (0x4 << 8))
#define OMAP3430_REV_ES3_1_2	(OMAP343X_CLASS | (0x5 << 8))

#define OMAP363X_CLASS		0x36300034
#define OMAP3630_REV_ES1_0	OMAP363X_CLASS
#define OMAP3630_REV_ES1_1	(OMAP363X_CLASS | (0x1 << 8))
#define OMAP3630_REV_ES1_2	(OMAP363X_CLASS | (0x2 << 8))

#define TI816X_CLASS		0x81600081
#define TI8168_REV_ES1_0	TI816X_CLASS
#define TI8168_REV_ES1_1	(TI816X_CLASS | (0x1 << 8))
#define TI8168_REV_ES2_0	(TI816X_CLASS | (0x2 << 8))
#define TI8168_REV_ES2_1	(TI816X_CLASS | (0x3 << 8))

#define TI814X_CLASS		0x81400081
#define TI8148_REV_ES1_0	TI814X_CLASS
#define TI8148_REV_ES2_0	(TI814X_CLASS | (0x1 << 8))
#define TI8148_REV_ES2_1	(TI814X_CLASS | (0x2 << 8))

#define AM35XX_CLASS		0x35170034
#define AM35XX_REV_ES1_0	AM35XX_CLASS
#define AM35XX_REV_ES1_1	(AM35XX_CLASS | (0x1 << 8))

#define AM335X_CLASS		0x33500033
#define AM335X_REV_ES1_0	AM335X_CLASS
#define AM335X_REV_ES2_0	(AM335X_CLASS | (0x1 << 8))
#define AM335X_REV_ES2_1	(AM335X_CLASS | (0x2 << 8))

#define AM437X_CLASS		0x43700000
#define AM437X_REV_ES1_0	(AM437X_CLASS | (0x10 << 8))
#define AM437X_REV_ES1_1	(AM437X_CLASS | (0x11 << 8))
#define AM437X_REV_ES1_2	(AM437X_CLASS | (0x12 << 8))

#define OMAP443X_CLASS		0x44300044
#define OMAP4430_REV_ES1_0	(OMAP443X_CLASS | (0x10 << 8))
#define OMAP4430_REV_ES2_0	(OMAP443X_CLASS | (0x20 << 8))
#define OMAP4430_REV_ES2_1	(OMAP443X_CLASS | (0x21 << 8))
#define OMAP4430_REV_ES2_2	(OMAP443X_CLASS | (0x22 << 8))
#define OMAP4430_REV_ES2_3	(OMAP443X_CLASS | (0x23 << 8))

#define OMAP446X_CLASS		0x44600044
#define OMAP4460_REV_ES1_0	(OMAP446X_CLASS | (0x10 << 8))
#define OMAP4460_REV_ES1_1	(OMAP446X_CLASS | (0x11 << 8))

#define OMAP447X_CLASS		0x44700044
#define OMAP4470_REV_ES1_0	(OMAP447X_CLASS | (0x10 << 8))

#define OMAP54XX_CLASS		0x54000054
#define OMAP5430_REV_ES2_0	(OMAP54XX_CLASS | (0x30 << 16) | (0x20 << 8))
#define OMAP5432_REV_ES2_0	(OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))

#define DRA7XX_CLASS		0x07000000
#define DRA752_REV_ES1_0	(DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
#define DRA752_REV_ES1_1	(DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
#define DRA752_REV_ES2_0	(DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
#define DRA722_REV_ES1_0	(DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
#define DRA722_REV_ES1_0	(DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
#define DRA722_REV_ES2_0	(DRA7XX_CLASS | (0x22 << 16) | (0x20 << 8))

void omap2xxx_check_revision(void);
void omap3xxx_check_revision(void);
void omap4xxx_check_revision(void);
void omap5xxx_check_revision(void);
void dra7xxx_check_revision(void);
void omap3xxx_check_features(void);
void ti81xx_check_features(void);
void am33xx_check_features(void);
void omap4xxx_check_features(void);

/*
 * Runtime detection of OMAP3 features
 *
 * OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
 *    family have OS-level control over the I/O chain clock.  This is
 *    to avoid a window during which wakeups could potentially be lost
 *    during powerdomain transitions.  If this bit is set, it
 *    indicates that the chip does support OS-level control of this
 *    feature.
 */
extern u32 omap_features;

#define OMAP3_HAS_L2CACHE		BIT(0)
#define OMAP3_HAS_IVA			BIT(1)
#define OMAP3_HAS_SGX			BIT(2)
#define OMAP3_HAS_NEON			BIT(3)
#define OMAP3_HAS_ISP			BIT(4)
#define OMAP3_HAS_192MHZ_CLK		BIT(5)
#define OMAP3_HAS_IO_WAKEUP		BIT(6)
#define OMAP3_HAS_SDRC			BIT(7)
#define OMAP3_HAS_IO_CHAIN_CTRL		BIT(8)
#define OMAP4_HAS_PERF_SILICON		BIT(9)


#define OMAP3_HAS_FEATURE(feat,flag)			\
static inline unsigned int omap3_has_ ##feat(void)	\
{							\
	return omap_features & OMAP3_HAS_ ##flag;	\
}							\

OMAP3_HAS_FEATURE(l2cache, L2CACHE)
OMAP3_HAS_FEATURE(sgx, SGX)
OMAP3_HAS_FEATURE(iva, IVA)
OMAP3_HAS_FEATURE(neon, NEON)
OMAP3_HAS_FEATURE(isp, ISP)
OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
OMAP3_HAS_FEATURE(sdrc, SDRC)
OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)

/*
 * Runtime detection of OMAP4 features
 */
#define OMAP4_HAS_FEATURE(feat, flag)			\
static inline unsigned int omap4_has_ ##feat(void)	\
{							\
	return omap_features & OMAP4_HAS_ ##flag;	\
}							\

OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON)

/*
 * We need to make sure omap initcalls don't run when
 * multiplatform kernels are booted on other SoCs.
 */
#define omap_initcall(level, fn)		\
static int __init __used __##fn(void)		\
{						\
	if (!soc_is_omap())			\
		return 0;			\
	return fn();				\
}						\
level(__##fn);

#define omap_early_initcall(fn)		omap_initcall(early_initcall, fn)
#define omap_core_initcall(fn)		omap_initcall(core_initcall, fn)
#define omap_postcore_initcall(fn)	omap_initcall(postcore_initcall, fn)
#define omap_arch_initcall(fn)		omap_initcall(arch_initcall, fn)
#define omap_subsys_initcall(fn)	omap_initcall(subsys_initcall, fn)
#define omap_device_initcall(fn)	omap_initcall(device_initcall, fn)
#define omap_late_initcall(fn)		omap_initcall(late_initcall, fn)
#define omap_late_initcall_sync(fn)	omap_initcall(late_initcall_sync, fn)

/* Legacy defines, these can be removed when users are removed */
#define cpu_is_omap2420()	soc_is_omap2420()
#define cpu_is_omap2422()	soc_is_omap2422()
#define cpu_is_omap242x()	soc_is_omap242x()
#define cpu_is_omap2430()	soc_is_omap2430()
#define cpu_is_omap243x()	soc_is_omap243x()
#define cpu_is_omap24xx()	soc_is_omap24xx()
#define cpu_is_omap3430()	soc_is_omap3430()
#define cpu_is_omap343x()	soc_is_omap343x()
#define cpu_is_omap34xx()	soc_is_omap34xx()
#define cpu_is_omap3630()	soc_is_omap3630()
#define cpu_is_omap443x()	soc_is_omap443x()
#define cpu_is_omap446x()	soc_is_omap446x()
#define cpu_is_omap44xx()	soc_is_omap44xx()
#define cpu_is_ti814x()		soc_is_ti814x()
#define cpu_is_ti816x()		soc_is_ti816x()
#define cpu_is_ti81xx()		soc_is_ti81xx()

#endif	/* __ASSEMBLY__ */
Commit	Line	Data
e4c060db TL	1	/*
	2	* OMAP cpu type detection
	3	*
	4	* Copyright (C) 2004, 2008 Nokia Corporation
	5	*
	6	* Copyright (C) 2009-11 Texas Instruments.
	7	*
	8	* Written by Tony Lindgren <tony.lindgren@nokia.com>
	9	*
	10	* Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
6852215a	11	* Added DRA7xxx specific defines - Sricharan R<r.sricharan@ti.com>
e4c060db TL	12	*
	13	* This program is free software; you can redistribute it and/or modify
	14	* it under the terms of the GNU General Public License as published by
	15	* the Free Software Foundation; either version 2 of the License, or
	16	* (at your option) any later version.
	17	*
	18	* This program is distributed in the hope that it will be useful,
	19	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	20	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	21	* GNU General Public License for more details.
	22	*
	23	* You should have received a copy of the GNU General Public License
	24	* along with this program; if not, write to the Free Software
	25	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	26	*
	27	*/
	28
c49f34bc TL	29	#include "omap24xx.h"
	30	#include "omap34xx.h"
	31	#include "omap44xx.h"
	32	#include "ti81xx.h"
	33	#include "am33xx.h"
	34	#include "omap54xx.h"
e4c060db TL	35
	36	#ifndef __ASSEMBLY__
	37
	38	#include <linux/bitops.h>
6852215a	39	#include <linux/of.h>
e4c060db TL	40
e4c060db TL	41	/*
e60ba933	42	* OMAP2+ is always defined as ARCH_MULTIPLATFORM in Kconfig
e4c060db TL	43	*/
e4c060db TL	44	#undef MULTI_OMAP2
816a65ef	45	#define MULTI_OMAP2
6852215a	46
e4c060db TL	47	/*
	48	* Omap device type i.e. EMU/HS/TST/GP/BAD
	49	*/
	50	#define OMAP2_DEVICE_TYPE_TEST 0
	51	#define OMAP2_DEVICE_TYPE_EMU 1
	52	#define OMAP2_DEVICE_TYPE_SEC 2
	53	#define OMAP2_DEVICE_TYPE_GP 3
	54	#define OMAP2_DEVICE_TYPE_BAD 4
	55
	56	int omap_type(void);
	57
	58	/*
	59	* omap_rev bits:
d0b50905 TL	60	* SoC id bits (0730, 1510, 1710, 2422...) [31:16]
	61	* SoC revision (See _REV_ defined in cpu.h) [15:08]
	62	* SoC class bits (15xx, 16xx, 24xx, 34xx...) [07:00]
e4c060db TL	63	*/
	64	unsigned int omap_rev(void);
	65
816a65ef TL	66	static inline int soc_is_omap(void)
	67	{
	68	return omap_rev() != 0;
	69	}
	70
e4c060db	71	/*
d0b50905	72	* Get the SoC revision for OMAP devices
e4c060db TL	73	*/
	74	#define GET_OMAP_REVISION() ((omap_rev() >> 8) & 0xff)
	75
	76	/*
	77	* Macros to group OMAP into cpu classes.
	78	* These can be used in most places.
d0b50905 TL	79	* soc_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
	80	* soc_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423
	81	* soc_is_omap243x(): True for OMAP2430
	82	* soc_is_omap343x(): True for OMAP3430
	83	* soc_is_omap443x(): True for OMAP4430
	84	* soc_is_omap446x(): True for OMAP4460
	85	* soc_is_omap447x(): True for OMAP4470
e4c060db TL	86	* soc_is_omap543x(): True for OMAP5430, OMAP5432
	87	*/
	88	#define GET_OMAP_CLASS (omap_rev() & 0xff)
	89
	90	#define IS_OMAP_CLASS(class, id) \
	91	static inline int is_omap ##class (void) \
	92	{ \
	93	return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
	94	}
	95
	96	#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
	97
	98	#define IS_AM_CLASS(class, id) \
	99	static inline int is_am ##class (void) \
	100	{ \
	101	return (GET_AM_CLASS == (id)) ? 1 : 0; \
	102	}
	103
	104	#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
	105
	106	#define IS_TI_CLASS(class, id) \
	107	static inline int is_ti ##class (void) \
	108	{ \
	109	return (GET_TI_CLASS == (id)) ? 1 : 0; \
	110	}
	111
06c2d368 K	112	#define GET_DRA_CLASS ((omap_rev() >> 24) & 0xff)
	113
	114	#define IS_DRA_CLASS(class, id) \
	115	static inline int is_dra ##class (void) \
	116	{ \
	117	return (GET_DRA_CLASS == (id)) ? 1 : 0; \
	118	}
	119
e4c060db TL	120	#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
	121
	122	#define IS_OMAP_SUBCLASS(subclass, id) \
	123	static inline int is_omap ##subclass (void) \
	124	{ \
	125	return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
	126	}
	127
	128	#define IS_TI_SUBCLASS(subclass, id) \
	129	static inline int is_ti ##subclass (void) \
	130	{ \
	131	return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
	132	}
	133
	134	#define IS_AM_SUBCLASS(subclass, id) \
	135	static inline int is_am ##subclass (void) \
	136	{ \
	137	return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
	138	}
	139
06c2d368 K	140	#define IS_DRA_SUBCLASS(subclass, id) \
	141	static inline int is_dra ##subclass (void) \
	142	{ \
	143	return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
	144	}
	145
e4c060db TL	146	IS_OMAP_CLASS(24xx, 0x24)
	147	IS_OMAP_CLASS(34xx, 0x34)
	148	IS_OMAP_CLASS(44xx, 0x44)
	149	IS_AM_CLASS(35xx, 0x35)
	150	IS_OMAP_CLASS(54xx, 0x54)
	151	IS_AM_CLASS(33xx, 0x33)
c664d0a9	152	IS_AM_CLASS(43xx, 0x43)
e4c060db TL	153
e4c060db TL	154	IS_TI_CLASS(81xx, 0x81)
06c2d368	155	IS_DRA_CLASS(7xx, 0x7)
e4c060db TL	156
	157	IS_OMAP_SUBCLASS(242x, 0x242)
	158	IS_OMAP_SUBCLASS(243x, 0x243)
	159	IS_OMAP_SUBCLASS(343x, 0x343)
	160	IS_OMAP_SUBCLASS(363x, 0x363)
	161	IS_OMAP_SUBCLASS(443x, 0x443)
	162	IS_OMAP_SUBCLASS(446x, 0x446)
	163	IS_OMAP_SUBCLASS(447x, 0x447)
	164	IS_OMAP_SUBCLASS(543x, 0x543)
	165
	166	IS_TI_SUBCLASS(816x, 0x816)
	167	IS_TI_SUBCLASS(814x, 0x814)
	168	IS_AM_SUBCLASS(335x, 0x335)
c664d0a9	169	IS_AM_SUBCLASS(437x, 0x437)
06c2d368 K	170	IS_DRA_SUBCLASS(75x, 0x75)
06c2d368 K	171	IS_DRA_SUBCLASS(72x, 0x72)
e4c060db	172
d0b50905 TL	173	#define soc_is_ti81xx() 0
	174	#define soc_is_ti816x() 0
	175	#define soc_is_ti814x() 0
e4c060db TL	176	#define soc_is_am35xx() 0
	177	#define soc_is_am33xx() 0
	178	#define soc_is_am335x() 0
c664d0a9 AM	179	#define soc_is_am43xx() 0
c664d0a9 AM	180	#define soc_is_am437x() 0
d0b50905 TL	181	#define soc_is_omap44xx() 0
	182	#define soc_is_omap443x() 0
	183	#define soc_is_omap446x() 0
	184	#define soc_is_omap447x() 0
e4c060db TL	185	#define soc_is_omap54xx() 0
e4c060db TL	186	#define soc_is_omap543x() 0
6852215a	187	#define soc_is_dra7xx() 0
af438fec RN	188	#define soc_is_dra74x() 0
af438fec RN	189	#define soc_is_dra72x() 0
e4c060db	190
e60ba933 JR	191	#if defined(CONFIG_ARCH_OMAP2)
e60ba933 JR	192	# define soc_is_omap24xx() is_omap24xx()
e4c060db	193	#else
e60ba933 JR	194	# define soc_is_omap24xx() 0
	195	#endif
	196	#if defined(CONFIG_SOC_OMAP2420)
	197	# define soc_is_omap242x() is_omap242x()
	198	#else
	199	# define soc_is_omap242x() 0
	200	#endif
	201	#if defined(CONFIG_SOC_OMAP2430)
	202	# define soc_is_omap243x() is_omap243x()
	203	#else
	204	# define soc_is_omap243x() 0
	205	#endif
	206	#if defined(CONFIG_ARCH_OMAP3)
	207	# define soc_is_omap34xx() is_omap34xx()
	208	# define soc_is_omap343x() is_omap343x()
	209	#else
	210	# define soc_is_omap34xx() 0
	211	# define soc_is_omap343x() 0
e4c060db TL	212	#endif
	213
	214	/*
	215	* Macros to detect individual cpu types.
	216	* These are only rarely needed.
d0b50905 TL	217	* soc_is_omap2420(): True for OMAP2420
	218	* soc_is_omap2422(): True for OMAP2422
	219	* soc_is_omap2423(): True for OMAP2423
	220	* soc_is_omap2430(): True for OMAP2430
	221	* soc_is_omap3430(): True for OMAP3430
e4c060db TL	222	*/
	223	#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
	224
	225	#define IS_OMAP_TYPE(type, id) \
	226	static inline int is_omap ##type (void) \
	227	{ \
	228	return (GET_OMAP_TYPE == (id)) ? 1 : 0; \
	229	}
	230
	231	IS_OMAP_TYPE(2420, 0x2420)
	232	IS_OMAP_TYPE(2422, 0x2422)
	233	IS_OMAP_TYPE(2423, 0x2423)
	234	IS_OMAP_TYPE(2430, 0x2430)
	235	IS_OMAP_TYPE(3430, 0x3430)
	236
d0b50905 TL	237	#define soc_is_omap2420() 0
	238	#define soc_is_omap2422() 0
	239	#define soc_is_omap2423() 0
	240	#define soc_is_omap2430() 0
	241	#define soc_is_omap3430() 0
	242	#define soc_is_omap3630() 0
e4c060db TL	243	#define soc_is_omap5430() 0
	244
	245	/* These are needed for the common code */
d0b50905 TL	246	#define soc_is_omap7xx() 0
	247	#define soc_is_omap15xx() 0
	248	#define soc_is_omap16xx() 0
	249	#define soc_is_omap1510() 0
	250	#define soc_is_omap1610() 0
	251	#define soc_is_omap1611() 0
	252	#define soc_is_omap1621() 0
	253	#define soc_is_omap1710() 0
e4c060db TL	254	#define cpu_class_is_omap1() 0
e4c060db TL	255	#define cpu_class_is_omap2() 1
e4c060db TL	256
e4c060db TL	257	#if defined(CONFIG_ARCH_OMAP2)
d0b50905 TL	258	# undef soc_is_omap2420
	259	# undef soc_is_omap2422
	260	# undef soc_is_omap2423
	261	# undef soc_is_omap2430
	262	# define soc_is_omap2420() is_omap2420()
	263	# define soc_is_omap2422() is_omap2422()
	264	# define soc_is_omap2423() is_omap2423()
	265	# define soc_is_omap2430() is_omap2430()
e4c060db TL	266	#endif
	267
	268	#if defined(CONFIG_ARCH_OMAP3)
d0b50905 TL	269	# undef soc_is_omap3430
	270	# undef soc_is_ti81xx
	271	# undef soc_is_ti816x
	272	# undef soc_is_ti814x
e4c060db	273	# undef soc_is_am35xx
d0b50905 TL	274	# define soc_is_omap3430() is_omap3430()
	275	# undef soc_is_omap3630
	276	# define soc_is_omap3630() is_omap363x()
	277	# define soc_is_ti81xx() is_ti81xx()
	278	# define soc_is_ti816x() is_ti816x()
	279	# define soc_is_ti814x() is_ti814x()
e4c060db TL	280	# define soc_is_am35xx() is_am35xx()
	281	#endif
	282
	283	# if defined(CONFIG_SOC_AM33XX)
	284	# undef soc_is_am33xx
	285	# undef soc_is_am335x
	286	# define soc_is_am33xx() is_am33xx()
	287	# define soc_is_am335x() is_am335x()
	288	#endif
	289
c664d0a9 AM	290	#ifdef CONFIG_SOC_AM43XX
	291	# undef soc_is_am43xx
	292	# undef soc_is_am437x
	293	# define soc_is_am43xx() is_am43xx()
	294	# define soc_is_am437x() is_am437x()
	295	#endif
	296
e4c060db	297	# if defined(CONFIG_ARCH_OMAP4)
d0b50905 TL	298	# undef soc_is_omap44xx
	299	# undef soc_is_omap443x
	300	# undef soc_is_omap446x
	301	# undef soc_is_omap447x
	302	# define soc_is_omap44xx() is_omap44xx()
	303	# define soc_is_omap443x() is_omap443x()
	304	# define soc_is_omap446x() is_omap446x()
	305	# define soc_is_omap447x() is_omap447x()
e4c060db TL	306	# endif
	307
	308	# if defined(CONFIG_SOC_OMAP5)
	309	# undef soc_is_omap54xx
	310	# undef soc_is_omap543x
	311	# define soc_is_omap54xx() is_omap54xx()
	312	# define soc_is_omap543x() is_omap543x()
	313	#endif
	314
6852215a S	315	#if defined(CONFIG_SOC_DRA7XX)
6852215a S	316	#undef soc_is_dra7xx
af438fec RN	317	#undef soc_is_dra74x
af438fec RN	318	#undef soc_is_dra72x
06c2d368 K	319	#define soc_is_dra7xx() is_dra7xx()
	320	#define soc_is_dra74x() is_dra75x()
	321	#define soc_is_dra72x() is_dra72x()
6852215a S	322	#endif
6852215a S	323
e4c060db TL	324	/* Various silicon revisions for omap2 */
	325	#define OMAP242X_CLASS 0x24200024
	326	#define OMAP2420_REV_ES1_0 OMAP242X_CLASS
	327	#define OMAP2420_REV_ES2_0 (OMAP242X_CLASS \| (0x1 << 8))
	328
	329	#define OMAP243X_CLASS 0x24300024
	330	#define OMAP2430_REV_ES1_0 OMAP243X_CLASS
	331
	332	#define OMAP343X_CLASS 0x34300034
	333	#define OMAP3430_REV_ES1_0 OMAP343X_CLASS
	334	#define OMAP3430_REV_ES2_0 (OMAP343X_CLASS \| (0x1 << 8))
	335	#define OMAP3430_REV_ES2_1 (OMAP343X_CLASS \| (0x2 << 8))
	336	#define OMAP3430_REV_ES3_0 (OMAP343X_CLASS \| (0x3 << 8))
	337	#define OMAP3430_REV_ES3_1 (OMAP343X_CLASS \| (0x4 << 8))
	338	#define OMAP3430_REV_ES3_1_2 (OMAP343X_CLASS \| (0x5 << 8))
	339
	340	#define OMAP363X_CLASS 0x36300034
	341	#define OMAP3630_REV_ES1_0 OMAP363X_CLASS
	342	#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS \| (0x1 << 8))
	343	#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS \| (0x2 << 8))
	344
c27964b5	345	#define TI816X_CLASS 0x81600081
e4c060db TL	346	#define TI8168_REV_ES1_0 TI816X_CLASS
e4c060db TL	347	#define TI8168_REV_ES1_1 (TI816X_CLASS \| (0x1 << 8))
a5f93d9d AM	348	#define TI8168_REV_ES2_0 (TI816X_CLASS \| (0x2 << 8))
a5f93d9d AM	349	#define TI8168_REV_ES2_1 (TI816X_CLASS \| (0x3 << 8))
e4c060db	350
c27964b5	351	#define TI814X_CLASS 0x81400081
e4c060db TL	352	#define TI8148_REV_ES1_0 TI814X_CLASS
	353	#define TI8148_REV_ES2_0 (TI814X_CLASS \| (0x1 << 8))
	354	#define TI8148_REV_ES2_1 (TI814X_CLASS \| (0x2 << 8))
	355
	356	#define AM35XX_CLASS 0x35170034
	357	#define AM35XX_REV_ES1_0 AM35XX_CLASS
	358	#define AM35XX_REV_ES1_1 (AM35XX_CLASS \| (0x1 << 8))
	359
	360	#define AM335X_CLASS 0x33500033
	361	#define AM335X_REV_ES1_0 AM335X_CLASS
5af044f4	362	#define AM335X_REV_ES2_0 (AM335X_CLASS \| (0x1 << 8))
d240ef30	363	#define AM335X_REV_ES2_1 (AM335X_CLASS \| (0x2 << 8))
e4c060db	364
c664d0a9	365	#define AM437X_CLASS 0x43700000
4a2ed4c0 LV	366	#define AM437X_REV_ES1_0 (AM437X_CLASS \| (0x10 << 8))
4a2ed4c0 LV	367	#define AM437X_REV_ES1_1 (AM437X_CLASS \| (0x11 << 8))
4fdd54f0	368	#define AM437X_REV_ES1_2 (AM437X_CLASS \| (0x12 << 8))
c664d0a9	369
e4c060db TL	370	#define OMAP443X_CLASS 0x44300044
	371	#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS \| (0x10 << 8))
	372	#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS \| (0x20 << 8))
	373	#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS \| (0x21 << 8))
	374	#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS \| (0x22 << 8))
	375	#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS \| (0x23 << 8))
	376
	377	#define OMAP446X_CLASS 0x44600044
	378	#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS \| (0x10 << 8))
	379	#define OMAP4460_REV_ES1_1 (OMAP446X_CLASS \| (0x11 << 8))
	380
	381	#define OMAP447X_CLASS 0x44700044
	382	#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS \| (0x10 << 8))
	383
	384	#define OMAP54XX_CLASS 0x54000054
5a898a78	385	#define OMAP5430_REV_ES2_0 (OMAP54XX_CLASS \| (0x30 << 16) \| (0x20 << 8))
5a898a78	386	#define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS \| (0x32 << 16) \| (0x20 << 8))
e4c060db	387
733d20ee NM	388	#define DRA7XX_CLASS 0x07000000
	389	#define DRA752_REV_ES1_0 (DRA7XX_CLASS \| (0x52 << 16) \| (0x10 << 8))
	390	#define DRA752_REV_ES1_1 (DRA7XX_CLASS \| (0x52 << 16) \| (0x11 << 8))
81032e34 VM	391	#define DRA752_REV_ES2_0 (DRA7XX_CLASS \| (0x52 << 16) \| (0x20 << 8))
81032e34 VM	392	#define DRA722_REV_ES1_0 (DRA7XX_CLASS \| (0x22 << 16) \| (0x10 << 8))
73d20280	393	#define DRA722_REV_ES1_0 (DRA7XX_CLASS \| (0x22 << 16) \| (0x10 << 8))
6b532c4a	394	#define DRA722_REV_ES2_0 (DRA7XX_CLASS \| (0x22 << 16) \| (0x20 << 8))
733d20ee	395
e4c060db TL	396	void omap2xxx_check_revision(void);
	397	void omap3xxx_check_revision(void);
	398	void omap4xxx_check_revision(void);
	399	void omap5xxx_check_revision(void);
733d20ee	400	void dra7xxx_check_revision(void);
e4c060db TL	401	void omap3xxx_check_features(void);
e4c060db TL	402	void ti81xx_check_features(void);
7bcad170	403	void am33xx_check_features(void);
e4c060db TL	404	void omap4xxx_check_features(void);
	405
	406	/*
	407	* Runtime detection of OMAP3 features
	408	*
	409	* OMAP3_HAS_IO_CHAIN_CTRL: Some later members of the OMAP3 chip
	410	* family have OS-level control over the I/O chain clock. This is
	411	* to avoid a window during which wakeups could potentially be lost
	412	* during powerdomain transitions. If this bit is set, it
	413	* indicates that the chip does support OS-level control of this
	414	* feature.
	415	*/
	416	extern u32 omap_features;
	417
	418	#define OMAP3_HAS_L2CACHE BIT(0)
	419	#define OMAP3_HAS_IVA BIT(1)
	420	#define OMAP3_HAS_SGX BIT(2)
	421	#define OMAP3_HAS_NEON BIT(3)
	422	#define OMAP3_HAS_ISP BIT(4)
	423	#define OMAP3_HAS_192MHZ_CLK BIT(5)
	424	#define OMAP3_HAS_IO_WAKEUP BIT(6)
	425	#define OMAP3_HAS_SDRC BIT(7)
	426	#define OMAP3_HAS_IO_CHAIN_CTRL BIT(8)
42a1cc9c	427	#define OMAP4_HAS_PERF_SILICON BIT(9)
e4c060db TL	428
	429
	430	#define OMAP3_HAS_FEATURE(feat,flag) \
	431	static inline unsigned int omap3_has_ ##feat(void) \
	432	{ \
	433	return omap_features & OMAP3_HAS_ ##flag; \
	434	} \
	435
	436	OMAP3_HAS_FEATURE(l2cache, L2CACHE)
	437	OMAP3_HAS_FEATURE(sgx, SGX)
	438	OMAP3_HAS_FEATURE(iva, IVA)
	439	OMAP3_HAS_FEATURE(neon, NEON)
	440	OMAP3_HAS_FEATURE(isp, ISP)
	441	OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
	442	OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
	443	OMAP3_HAS_FEATURE(sdrc, SDRC)
	444	OMAP3_HAS_FEATURE(io_chain_ctrl, IO_CHAIN_CTRL)
	445
	446	/*
	447	* Runtime detection of OMAP4 features
	448	*/
	449	#define OMAP4_HAS_FEATURE(feat, flag) \
	450	static inline unsigned int omap4_has_ ##feat(void) \
	451	{ \
	452	return omap_features & OMAP4_HAS_ ##flag; \
	453	} \
	454
42a1cc9c	455	OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON)
e4c060db	456
816a65ef TL	457	/*
	458	* We need to make sure omap initcalls don't run when
	459	* multiplatform kernels are booted on other SoCs.
	460	*/
	461	#define omap_initcall(level, fn) \
	462	static int __init __used __##fn(void) \
	463	{ \
	464	if (!soc_is_omap()) \
	465	return 0; \
	466	return fn(); \
	467	} \
	468	level(__##fn);
	469
	470	#define omap_early_initcall(fn) omap_initcall(early_initcall, fn)
	471	#define omap_core_initcall(fn) omap_initcall(core_initcall, fn)
	472	#define omap_postcore_initcall(fn) omap_initcall(postcore_initcall, fn)
	473	#define omap_arch_initcall(fn) omap_initcall(arch_initcall, fn)
	474	#define omap_subsys_initcall(fn) omap_initcall(subsys_initcall, fn)
	475	#define omap_device_initcall(fn) omap_initcall(device_initcall, fn)
	476	#define omap_late_initcall(fn) omap_initcall(late_initcall, fn)
e7e17c53	477	#define omap_late_initcall_sync(fn) omap_initcall(late_initcall_sync, fn)
816a65ef	478
d0b50905 TL	479	/* Legacy defines, these can be removed when users are removed */
	480	#define cpu_is_omap2420() soc_is_omap2420()
	481	#define cpu_is_omap2422() soc_is_omap2422()
	482	#define cpu_is_omap242x() soc_is_omap242x()
	483	#define cpu_is_omap2430() soc_is_omap2430()
	484	#define cpu_is_omap243x() soc_is_omap243x()
	485	#define cpu_is_omap24xx() soc_is_omap24xx()
	486	#define cpu_is_omap3430() soc_is_omap3430()
	487	#define cpu_is_omap343x() soc_is_omap343x()
	488	#define cpu_is_omap34xx() soc_is_omap34xx()
	489	#define cpu_is_omap3630() soc_is_omap3630()
	490	#define cpu_is_omap443x() soc_is_omap443x()
	491	#define cpu_is_omap446x() soc_is_omap446x()
	492	#define cpu_is_omap44xx() soc_is_omap44xx()
	493	#define cpu_is_ti814x() soc_is_ti814x()
	494	#define cpu_is_ti816x() soc_is_ti816x()
	495	#define cpu_is_ti81xx() soc_is_ti81xx()
e4c060db	496
d0b50905	497	#endif /* __ASSEMBLY__ */